target/linux/ath79/dts/qca9558_openmesh_om5p-ac-v2.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2 /dts-v1/;
   3
   4 #include <dt-bindings/gpio/gpio.h>
   5 #include <dt-bindings/input/input.h>
   6
   7 #include "qca9557.dtsi"
   8
   9 / {
  10         compatible = "openmesh,om5p-ac-v2", "qca,qca9557";
  11         model = "OpenMesh OM5P-AC V2";
  12
  13         extosc: ref {
  14                 compatible = "fixed-clock";
  15                 #clock-cells = <0>;
  16                 clock-output-names = "ref";
  17                 clock-frequency = <40000000>;
  18         };
  19
  20         leds {
  21                 compatible = "gpio-leds";
  22
  23                 power {
  24                         label = "om5pac:blue:power";
  25                         gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
  26                 };
  27
  28                 wifi_green {
  29                         label = "om5pac:green:wifi";
  30                         gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
  31                 };
  32
  33                 wifi_yellow {
  34                         label = "om5pac:yellow:wifi";
  35                         gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
  36                 };
  37
  38                 wifi_red {
  39                         label = "om5pac:red:wifi";
  40                         gpios = <&gpio 23 GPIO_ACTIVE_LOW>;
  41                 };
  42         };
  43
  44         keys {
  45                 compatible = "gpio-keys-polled";
  46                 poll-interval = <100>;
  47
  48                 button0 {
  49                         label = "reset";
  50                         linux,code = <KEY_RESTART>;
  51                         gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
  52                 };
  53         };
  54
  55         gpio-export {
  56                 compatible = "gpio-export";
  57                 #size-cells = <0>;
  58
  59                 gpio_pa_dcdc {
  60                         gpio-export,name = "om5pac:pa_dcdc";
  61                         gpio-export,output = <1>;
  62                         gpios = <&gpio 2 GPIO_ACTIVE_HIGH>;
  63                 };
  64                 gpio_pa_high {
  65                         gpio-export,name = "om5pac:pa_high";
  66                         gpio-export,output = <1>;
  67                         gpios = <&gpio 16 GPIO_ACTIVE_HIGH>;
  68                 };
  69         };
  70 };
  71
  72 &pinmux {
  73         pinmux_pa_dcdc_pins {
  74                 pinctrl-single,bits = <0x0 0xff00 0x0>;
  75         };
  76
  77         pinmux_pa_high_pins {
  78                 pinctrl-single,bits = <0x10 0xff 0x0>;
  79         };
  80 };
  81
  82 &pcie0 {
  83         status = "okay";
  84 };
  85
  86 &uart {
  87         status = "okay";
  88 };
  89
  90 &pll {
  91         clocks = <&extosc>;
  92 };
  93
  94 &spi {
  95         status = "okay";
  96         num-cs = <1>;
  97
  98         flash@0 {
  99                 compatible = "jedec,spi-nor";
 100                 reg = <0>;
 101                 spi-max-frequency = <25000000>;
 102
 103                 partitions {
 104                         compatible = "fixed-partitions";
 105                         #address-cells = <1>;
 106                         #size-cells = <1>;
 107
 108                         partition@0 {
 109                                 label = "u-boot";
 110                                 reg = <0x000000 0x040000>;
 111                                 read-only;
 112                         };
 113
 114                         partition@1 {
 115                                 label = "u-boot-env";
 116                                 reg = <0x040000 0x010000>;
 117                         };
 118
 119                         partition@2 {
 120                                 compatible = "denx,uimage";
 121                                 label = "firmware";
 122                                 reg = <0x850000 0x7a0000>;
 123                         };
 124
 125                         partition@3 {
 126                                 label = "ART";
 127                                 reg = <0xff0000 0x010000>;
 128                                 read-only;
 129                         };
 130                 };
 131         };
 132 };
 133
 134 &mdio0 {
 135         status = "okay";
 136
 137         phy4: ethernet-phy@4 {
 138                 reg = <4>;
 139                 phy-mode = "rgmii-id";
 140         };
 141 };
 142
 143 &mdio1 {
 144         status = "okay";
 145
 146         phy1: ethernet-phy@1 {
 147                 reg = <1>;
 148                 phy-mode = "sgmii";
 149         };
 150 };
 151
 152 &eth0 {
 153         status = "okay";
 154
 155         pll-data = <0x82000101 0x80000101 0x80001313>;
 156
 157         phy-handle = <&phy4>;
 158         phy-mode = "rgmii";
 159 };
 160
 161 &eth1 {
 162         status = "okay";
 163
 164         pll-data = <0x03000101 0x80000101 0x80001313>;
 165
 166         phy-handle = <&phy1>;
 167         phy-mode = "sgmii";
 168 };