target/linux/ath79/dts/qca9558_openmesh_om5p-ac-v2.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2 /dts-v1/;
   3
   4 #include <dt-bindings/gpio/gpio.h>
   5 #include <dt-bindings/input/input.h>
   6
   7 #include "qca9557.dtsi"
   8
   9 / {
  10         compatible = "openmesh,om5p-ac-v2", "qca,qca9557";
  11         model = "OpenMesh OM5P-AC V2";
  12
  13         extosc: ref {
  14                 compatible = "fixed-clock";
  15                 #clock-cells = <0>;
  16                 clock-output-names = "ref";
  17                 clock-frequency = <40000000>;
  18         };
  19
  20         leds {
  21                 compatible = "gpio-leds";
  22
  23                 power {
  24                         label = "om5pac:blue:power";
  25                         gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
  26                         default-state = "off";
  27                 };
  28
  29                 wifi_green {
  30                         label = "om5pac:green:wifi";
  31                         gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
  32                         default-state = "off";
  33                 };
  34
  35                 wifi_yellow {
  36                         label = "om5pac:yellow:wifi";
  37                         gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
  38                         default-state = "off";
  39                 };
  40
  41                 wifi_red {
  42                         label = "om5pac:red:wifi";
  43                         gpios = <&gpio 23 GPIO_ACTIVE_LOW>;
  44                         default-state = "off";
  45                 };
  46         };
  47
  48         keys {
  49                 compatible = "gpio-keys-polled";
  50                 #address-cells = <1>;
  51                 #size-cells = <0>;
  52                 poll-interval = <100>;
  53
  54                 button@0 {
  55                         label = "reset";
  56                         linux,code = <KEY_RESTART>;
  57                         gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
  58                 };
  59         };
  60
  61         gpio-export {
  62                 compatible = "gpio-export";
  63                 #size-cells = <0>;
  64
  65                 gpio_pa_dcdc {
  66                         gpio-export,name = "om5pac:pa_dcdc";
  67                         gpio-export,output = <1>;
  68                         gpios = <&gpio 2 GPIO_ACTIVE_HIGH>;
  69                 };
  70                 gpio_pa_high {
  71                         gpio-export,name = "om5pac:pa_high";
  72                         gpio-export,output = <1>;
  73                         gpios = <&gpio 16 GPIO_ACTIVE_HIGH>;
  74                 };
  75         };
  76 };
  77
  78 &pinmux {
  79         pinmux_pa_dcdc_pins {
  80                 pinctrl-single,bits = <0x0 0xff00 0x0>;
  81         };
  82
  83         pinmux_pa_high_pins {
  84                 pinctrl-single,bits = <0x10 0xff 0x0>;
  85         };
  86 };
  87
  88 &pcie0 {
  89         status = "okay";
  90 };
  91
  92 &uart {
  93         status = "okay";
  94 };
  95
  96 &pll {
  97         clocks = <&extosc>;
  98 };
  99
 100 &spi {
 101         status = "okay";
 102         num-cs = <1>;
 103
 104         flash@0 {
 105                 #address-cells = <1>;
 106                 #size-cells = <1>;
 107                 compatible = "mx25l12805d";
 108                 reg = <0>;
 109                 spi-max-frequency = <25000000>;
 110
 111                 partitions {
 112                         compatible = "fixed-partitions";
 113                         #address-cells = <1>;
 114                         #size-cells = <1>;
 115
 116                         partition@0 {
 117                                 label = "u-boot";
 118                                 reg = <0x000000 0x040000>;
 119                                 read-only;
 120                         };
 121
 122                         partition@1 {
 123                                 label = "u-boot-env";
 124                                 reg = <0x040000 0x010000>;
 125                         };
 126
 127                         partition@2 {
 128                                 label = "firmware";
 129                                 reg = <0x850000 0x7a0000>;
 130                         };
 131
 132                         partition@3 {
 133                                 label = "ART";
 134                                 reg = <0xff0000 0x010000>;
 135                                 read-only;
 136                         };
 137                 };
 138         };
 139 };
 140
 141 &mdio0 {
 142         status = "okay";
 143
 144         phy4: ethernet-phy@4 {
 145                 reg = <4>;
 146                 phy-mode = "rgmii-id";
 147         };
 148 };
 149
 150 &mdio1 {
 151         status = "okay";
 152
 153         phy1: ethernet-phy@1 {
 154                 reg = <1>;
 155                 phy-mode = "sgmii";
 156         };
 157 };
 158
 159 &eth0 {
 160         status = "okay";
 161
 162         phy-handle = <&phy4>;
 163         phy-mode = "rgmii";
 164 };
 165
 166 &eth1 {
 167         status = "okay";
 168
 169         phy-handle = <&phy1>;
 170         phy-mode = "sgmii";
 171 };