ath79: enable UART in SoC DTSI files
[openwrt/openwrt.git] / target / linux / ath79 / dts / qca9558_tplink_tl-wr1043nd.dtsi
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2
3 #include "qca955x.dtsi"
4
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
7
8 / {
9 aliases {
10 led-boot = &led_system;
11 led-failsafe = &led_system;
12 led-running = &led_system;
13 led-upgrade = &led_system;
14 label-mac-device = &wmac;
15 };
16
17 leds {
18 compatible = "gpio-leds";
19
20 led_system: system {
21 label = "green:system";
22 gpios = <&gpio 19 GPIO_ACTIVE_LOW>;
23 linux,default-trigger = "heartbeat";
24 };
25
26 usb {
27 label = "green:usb";
28 gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
29 trigger-sources = <&hub_port0>;
30 linux,default-trigger = "usbport";
31 };
32
33 wifi_green {
34 label = "green:wlan";
35 gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
36 linux,default-trigger = "phy0tpt";
37 };
38
39 wifi_wps {
40 label = "green:wps";
41 gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
42 };
43 };
44
45 keys {
46 compatible = "gpio-keys";
47
48 reset {
49 label = "Reset button";
50 linux,code = <KEY_RESTART>;
51 gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
52 debounce-interval = <60>;
53 };
54
55 wifi {
56 label = "RFKILL button";
57 linux,code = <KEY_RFKILL>;
58 gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
59 debounce-interval = <60>;
60 };
61 };
62
63 gpio-export {
64 compatible = "gpio-export";
65 #size-cells = <0>;
66
67 gpio_usb_power {
68 gpio-export,name = "tp-link:power:usb";
69 gpio-export,output = <1>;
70 gpios = <&gpio 21 GPIO_ACTIVE_HIGH>;
71 };
72 };
73 };
74
75 &usb_phy0 {
76 status = "okay";
77 };
78
79 &usb0 {
80 #address-cells = <1>;
81 #size-cells = <0>;
82 status = "okay";
83
84 hub_port0: port@1 {
85 reg = <1>;
86 #trigger-source-cells = <0>;
87 };
88 };
89
90 &spi {
91 status = "okay";
92
93 flash@0 {
94 compatible = "jedec,spi-nor";
95 reg = <0>;
96 spi-max-frequency = <33400000>;
97
98 partitions {
99 compatible = "fixed-partitions";
100 #address-cells = <1>;
101 #size-cells = <1>;
102
103 uboot: partition@0 {
104 label = "u-boot";
105 reg = <0x000000 0x020000>;
106 read-only;
107 };
108
109 partition@20000 {
110 compatible = "tplink,firmware";
111 label = "firmware";
112 reg = <0x020000 0x7d0000>;
113 };
114
115 art: partition@7f0000 {
116 label = "art";
117 reg = <0x7f0000 0x010000>;
118 read-only;
119 };
120 };
121 };
122 };
123
124 &mdio0 {
125 status = "okay";
126
127 phy0: ethernet-phy@0 {
128 reg = <0>;
129 qca,ar8327-initvals = <
130 0x04 0x00080080 /* PORT0 PAD MODE CTRL */
131 0x0c 0x07600000 /* PORT6 PAD MODE CTRL */
132 0x10 0x81000080 /* POWER_ON_STRAP */
133 0x50 0xcc35cc35 /* LED_CTRL0 */
134 0x54 0xca35ca35 /* LED_CTRL1 */
135 0x58 0xc935c935 /* LED_CTRL2 */
136 0x5c 0x03ffff00 /* LED_CTRL3 */
137 0x7c 0x0000007e /* PORT0_STATUS */
138 0x94 0x0000007e /* PORT6 STATUS */
139 >;
140 };
141 };
142
143 &eth0 {
144 status = "okay";
145
146 pll-data = <0x56000000 0x00000101 0x00001616>;
147
148 mtd-mac-address = <&uboot 0x1fc00>;
149 mtd-mac-address-increment = <1>;
150 phy-handle = <&phy0>;
151 };
152
153 &eth1 {
154 status = "okay";
155
156 pll-data = <0x03000101 0x00000101 0x00001616>;
157
158 mtd-mac-address = <&uboot 0x1fc00>;
159
160 fixed-link {
161 speed = <1000>;
162 full-duplex;
163 };
164 };
165
166 &wmac {
167 status = "okay";
168 mtd-cal-data = <&art 0x1000>;
169 mtd-mac-address = <&uboot 0x1fc00>;
170 };