ath79: convert Araknis AN-300-AP-I-N WiFis to nvmem-cells
[openwrt/openwrt.git] / target / linux / ath79 / dts / qca9558_ubnt_nanobeam-ac-xc.dts
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Device Tree file for Ubiquiti Nanobeam NBE-5AC-19 (XC)
4 *
5 * Copyright (C) 2022 Daniel González Cabanelas <dgcbueu@gmail.com>
6 * based on device tree from qca9558_ubnt_powerbeam-5ac-500.dts
7 */
8
9 #include "qca955x_ubnt_xc.dtsi"
10
11 / {
12 compatible = "ubnt,nanobeam-ac-xc", "ubnt,xc", "qca,qca9558";
13 model = "Ubiquiti NanoBeam AC Gen1 (XC)";
14
15 aliases {
16 led-boot = &led_power;
17 led-failsafe = &led_power;
18 led-running = &led_power;
19 led-upgrade = &led_power;
20 };
21
22 keys {
23 compatible = "gpio-keys";
24
25 reset {
26 label = "Reset button";
27 linux,code = <KEY_RESTART>;
28 gpios = <&gpio 19 GPIO_ACTIVE_LOW>;
29 debounce-interval = <60>;
30 };
31 };
32
33 led_spi {
34 compatible = "spi-gpio";
35 #address-cells = <1>;
36 #size-cells = <0>;
37
38 sck-gpios = <&gpio 0 GPIO_ACTIVE_HIGH>;
39 mosi-gpios = <&gpio 1 GPIO_ACTIVE_HIGH>;
40 cs-gpios = <&gpio 3 GPIO_ACTIVE_HIGH>;
41 num-chipselects = <1>;
42
43 led_gpio: led_gpio@0 {
44 compatible = "fairchild,74hc595";
45 reg = <0>;
46 gpio-controller;
47 #gpio-cells = <2>;
48 registers-number = <1>;
49 spi-max-frequency = <10000000>;
50 enable-gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
51 };
52 };
53
54 leds {
55 compatible = "gpio-leds";
56
57 rssi0 {
58 label = "blue:rssi0";
59 gpios = <&led_gpio 0 GPIO_ACTIVE_LOW>;
60 };
61 rssi1 {
62 label = "blue:rssi1";
63 gpios = <&led_gpio 1 GPIO_ACTIVE_LOW>;
64 };
65 rssi2 {
66 label = "blue:rssi2";
67 gpios = <&led_gpio 2 GPIO_ACTIVE_LOW>;
68 };
69 rssi3 {
70 label = "blue:rssi3";
71 gpios = <&led_gpio 3 GPIO_ACTIVE_LOW>;
72 };
73 led_power: power {
74 label = "blue:power";
75 gpios = <&led_gpio 4 GPIO_ACTIVE_LOW>;
76 default-state = "on";
77 };
78 };
79 };
80
81 &mdio0 {
82 status = "okay";
83
84 phy4: ethernet-phy@4 {
85 phy-mode = "sgmii";
86 reg = <4>;
87 at803x-override-sgmii-link-check;
88 };
89 };
90
91 &eth0 {
92 status = "okay";
93
94 pll-reg = <0 0x48 0>;
95 pll-data = <0x03000000 0x00000101 0x00001313>;
96 nvmem-cells = <&macaddr_art_0>;
97 nvmem-cell-names = "mac-address";
98 phy-mode = "sgmii";
99 phy-handle = <&phy4>;
100 };
101
102 &art {
103 compatible = "nvmem-cells";
104 #address-cells = <1>;
105 #size-cells = <1>;
106
107 macaddr_art_0: macaddr@0 {
108 reg = <0x0 0x6>;
109 };
110 };