ath79: improve support for D-Link DIR-8x9 A1 series
[openwrt/openwrt.git] / target / linux / ath79 / dts / qca9563_asus_pl-ac56.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2
3 #include "qca956x.dtsi"
4
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
7
8 / {
9 model = "ASUS PL-AC56";
10 compatible = "asus,pl-ac56", "qca,qca9563";
11
12 aliases {
13 led-boot = &led_power;
14 led-failsafe = &led_power;
15 led-upgrade = &led_power;
16 label-mac-device = &eth0;
17 };
18
19 keys {
20 compatible = "gpio-keys";
21
22 reset {
23 linux,code = <BTN_0>;
24 gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
25 debounce-interval = <60>;
26 };
27
28 wps {
29 linux,code = <KEY_WPS_BUTTON>;
30 gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
31 debounce-interval = <60>;
32 };
33 };
34
35 leds {
36 compatible = "gpio-leds";
37
38 led_power: power {
39 label = "red:power";
40 gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
41 };
42
43 lan {
44 label = "green:lan";
45 gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
46 };
47
48 wlan2g {
49 label = "green:wlan2g";
50 gpios = <&gpio 19 GPIO_ACTIVE_LOW>;
51 };
52
53 wlan5g {
54 label = "green:wlan5g";
55 gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
56 };
57 };
58 };
59
60 &pcie {
61 status = "okay";
62 };
63
64 &spi {
65 status = "okay";
66
67 flash@0 {
68 compatible = "jedec,spi-nor";
69 reg = <0>;
70 spi-max-frequency = <50000000>;
71
72 partitions {
73 compatible = "fixed-partitions";
74 #address-cells = <1>;
75 #size-cells = <1>;
76
77 partition@0 {
78 label = "u-boot";
79 reg = <0x000000 0x40000>;
80 read-only;
81 };
82
83 partition@40000 {
84 label = "u-boot-env";
85 reg = <0x040000 0x10000>;
86 read-only;
87 };
88
89 art: partition@50000 {
90 label = "art";
91 reg = <0x050000 0x10000>;
92 read-only;
93
94 compatible = "nvmem-cells";
95 #address-cells = <1>;
96 #size-cells = <1>;
97
98 macaddr_art_1002: macaddr@1002 {
99 reg = <0x1002 0x6>;
100 };
101 };
102
103 partition@60000 {
104 compatible = "denx,uimage";
105 label = "firmware";
106 reg = <0x060000 0xf20000>;
107 };
108
109 partition@f80000 {
110 label = "plc";
111 reg = <0xf80000 0x80000>;
112 read-only;
113 };
114 };
115 };
116 };
117
118 &mdio0 {
119 status = "okay";
120
121 phy-mask = <0>;
122
123 phy0: ethernet-phy@0 {
124 reg = <0>;
125 phy-mode = "sgmii";
126 qca,mib-poll-interval = <500>;
127
128 qca,ar8327-initvals = <
129 0x04 0x80000080 /* AR8327_REG_PAD0_MODE */
130 0x08 0x01000000 /* AR8327_REG_PAD5_MODE */
131 0x0c 0x07500000 /* AR8327_REG_PAD6_MODE */
132 0x10 0x602613a0 /* AR8327_REG_POWER_ON_STRAP */
133 0x50 0xcc35cc35 /* AR8327_REG_LED_CTRL0 */
134 0x54 0xca35ca35 /* AR8327_REG_LED_CTRL1 */
135 0x58 0xc935c935 /* AR8327_REG_LED_CTRL2 */
136 0x5c 0x03ffff00 /* AR8327_REG_LED_CTRL3 */
137 0x7c 0x0000007e /* AR8327_REG_PORT_STATUS(0) */
138 0x94 0x0000007e /* AR8327_REG_PORT_STATUS(6) */
139 >;
140 };
141 };
142
143 &eth0 {
144 status = "okay";
145
146 phy-mode = "sgmii";
147 nvmem-cells = <&macaddr_art_1002>;
148 nvmem-cell-names = "mac-address";
149 phy-handle = <&phy0>;
150 };
151
152 &wmac {
153 status = "okay";
154
155 qca,no-eeprom;
156 };