ath79: add new ar934x spi driver
[openwrt/openwrt.git] / target / linux / ath79 / dts / qca9563_glinet_gl-ar750s.dtsi
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/input/input.h>
5
6 #include "qca956x.dtsi"
7
8 / {
9 compatible = "glinet,gl-ar750s", "qca,qca9563";
10 model = "GL.iNet GL-AR750S";
11
12 chosen {
13 bootargs = "console=ttyS0,115200n8";
14 };
15
16 aliases {
17 led-boot = &led_power;
18 led-failsafe = &led_power;
19 led-running = &led_power;
20 led-upgrade = &led_power;
21 label-mac-device = &eth0;
22 };
23
24 keys {
25 compatible = "gpio-keys";
26
27 pinctrl-names = "default";
28 pinctrl-0 = <&jtag_disable_pins>;
29
30 reset {
31 label = "reset";
32 linux,code = <KEY_RESTART>;
33 gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
34 };
35
36 mode {
37 label = "mode";
38 linux,code = <BTN_0>;
39 linux,input-type = <EV_SW>;
40 gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
41 };
42 };
43
44 leds {
45 compatible = "gpio-leds";
46
47 led_power: power {
48 label = "gl-ar750s:green:power";
49 gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
50 default-state = "keep";
51 };
52
53 led_wlan2g: wlan2g {
54 label = "gl-ar750s:green:wlan2g";
55 gpios = <&gpio 19 GPIO_ACTIVE_LOW>;
56 linux,default-trigger = "phy1tpt";
57 };
58
59 led_wlan5g: wlan5g {
60 label = "gl-ar750s:green:wlan5g";
61 gpios = <&gpio 20 GPIO_ACTIVE_HIGH>;
62 linux,default-trigger = "phy0tpt";
63 };
64 };
65
66 i2c: i2c {
67 compatible = "i2c-gpio";
68
69 sda-gpios = <&gpio 5 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
70 scl-gpios = <&gpio 21 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
71 };
72 };
73
74 &spi {
75 status = "okay";
76
77 num-cs = <2>;
78
79 flash_nor: flash@0 {
80 compatible = "jedec,spi-nor";
81 reg = <0>;
82 spi-max-frequency = <25000000>;
83
84 nor_partitions: partitions {
85 compatible = "fixed-partitions";
86 #address-cells = <1>;
87 #size-cells = <1>;
88
89 partition@0 {
90 label = "u-boot";
91 reg = <0x000000 0x040000>;
92 read-only;
93 };
94
95 partition@40000 {
96 label = "u-boot-env";
97 reg = <0x040000 0x010000>;
98 };
99
100 art: partition@50000 {
101 label = "art";
102 reg = <0x050000 0x010000>;
103 read-only;
104 };
105
106 nor_firmware: partition@60000 {
107 label = "nor_firmware";
108 reg = <0x060000 0xfa0000>;
109 };
110
111 nor_kernel: partition_alt@60000 {
112 label = "nor_kernel";
113 reg = <0x060000 0x400000>;
114 };
115
116 nor_reserved: parition_alt@460000 {
117 label = "nor_reserved";
118 reg = <0x460000 0xba0000>;
119 };
120 };
121 };
122
123 flash_nand: flash@1 {
124 compatible = "spi-nand";
125 reg = <1>;
126 spi-max-frequency = <25000000>;
127
128 nand_partitions: partitions {
129 compatible = "fixed-partitions";
130 #address-cells = <1>;
131 #size-cells = <1>;
132
133 nand_ubi: partition@0 {
134 label = "nand_ubi";
135 reg = <0x000000 0x8000000>;
136 };
137 };
138 };
139 };
140
141 &eth0 {
142 status = "okay";
143
144 phy-handle = <&phy0>;
145 mtd-mac-address = <&art 0x0>;
146 };
147
148 &gpio {
149 usb_vbus {
150 gpio-hog;
151 gpios = <7 GPIO_ACTIVE_HIGH>;
152 output-high;
153 line-name = "usb-vbus";
154 };
155 };
156
157 &mdio0 {
158 status = "okay";
159
160 phy-mask = <0>;
161
162 phy0: ethernet-phy@0 {
163 reg = <0>;
164 phy-mode = "sgmii";
165 qca,ar8327-initvals = <
166 0x04 0x00080080 /* PORT0 PAD MODE CTRL */
167 0x7c 0x0000007e /* PORT0_STATUS */
168 >;
169 };
170 };
171
172 &pcie {
173 status = "okay";
174 };
175
176 &uart {
177 status = "okay";
178 };
179
180 &usb0 {
181 status = "okay";
182 };
183
184 &usb1 {
185 status = "okay";
186 };
187
188 &usb_phy0 {
189 status = "okay";
190 };
191
192 &usb_phy1 {
193 status = "okay";
194 };
195
196 &wmac {
197 status = "okay";
198
199 mtd-cal-data = <&art 0x1000>;
200 };