ath79: improve common DTSI name for TP-Link Archer C5, C7 v1/v2
[openwrt/openwrt.git] / target / linux / ath79 / dts / qca9563_tplink_archer-c7-v4.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2 /dts-v1/;
3
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/input/input.h>
6
7 #include "qca956x.dtsi"
8
9 / {
10 compatible = "tplink,archer-c7-v4", "qca,qca9563";
11 model = "TP-Link Archer C7 v4";
12
13 chosen {
14 bootargs = "console=ttyS0,115200n8";
15 };
16
17 aliases {
18 led-boot = &led_system;
19 led-failsafe = &led_system;
20 led-running = &led_system;
21 led-upgrade = &led_system;
22 label-mac-device = &eth0;
23 };
24
25 led_spi {
26 compatible = "spi-gpio";
27 #address-cells = <1>;
28 #size-cells = <0>;
29
30 sck-gpios = <&gpio 15 GPIO_ACTIVE_HIGH>; // 74HC595 SRCLK (Serial Clock)
31 mosi-gpios = <&gpio 14 GPIO_ACTIVE_HIGH>; // 74HC595 SER (Serial)
32 cs-gpios = <&gpio 16 GPIO_ACTIVE_HIGH>; // 74HC595 RCLK (Register Clock)
33 num-chipselects = <1>;
34
35 led_gpio: led_gpio@0 {
36 compatible = "fairchild,74hc595";
37 reg = <0>;
38 gpio-controller;
39 #gpio-cells = <2>;
40 registers-number = <1>;
41 spi-max-frequency = <10000000>;
42 };
43 };
44
45 gpio-export {
46 compatible = "gpio-export";
47
48 gpio_shift_register_oe {
49 gpio-export,name = "tp-link:oe:sr";
50 gpio-export,output = <0>;
51 gpios = <&gpio 1 GPIO_ACTIVE_LOW>; // 74HC595 /OE (Output Enable)
52 };
53
54 gpio_shift_register_reset {
55 gpio-export,name = "tp-link:reset:sr";
56 gpio-export,output = <1>;
57 gpios = <&gpio 21 GPIO_ACTIVE_LOW>; // 74HC595 /SRCLR (Serial Clear)
58 };
59 };
60
61 leds {
62 compatible = "gpio-leds";
63
64 led_system: system {
65 label = "tp-link:green:system";
66 gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
67 default-state = "on";
68 };
69
70 usb1 {
71 label = "tp-link:green:usb1";
72 gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
73 trigger-sources = <&hub_port1>;
74 linux,default-trigger = "usbport";
75 };
76
77 usb2 {
78 label = "tp-link:green:usb2";
79 gpios = <&gpio 7 GPIO_ACTIVE_LOW>;
80 trigger-sources = <&hub_port0>;
81 linux,default-trigger = "usbport";
82 };
83
84 wlan5g {
85 label = "tp-link:green:wlan5g";
86 gpios = <&gpio 9 GPIO_ACTIVE_LOW>;
87 linux,default-trigger = "phy0tpt";
88 };
89
90 wlan2g {
91 label = "tp-link:green:wlan2g";
92 gpios = <&led_gpio 7 GPIO_ACTIVE_LOW>;
93 linux,default-trigger = "phy1tpt";
94 };
95
96 wan {
97 label = "tp-link:green:wan";
98 gpios = <&led_gpio 5 GPIO_ACTIVE_LOW>;
99 };
100
101 wan_fail {
102 label = "tp-link:orange:wan";
103 gpios = <&led_gpio 6 GPIO_ACTIVE_LOW>;
104 };
105
106 lan1 {
107 label = "tp-link:green:lan1";
108 gpios = <&led_gpio 4 GPIO_ACTIVE_LOW>;
109 };
110
111 lan2 {
112 label = "tp-link:green:lan2";
113 gpios = <&led_gpio 3 GPIO_ACTIVE_LOW>;
114 };
115
116 lan3 {
117 label = "tp-link:green:lan3";
118 gpios = <&led_gpio 2 GPIO_ACTIVE_LOW>;
119 };
120
121 lan4 {
122 label = "tp-link:green:lan4";
123 gpios = <&led_gpio 1 GPIO_ACTIVE_LOW>;
124 };
125
126 wps {
127 label = "tp-link:green:wps";
128 gpios = <&led_gpio 0 GPIO_ACTIVE_LOW>;
129 };
130 };
131
132 keys {
133 compatible = "gpio-keys";
134
135 reset {
136 label = "Reset button";
137 linux,code = <KEY_RESTART>;
138 gpios = <&gpio 5 GPIO_ACTIVE_LOW>;
139 debounce-interval = <60>;
140 };
141
142 wps {
143 label = "WPS button";
144 linux,code = <KEY_WPS_BUTTON>;
145 gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
146 debounce-interval = <60>;
147 };
148 };
149 };
150
151 &pcie {
152 status = "okay";
153 };
154
155 &uart {
156 status = "okay";
157 };
158
159 &gpio {
160 status = "okay";
161 };
162
163 &usb_phy0 {
164 status = "okay";
165 };
166
167 &usb0 {
168 #address-cells = <1>;
169 #size-cells = <0>;
170 status = "okay";
171
172 hub_port0: port@1 {
173 reg = <1>;
174 #trigger-source-cells = <0>;
175 };
176 };
177
178 &usb_phy1 {
179 status = "okay";
180 };
181
182 &usb1 {
183 #address-cells = <1>;
184 #size-cells = <0>;
185 status = "okay";
186
187 hub_port1: port@1 {
188 reg = <1>;
189 #trigger-source-cells = <0>;
190 };
191 };
192
193 &spi {
194 status = "okay";
195
196 num-cs = <1>;
197
198 flash@0 {
199 compatible = "jedec,spi-nor";
200 reg = <0>;
201 spi-max-frequency = <25000000>;
202
203 partitions {
204 compatible = "fixed-partitions";
205 #address-cells = <1>;
206 #size-cells = <1>;
207
208 partition@0 {
209 label = "factory-uboot";
210 reg = <0x000000 0x020000>;
211 read-only;
212 };
213
214 partition@20000 {
215 label = "u-boot";
216 reg = <0x020000 0x020000>;
217 read-only;
218 };
219
220 partition@40000 {
221 label = "firmware";
222 reg = <0x040000 0xec0000>;
223 compatible = "denx,uimage";
224 };
225
226 info: partition@f00000 {
227 label = "info";
228 reg = <0xf00000 0x0f0000>;
229 read-only;
230 };
231
232 art: partition@ff0000 {
233 label = "art";
234 reg = <0xff0000 0x010000>;
235 read-only;
236 };
237 };
238 };
239 };
240
241 &mdio0 {
242 status = "okay";
243
244 phy-mask = <0>;
245
246 phy0: ethernet-phy@0 {
247 reg = <0>;
248 phy-mode = "sgmii";
249 qca,mib-poll-interval = <500>;
250
251 qca,ar8327-initvals = <
252 0x04 0x80080080 /* PORT0 PAD MODE CTRL */
253 0x7c 0x0000007e /* PORT0_STATUS */
254 0x94 0x00000200 /* PORT6_STATUS */
255 >;
256 };
257 };
258
259 &eth0 {
260 status = "okay";
261
262 pll-data = <0x03000101 0x00000101 0x00001919>;
263
264 phy-mode = "sgmii";
265 mtd-mac-address = <&info 0x8>;
266 phy-handle = <&phy0>;
267 };
268
269 &wmac {
270 status = "okay";
271
272 mtd-cal-data = <&art 0x1000>;
273 mtd-mac-address = <&info 0x8>;
274 };