ath79: Fix GPIO reset button on TP-Link Archer C7v5
[openwrt/openwrt.git] / target / linux / ath79 / dts / qca9563_tplink_archer-x7-v5.dtsi
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2 /dts-v1/;
3
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/input/input.h>
6
7 #include "qca956x.dtsi"
8
9 / {
10 chosen {
11 bootargs = "console=ttyS0,115200n8";
12 };
13
14 aliases {
15 led-boot = &system;
16 led-failsafe = &system;
17 led-running = &system;
18 led-upgrade = &system;
19 };
20
21 gpio_leds: leds {
22 compatible = "gpio-leds";
23
24 system: system {
25 label = "tp-link:green:system";
26 gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
27 default-state = "on";
28 };
29
30 usb {
31 label = "tp-link:green:usb";
32 gpios = <&gpio 7 GPIO_ACTIVE_LOW>;
33 trigger-sources = <&hub_port0>;
34 linux,default-trigger = "usbport";
35 };
36
37 wlan5g {
38 label = "tp-link:green:wlan5g";
39 gpios = <&gpio 9 GPIO_ACTIVE_LOW>;
40 linux,default-trigger = "phy0tpt";
41 };
42
43 led_wlan2g: wlan2g {
44 label = "tp-link:green:wlan2g";
45 gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
46 linux,default-trigger = "phy1tpt";
47 };
48
49 wan {
50 label = "tp-link:green:wan";
51 gpios = <&gpio 21 GPIO_ACTIVE_LOW>;
52 };
53
54 wan_fail {
55 label = "tp-link:orange:wan";
56 gpios = <&gpio 20 GPIO_ACTIVE_LOW>;
57 };
58
59 lan1 {
60 label = "tp-link:green:lan1";
61 gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
62 };
63
64 lan2 {
65 label = "tp-link:green:lan2";
66 gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
67 };
68
69 lan3 {
70 label = "tp-link:green:lan3";
71 gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
72 };
73
74 lan4 {
75 label = "tp-link:green:lan4";
76 gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
77 };
78
79 wps {
80 label = "tp-link:green:wps";
81 gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
82 };
83 };
84
85 gpio_keys: keys {
86 compatible = "gpio-keys";
87
88 wps {
89 label = "WPS button";
90 linux,code = <KEY_WPS_BUTTON>;
91 gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
92 debounce-interval = <60>;
93 };
94 };
95
96 gpio-export {
97 compatible = "gpio-export";
98
99 gpio_usb_power {
100 gpio-export,name = "tp-link:power:usb";
101 gpio-export,output = <1>;
102 gpios = <&gpio 19 GPIO_ACTIVE_HIGH>;
103 };
104 };
105 };
106
107 &pcie {
108 status = "okay";
109 };
110
111 &uart {
112 status = "okay";
113 };
114
115 &gpio {
116 status = "okay";
117 };
118
119 &usb_phy0 {
120 status = "okay";
121 };
122
123 &usb0 {
124 #address-cells = <1>;
125 #size-cells = <0>;
126 status = "okay";
127
128 hub_port0: port@1 {
129 reg = <1>;
130 #trigger-source-cells = <0>;
131 };
132 };
133
134 &spi {
135 status = "okay";
136 num-cs = <1>;
137
138 flash@0 {
139 compatible = "jedec,spi-nor";
140 reg = <0>;
141 spi-max-frequency = <25000000>;
142
143 mtdparts: partitions {
144 compatible = "fixed-partitions";
145 #address-cells = <1>;
146 #size-cells = <1>;
147 };
148 };
149 };
150
151 &mdio0 {
152 status = "okay";
153
154 phy-mask = <0>;
155
156 phy0: ethernet-phy@0 {
157 reg = <0>;
158 phy-mode = "sgmii";
159
160 qca,ar8327-initvals = <
161 0x04 0x00080080 /* PORT0 PAD MODE CTRL */
162 0x10 0x81000080 /* POWER_ON_STRIP */
163 0x50 0xcc35cc35 /* LED_CTRL0 */
164 0x54 0xcb37cb37 /* LED_CTRL1 */
165 0x58 0x00000000 /* LED_CTRL2 */
166 0x5c 0x00f3cf00 /* LED_CTRL3 */
167 0x7c 0x0000007e /* PORT0_STATUS */
168 >;
169 };
170 };
171
172 &eth0 {
173 status = "okay";
174
175 pll-data = <0x03000101 0x00000101 0x00001919>;
176
177 phy-mode = "sgmii";
178 mtd-mac-address = <&info 0x8>;
179 phy-handle = <&phy0>;
180 };
181
182 &wmac {
183 status = "okay";
184 mtd-cal-data = <&art 0x1000>;
185 mtd-mac-address = <&info 0x8>;
186 };