ath79: enable UART in SoC DTSI files
[openwrt/openwrt.git] / target / linux / ath79 / dts / qca9563_tplink_tl-wpa8630.dtsi
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2
3 #include "qca956x.dtsi"
4
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
7
8 / {
9 aliases {
10 led-boot = &led_power;
11 led-failsafe = &led_power;
12 led-running = &led_power;
13 led-upgrade = &led_power;
14 };
15
16 keys {
17 compatible = "gpio-keys";
18
19 reset {
20 label = "Reset button";
21 linux,code = <KEY_RESTART>;
22 gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
23 debounce-interval = <60>;
24 };
25
26 leds {
27 label = "LED control button";
28 linux,code = <KEY_LIGHTS_TOGGLE>;
29 gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
30 debounce-interval = <60>;
31 };
32
33 pair {
34 label = "Pair button";
35 linux,code = <BTN_1>;
36 gpios = <&gpio 7 GPIO_ACTIVE_LOW>;
37 debounce-interval = <60>;
38 };
39
40 wifi {
41 label = "WiFi button";
42 linux,code = <KEY_RFKILL>;
43 gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
44 debounce-interval = <60>;
45 };
46 };
47
48 leds {
49 compatible = "gpio-leds";
50
51 led_power: power {
52 label = "green:power";
53 gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
54 };
55
56 lan {
57 label = "green:lan";
58 gpios = <&gpio 5 GPIO_ACTIVE_LOW>;
59 };
60
61 wifi2g {
62 label = "green:wifi2g";
63 gpios = <&gpio 19 GPIO_ACTIVE_LOW>;
64 linux,default-trigger = "phy1tpt";
65 };
66
67 wifi5g {
68 label = "green:wifi5g";
69 gpios = <&gpio 21 GPIO_ACTIVE_LOW>;
70 linux,default-trigger = "phy0tpt";
71 };
72 };
73
74 gpio-export {
75 compatible = "gpio-export";
76
77 led_control {
78 gpio-export,name = "tp-link:led:control";
79 gpio-export,output = <0>;
80 gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
81 };
82 };
83 };
84
85 &spi {
86 status = "okay";
87
88 flash@0 {
89 compatible = "jedec,spi-nor";
90 reg = <0>;
91 spi-max-frequency = <25000000>;
92
93 partitions: partitions {
94 compatible = "fixed-partitions";
95 #address-cells = <1>;
96 #size-cells = <1>;
97 };
98 };
99 };
100
101 &pcie {
102 status = "okay";
103 };
104
105 &mdio0 {
106 status = "okay";
107
108 phy-mask = <0>;
109
110 phy0: ethernet-phy@0 {
111 reg = <0>;
112 phy-mode = "sgmii";
113 qca,mib-poll-interval = <500>;
114
115 qca,ar8327-initvals = <
116 0x04 0x00080080 /* PORT0 PAD MODE CTRL */
117 0x7c 0x0000007e /* PORT0_STATUS */
118 >;
119 };
120 };
121
122 &eth0 {
123 status = "okay";
124
125 phy-handle = <&phy0>;
126 phy-mode = "sgmii";
127 };
128
129 &wmac {
130 status = "okay";
131
132 mtd-cal-data = <&art 0x1000>;
133 };