ath79: convert Araknis AN-300-AP-I-N WiFis to nvmem-cells
[openwrt/openwrt.git] / target / linux / ath79 / dts / qca9563_xiaomi_aiot-ac2350.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2
3 #include "qca956x.dtsi"
4
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
7
8 / {
9 model = "Xiaomi AIoT AC2350";
10 compatible = "xiaomi,aiot-ac2350", "qca,qca9563";
11
12 aliases {
13 label-mac-device = &eth0;
14
15 led-boot = &led_system_orange;
16 led-failsafe = &led_system_orange;
17 led-running = &led_system_blue;
18 led-upgrade = &led_system_orange;
19 };
20
21 keys {
22 compatible = "gpio-keys";
23
24 reset {
25 label = "reset";
26 linux,code = <KEY_RESTART>;
27 gpios = <&gpio 2 GPIO_ACTIVE_HIGH>;
28 };
29 };
30
31 leds {
32 compatible = "gpio-leds";
33
34 led_system_blue: system_blue {
35 label = "blue:system";
36 gpios = <&gpio 5 GPIO_ACTIVE_LOW>;
37 };
38
39 led_system_orange: system_orange {
40 label = "orange:system";
41 gpios = <&gpio 7 GPIO_ACTIVE_LOW>;
42 };
43
44 wan_blue {
45 label = "blue:wan";
46 gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
47 };
48
49 wan_orange {
50 label = "orange:wan";
51 gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
52 };
53 };
54
55 gpio-export {
56 compatible = "gpio-export";
57
58 wps {
59 gpio-export,name = "wps";
60 gpio-export,output = <0>;
61 gpios = <&gpio 1 GPIO_ACTIVE_HIGH>;
62 };
63
64 usb-reset {
65 gpio-export,name = "usb-reset";
66 gpio-export,output = <0>;
67 gpios = <&gpio 19 GPIO_ACTIVE_HIGH>;
68 };
69 };
70 };
71
72 &spi {
73 status = "okay";
74
75 flash@0 {
76 compatible = "jedec,spi-nor";
77 reg = <0>;
78 spi-max-frequency = <50000000>;
79
80 partitions {
81 compatible = "fixed-partitions";
82 #address-cells = <1>;
83 #size-cells = <1>;
84
85 partition@0 {
86 label = "Bootloader";
87 reg = <0x0 0x30000>;
88 read-only;
89 };
90
91 partition@30000 {
92 label = "Nvram";
93 reg = <0x30000 0x10000>;
94 };
95
96 partition@40000 {
97 label = "Bdata";
98 reg = <0x40000 0x10000>;
99 read-only;
100 };
101
102 partition@50000 {
103 label = "crash";
104 reg = <0x50000 0x10000>;
105 read-only;
106 };
107
108 art: partition@60000 {
109 label = "art";
110 reg = <0x60000 0x10000>;
111 read-only;
112 };
113
114 partition@70000 {
115 label = "cfg_bak";
116 reg = <0x70000 0x20000>;
117 read-only;
118 };
119
120 partition@90000 {
121 label = "overlay";
122 reg = <0x90000 0x170000>;
123 read-only;
124 };
125
126 partition@200000 {
127 compatible = "denx,uimage";
128 label = "firmware";
129 reg = <0x200000 0xe00000>;
130 };
131 };
132 };
133 };
134
135 &mdio0 {
136 status = "okay";
137
138 phy0: ethernet-phy@0 {
139 reg = <0>;
140 phy-mode = "sgmii";
141
142 qca,ar8327-initvals = <
143 0x04 0x00000080 /* PORT0 PAD MODE CTRL */
144 0x08 0x01000000 /* PORT5 PAD MODE CTRL */
145 0x0c 0x00000000 /* PORT6 PAD MODE CTRL */
146 0x10 0x602613a0 /* POWER_ON_STRAP */
147 0x50 0xcf35cf35 /* LED_CTRL0 */
148 0x54 0xca35ca35 /* LED_CTRL1 */
149 0x58 0xc935c935 /* LED_CTRL2 */
150 0x5c 0x03ffff00 /* LED_CTRL3 */
151 0x7c 0x000000fe /* PORT0_STATUS */
152 0x94 0x000010c2 /* PORT6_STATUS */
153 0xe0 0xc74164de /* SGMII_CTRL */
154 >;
155 };
156 };
157
158 &eth0 {
159 status = "okay";
160
161 phy-mode = "sgmii";
162 phy-handle = <&phy0>;
163
164 nvmem-cells = <&macaddr_art_0>;
165 nvmem-cell-names = "mac-address";
166 };
167
168 &wmac {
169 status = "okay";
170
171 mtd-cal-data = <&art 0x1000>;
172 };
173
174 &pcie {
175 status = "okay";
176 };
177
178 &art {
179 compatible = "nvmem-cells";
180 #address-cells = <1>;
181 #size-cells = <1>;
182
183 macaddr_art_0: macaddr@0 {
184 reg = <0x0 0x6>;
185 };
186 };