kernel: bump 4.14 to 4.14.43 for 18.06
[openwrt/openwrt.git] / target / linux / ath79 / patches-4.14 / 0027-MIPS-ath79-drop-mips_machine-support.patch
1 From e03edbc8e68063b3fca7457fa048d8abe0045f1f Mon Sep 17 00:00:00 2001
2 From: John Crispin <john@phrozen.org>
3 Date: Tue, 6 Mar 2018 10:15:54 +0100
4 Subject: [PATCH 27/27] MIPS: ath79: drop mips_machine support
5
6 Signed-off-by: John Crispin <john@phrozen.org>
7 ---
8 arch/mips/Kconfig | 1 -
9 arch/mips/ath79/machtypes.h | 28 -----------------
10 arch/mips/ath79/setup.c | 74 ++++++---------------------------------------
11 3 files changed, 10 insertions(+), 93 deletions(-)
12 delete mode 100644 arch/mips/ath79/machtypes.h
13
14 --- a/arch/mips/Kconfig
15 +++ b/arch/mips/Kconfig
16 @@ -196,7 +196,6 @@ config ATH79
17 select COMMON_CLK
18 select CLKDEV_LOOKUP
19 select IRQ_MIPS_CPU
20 - select MIPS_MACHINE
21 select SYS_HAS_CPU_MIPS32_R2
22 select SYS_HAS_EARLY_PRINTK
23 select SYS_SUPPORTS_32BIT_KERNEL
24 --- a/arch/mips/ath79/machtypes.h
25 +++ /dev/null
26 @@ -1,28 +0,0 @@
27 -/*
28 - * Atheros AR71XX/AR724X/AR913X machine type definitions
29 - *
30 - * Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
31 - * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
32 - *
33 - * This program is free software; you can redistribute it and/or modify it
34 - * under the terms of the GNU General Public License version 2 as published
35 - * by the Free Software Foundation.
36 - */
37 -
38 -#ifndef _ATH79_MACHTYPE_H
39 -#define _ATH79_MACHTYPE_H
40 -
41 -#include <asm/mips_machine.h>
42 -
43 -enum ath79_mach_type {
44 - ATH79_MACH_GENERIC_OF = -1, /* Device tree board */
45 - ATH79_MACH_GENERIC = 0,
46 - ATH79_MACH_AP121, /* Atheros AP121 reference board */
47 - ATH79_MACH_AP136_010, /* Atheros AP136-010 reference board */
48 - ATH79_MACH_AP81, /* Atheros AP81 reference board */
49 - ATH79_MACH_DB120, /* Atheros DB120 reference board */
50 - ATH79_MACH_PB44, /* Atheros PB44 reference board */
51 - ATH79_MACH_UBNT_XM, /* Ubiquiti Networks XM board rev 1.0 */
52 -};
53 -
54 -#endif /* _ATH79_MACHTYPE_H */
55 --- a/arch/mips/ath79/setup.c
56 +++ b/arch/mips/ath79/setup.c
57 @@ -32,7 +32,6 @@
58 #include <asm/mach-ath79/ath79.h>
59 #include <asm/mach-ath79/ar71xx_regs.h>
60 #include "common.h"
61 -#include "machtypes.h"
62
63 #define ATH79_SYS_TYPE_LEN 64
64
65 @@ -235,25 +234,21 @@ void __init plat_mem_setup(void)
66 else if (fw_passed_dtb)
67 __dt_setup_arch((void *)KSEG0ADDR(fw_passed_dtb));
68
69 - if (mips_machtype != ATH79_MACH_GENERIC_OF) {
70 - ath79_reset_base = ioremap_nocache(AR71XX_RESET_BASE,
71 - AR71XX_RESET_SIZE);
72 - ath79_pll_base = ioremap_nocache(AR71XX_PLL_BASE,
73 - AR71XX_PLL_SIZE);
74 - ath79_detect_sys_type();
75 - ath79_ddr_ctrl_init();
76 + ath79_reset_base = ioremap_nocache(AR71XX_RESET_BASE,
77 + AR71XX_RESET_SIZE);
78 + ath79_pll_base = ioremap_nocache(AR71XX_PLL_BASE,
79 + AR71XX_PLL_SIZE);
80 + ath79_detect_sys_type();
81 + ath79_ddr_ctrl_init();
82
83 - detect_memory_region(0, ATH79_MEM_SIZE_MIN, ATH79_MEM_SIZE_MAX);
84 -
85 - /* OF machines should use the reset driver */
86 - _machine_restart = ath79_restart;
87 - }
88 + detect_memory_region(0, ATH79_MEM_SIZE_MIN, ATH79_MEM_SIZE_MAX);
89
90 + _machine_restart = ath79_restart;
91 _machine_halt = ath79_halt;
92 pm_power_off = ath79_halt;
93 }
94
95 -static void __init ath79_of_plat_time_init(void)
96 +void __init plat_time_init(void)
97 {
98 struct device_node *np;
99 struct clk *clk;
100 @@ -283,62 +278,12 @@ static void __init ath79_of_plat_time_in
101 clk_put(clk);
102 }
103
104 -void __init plat_time_init(void)
105 -{
106 - unsigned long cpu_clk_rate;
107 - unsigned long ahb_clk_rate;
108 - unsigned long ddr_clk_rate;
109 - unsigned long ref_clk_rate;
110 -
111 - if (IS_ENABLED(CONFIG_OF) && mips_machtype == ATH79_MACH_GENERIC_OF) {
112 - ath79_of_plat_time_init();
113 - return;
114 - }
115 -
116 - ath79_clocks_init();
117 -
118 - cpu_clk_rate = ath79_get_sys_clk_rate("cpu");
119 - ahb_clk_rate = ath79_get_sys_clk_rate("ahb");
120 - ddr_clk_rate = ath79_get_sys_clk_rate("ddr");
121 - ref_clk_rate = ath79_get_sys_clk_rate("ref");
122 -
123 - pr_info("Clocks: CPU:%lu.%03luMHz, DDR:%lu.%03luMHz, AHB:%lu.%03luMHz, Ref:%lu.%03luMHz\n",
124 - cpu_clk_rate / 1000000, (cpu_clk_rate / 1000) % 1000,
125 - ddr_clk_rate / 1000000, (ddr_clk_rate / 1000) % 1000,
126 - ahb_clk_rate / 1000000, (ahb_clk_rate / 1000) % 1000,
127 - ref_clk_rate / 1000000, (ref_clk_rate / 1000) % 1000);
128 -
129 - mips_hpt_frequency = cpu_clk_rate / 2;
130 -}
131 -
132 void __init arch_init_irq(void)
133 {
134 irqchip_init();
135 }
136
137 -static int __init ath79_setup(void)
138 -{
139 - if (mips_machtype == ATH79_MACH_GENERIC_OF)
140 - return 0;
141 -
142 - mips_machine_setup();
143 -
144 - return 0;
145 -}
146 -
147 -arch_initcall(ath79_setup);
148 -
149 void __init device_tree_init(void)
150 {
151 unflatten_and_copy_device_tree();
152 }
153 -
154 -MIPS_MACHINE(ATH79_MACH_GENERIC,
155 - "Generic",
156 - "Generic AR71XX/AR724X/AR913X based board",
157 - NULL);
158 -
159 -MIPS_MACHINE(ATH79_MACH_GENERIC_OF,
160 - "DTB",
161 - "Generic AR71XX/AR724X/AR913X based board (DT)",
162 - NULL);
163 --- a/arch/mips/ath79/clock.c
164 +++ b/arch/mips/ath79/clock.c
165 @@ -26,7 +26,6 @@
166 #include <asm/mach-ath79/ath79.h>
167 #include <asm/mach-ath79/ar71xx_regs.h>
168 #include "common.h"
169 -#include "machtypes.h"
170
171 #define AR71XX_BASE_FREQ 40000000
172 #define AR724X_BASE_FREQ 40000000