ath79: remove unused TP-Link partition parser
[openwrt/openwrt.git] / target / linux / ath79 / patches-5.4 / 0060-serial-ar933x_uart-set-UART_CS_-RX-TX-_READY_ORIDE.patch
1 From patchwork Fri Feb 7 09:53:35 2020
2 Content-Type: text/plain; charset="utf-8"
3 MIME-Version: 1.0
4 Content-Transfer-Encoding: 7bit
5 X-Patchwork-Submitter: Daniel Golle <daniel@makrotopia.org>
6 X-Patchwork-Id: 1190470
7 Date: Fri, 7 Feb 2020 11:53:35 +0200
8 From: Daniel Golle <daniel@makrotopia.org>
9 To: linux-serial@vger.kernel.org, linux-kernel@vger.kernel.org
10 Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
11 Jiri Slaby <jslaby@suse.com>,
12 Chuanhong Guo <gch981213@gmail.com>,
13 Eitan Cohen <eitan@neot-semadar.com>,
14 Ori Gofen <origofen@gmail.com>
15 Subject: [PATCH] serial: ar933x_uart: set UART_CS_{RX,TX}_READY_ORIDE
16 Message-ID: <20200207095335.GA179836@makrotopia.org>
17 MIME-Version: 1.0
18 Content-Disposition: inline
19 Sender: linux-kernel-owner@vger.kernel.org
20 Precedence: bulk
21 List-ID: <linux-kernel.vger.kernel.org>
22 X-Mailing-List: linux-kernel@vger.kernel.org
23
24 On AR934x this UART is usually not initialized by the bootloader
25 as it is only used as a secondary serial port while the primary
26 UART is a newly introduced NS16550-compatible.
27 In order to make use of the ar933x-uart on AR934x without RTS/CTS
28 hardware flow control, one needs to set the
29 UART_CS_{RX,TX}_READY_ORIDE bits as other than on AR933x where this
30 UART is used as primary/console, the bootloader on AR934x typically
31 doesn't set those bits.
32 Setting them explicitely on AR933x should not do any harm, so just
33 set them unconditionally.
34
35 Tested-by: Chuanhong Guo <gch981213@gmail.com>
36 Signed-off-by: Daniel Golle <daniel@makrotopia.org>
37 ---
38 drivers/tty/serial/ar933x_uart.c | 8 ++++++++
39 1 file changed, 8 insertions(+)
40
41 --- a/drivers/tty/serial/ar933x_uart.c
42 +++ b/drivers/tty/serial/ar933x_uart.c
43 @@ -290,6 +290,10 @@ static void ar933x_uart_set_termios(stru
44 ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
45 AR933X_UART_CS_TX_READY_ORIDE | AR933X_UART_CS_RX_READY_ORIDE);
46
47 + /* enable RX and TX ready overide */
48 + ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
49 + AR933X_UART_CS_TX_READY_ORIDE | AR933X_UART_CS_RX_READY_ORIDE);
50 +
51 /* reenable the UART */
52 ar933x_uart_rmw(up, AR933X_UART_CS_REG,
53 AR933X_UART_CS_IF_MODE_M << AR933X_UART_CS_IF_MODE_S,
54 @@ -424,6 +428,10 @@ static int ar933x_uart_startup(struct ua
55
56 /* enable RX and TX ready overide */
57 ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
58 + AR933X_UART_CS_TX_READY_ORIDE | AR933X_UART_CS_RX_READY_ORIDE);
59 +
60 + /* enable RX and TX ready overide */
61 + ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
62 AR933X_UART_CS_TX_READY_ORIDE | AR933X_UART_CS_RX_READY_ORIDE);
63
64 /* Enable RX interrupts */