21d3148af75706b43b543c7ccb56ac95e7027954
[openwrt/openwrt.git] / target / linux / bcm27xx / patches-5.15 / 950-0005-drm-vc4-hdmi-Raise-the-maximum-clock-rate.patch
1 From f818ed9b9033ef7fbe45a7f5e2fc8c0d0cfe8c1d Mon Sep 17 00:00:00 2001
2 From: Maxime Ripard <maxime@cerno.tech>
3 Date: Mon, 25 Oct 2021 17:29:01 +0200
4 Subject: [PATCH] drm/vc4: hdmi: Raise the maximum clock rate
5
6 Now that we have the infrastructure in place, we can raise the maximum
7 pixel rate we can reach for HDMI0 on the BCM2711.
8
9 HDMI1 is left untouched since its pixelvalve has a smaller FIFO and
10 would need a clock faster than what we can provide to support the same
11 modes.
12
13 Acked-by: Thomas Zimmermann <tzimmermann@suse.de>
14 Reviewed-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
15 Signed-off-by: Maxime Ripard <maxime@cerno.tech>
16 Link: https://lore.kernel.org/r/20211025152903.1088803-9-maxime@cerno.tech
17 ---
18 drivers/gpu/drm/vc4/vc4_hdmi.c | 2 +-
19 1 file changed, 1 insertion(+), 1 deletion(-)
20
21 --- a/drivers/gpu/drm/vc4/vc4_hdmi.c
22 +++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
23 @@ -2386,7 +2386,7 @@ static const struct vc4_hdmi_variant bcm
24 .encoder_type = VC4_ENCODER_TYPE_HDMI0,
25 .debugfs_name = "hdmi0_regs",
26 .card_name = "vc4-hdmi-0",
27 - .max_pixel_clock = HDMI_14_MAX_TMDS_CLK,
28 + .max_pixel_clock = 600000000,
29 .registers = vc5_hdmi_hdmi0_fields,
30 .num_registers = ARRAY_SIZE(vc5_hdmi_hdmi0_fields),
31 .phy_lane_mapping = {