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kernel: bump 5.15 to 5.15.47
[openwrt/openwrt.git] / target / linux / bcm27xx / patches-5.15 / 950-0070-MMC-added-alternative-MMC-driver.patch
1 From 8cf89fd573e0ddea9505be66bb2de845ddc22eff Mon Sep 17 00:00:00 2001
2 From: gellert <gellert@raspberrypi.org>
3 Date: Fri, 15 Aug 2014 16:35:06 +0100
4 Subject: [PATCH] MMC: added alternative MMC driver
5 MIME-Version: 1.0
6 Content-Type: text/plain; charset=UTF-8
7 Content-Transfer-Encoding: 8bit
8
9 mmc: Disable CMD23 transfers on all cards
10
11 Pending wire-level investigation of these types of transfers
12 and associated errors on bcm2835-mmc, disable for now. Fallback of
13 CMD18/CMD25 transfers will be used automatically by the MMC layer.
14
15 Reported/Tested-by: Gellert Weisz <gellert@raspberrypi.org>
16
17 mmc: bcm2835-mmc: enable DT support for all architectures
18
19 Both ARCH_BCM2835 and ARCH_BCM270x are built with OF now.
20 Enable Device Tree support for all architectures.
21
22 Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
23
24 mmc: bcm2835-mmc: fix probe error handling
25
26 Probe error handling is broken in several places.
27 Simplify error handling by using device managed functions.
28 Replace pr_{err,info} with dev_{err,info}.
29
30 Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
31
32 bcm2835-mmc: Add locks when accessing sdhost registers
33
34 bcm2835-mmc: Add range of debug options for slowing things down
35
36 bcm2835-mmc: Add option to disable some delays
37
38 bcm2835-mmc: Add option to disable MMC_QUIRK_BLK_NO_CMD23
39
40 bcm2835-mmc: Default to disabling MMC_QUIRK_BLK_NO_CMD23
41
42 bcm2835-mmc: Adding overclocking option
43
44 Allow a different clock speed to be substitued for a requested 50MHz.
45 This option is exposed using the "overclock_50" DT parameter.
46 Note that the mmc interface is restricted to EVEN integer divisions of
47 250MHz, and the highest sensible option is 63 (250/4 = 62.5), the
48 next being 125 (250/2) which is much too high.
49
50 Use at your own risk.
51
52 bcm2835-mmc: Round up the overclock, so 62 works for 62.5Mhz
53
54 Also only warn once for each overclock setting.
55
56 mmc: bcm2835-mmc: Make available on ARCH_BCM2835
57
58 Make the bcm2835-mmc driver available for use on ARCH_BCM2835.
59
60 Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
61
62 BCM270x_DT: add bcm2835-mmc entry
63
64 Add Device Tree entry for bcm2835-mmc.
65 In non-DT mode, don't add the device in the board file.
66
67 Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
68
69 bcm2835-mmc: Don't overwrite MMC capabilities from DT
70
71 bcm2835-mmc: Don't override bus width capabilities from devicetree
72
73 Take out the force setting of the MMC_CAP_4_BIT_DATA host capability
74 so that the result read from devicetree via mmc_of_parse() is
75 preserved.
76
77 bcm2835-mmc: Only claim one DMA channel
78
79 With both MMC controllers enabled there are few DMA channels left. The
80 bcm2835-mmc driver only uses DMA in one direction at a time, so it
81 doesn't need to claim two channels.
82
83 See: https://github.com/raspberrypi/linux/issues/1327
84
85 Signed-off-by: Phil Elwell <phil@raspberrypi.org>
86
87 bcm2835-mmc: New timer API
88
89 mmc: bcm2835-mmc: Support underclocking
90
91 Support underclocking of the SD bus using the max-frequency DT property
92 (which currently has no DT parameter). The sd_overclock parameter
93 already provides another way to achieve the same thing which should be
94 equivalent in end result, but it is a bug not to support max-frequency
95 as well.
96
97 See: https://github.com/raspberrypi/linux/issues/2350
98
99 Signed-off-by: Phil Elwell <phil@raspberrypi.org>
100
101 mmc/bcm2835: Recover from MMC_SEND_EXT_CSD
102
103 If the user issues an "mmc extcsd read", the SD controller receives
104 what it thinks is a SEND_IF_COND command with an unexpected data block.
105 The resulting operations leave the FSM stuck in READWAIT, a state which
106 persists until the MMC framework resets the controller, by which point
107 the root filesystem is likely to have been unmounted.
108
109 A less heavyweight solution is to detect the condition and nudge the
110 FSM by asserting the (self-clearing) FORCE_DATA_MODE bit.
111
112 N.B. This workaround was essentially discovered by accident and without
113 a full understanding the inner workings of the controller, so it is
114 fortunate that the "fix" only modifies error paths.
115
116 See: https://github.com/raspberrypi/linux/issues/2728
117
118 Signed-off-by: Phil Elwell <phil@raspberrypi.org>
119
120 bcm2835-mmc: Fix DMA channel leak
121
122 The BCM2835 MMC host driver requests a DMA channel on probe but neglects
123 to release the channel in the probe error path and on driver unbind.
124
125 I'm seeing this happen on every boot of the Compute Module 3: On first
126 driver probe, DMA channel 2 is allocated and then leaked with a "could
127 not get clk, deferring probe" message. On second driver probe, channel 4
128 is allocated.
129
130 Fix it.
131
132 Signed-off-by: Lukas Wunner <lukas@wunner.de>
133 Cc: Frank Pavlic <f.pavlic@kunbus.de>
134
135 bcm2835-mmc: Fix struct mmc_host leak on probe
136
137 The BCM2835 MMC host driver requests the bus address of the host's
138 register map on probe. If that fails, the driver leaks the struct
139 mmc_host allocated earlier.
140
141 Fix it.
142
143 Signed-off-by: Lukas Wunner <lukas@wunner.de>
144 Cc: Frank Pavlic <f.pavlic@kunbus.de>
145
146 bcm2835-mmc: Fix duplicate free_irq() on remove
147
148 The BCM2835 MMC host driver requests its interrupt as a device-managed
149 resource, so the interrupt is automatically freed after the driver is
150 unbound.
151
152 However on driver unbind, bcm2835_mmc_remove() frees the interrupt
153 explicitly to avoid invocation of the interrupt handler after driver
154 structures have been torn down.
155
156 The interrupt is thus freed twice, leading to a WARN splat in
157 __free_irq(). Fix by not requesting the interrupt as a device-managed
158 resource.
159
160 Signed-off-by: Lukas Wunner <lukas@wunner.de>
161 Cc: Frank Pavlic <f.pavlic@kunbus.de>
162
163 bcm2835-mmc: Handle mmc_add_host() errors
164
165 The BCM2835 MMC host driver calls mmc_add_host() but doesn't check its
166 return value. Errors occurring in that function are therefore not
167 handled. Fix it.
168
169 Signed-off-by: Lukas Wunner <lukas@wunner.de>
170 Cc: Frank Pavlic <f.pavlic@kunbus.de>
171
172 bcm2835-mmc: Deduplicate reset of driver data on remove
173
174 The BCM2835 MMC host driver sets the device's driver data pointer to
175 NULL on ->remove() even though the driver core subsequently does the
176 same in __device_release_driver(). Drop the duplicate assignment.
177
178 Signed-off-by: Lukas Wunner <lukas@wunner.de>
179 Cc: Frank Pavlic <f.pavlic@kunbus.de>
180
181 bcm2835_mmc: Remove vestigial threaded IRQ
182
183 With SDIO processing now managed by the MMC framework with a
184 workqueue, the bcm2835_mmc driver no longer needs a threaded
185 IRQ.
186
187 Signed-off-by: Phil Elwell <phil@raspberrypi.org>
188
189 Add missing dma_unmap_sg calls to free relevant swiotlb bounce buffers.
190 This prevents DMA leaks.
191
192 Signed-off-by: Yaroslav Rosomakho <yaroslavros@gmail.com>
193
194 Limit max_req_size under arm64 (or any other platform that uses swiotlb) to prevent potential buffer overflow due to bouncing.
195
196 Signed-off-by: Yaroslav Rosomakho <yaroslavros@gmail.com>
197
198 mmc: sdhci: Silence MMC warnings
199
200 When the MMC isn't plugged in, the driver will spam the console which is
201 pretty annoying when using NFS.
202
203 Signed-off-by: Maxime Ripard <maxime@cerno.tech>
204
205 mmc: sdhci-iproc: Fix vmmc regulators on iProc
206
207 The Linux support for controlling card power via regulators appears to
208 be contentious. I would argue that the default behaviour is contrary to
209 the SDHCI spec - turning off the power writes a reserved value to the
210 SD Bus Voltage Select field of the Power Control Register, which
211 seems to kill the Arasan/iProc controller - but fortunately there is a
212 hook in sdhci_ops to override the behaviour. Borrow the implementation
213 from sdhci_arasan_set_power.
214
215 Signed-off-by: Phil Elwell <phil@raspberrypi.org>
216
217 bcm2835-mmc: uninitialized_var is no more
218 ---
219 drivers/mmc/core/block.c | 31 +-
220 drivers/mmc/core/core.c | 3 +-
221 drivers/mmc/core/quirks.h | 8 +
222 drivers/mmc/host/Kconfig | 29 +
223 drivers/mmc/host/Makefile | 1 +
224 drivers/mmc/host/bcm2835-mmc.c | 1576 ++++++++++++++++++++++++++++++++
225 drivers/mmc/host/sdhci-iproc.c | 12 +
226 drivers/mmc/host/sdhci.c | 6 +-
227 include/linux/mmc/card.h | 2 +
228 9 files changed, 1663 insertions(+), 5 deletions(-)
229 create mode 100644 drivers/mmc/host/bcm2835-mmc.c
230
231 --- a/drivers/mmc/core/block.c
232 +++ b/drivers/mmc/core/block.c
233 @@ -171,6 +171,13 @@ static DEFINE_MUTEX(open_lock);
234 module_param(perdev_minors, int, 0444);
235 MODULE_PARM_DESC(perdev_minors, "Minors numbers to allocate per device");
236
237 +/*
238 + * Allow quirks to be overridden for the current card
239 + */
240 +static char *card_quirks;
241 +module_param(card_quirks, charp, 0644);
242 +MODULE_PARM_DESC(card_quirks, "Force the use of the indicated quirks (a bitfield)");
243 +
244 static inline int mmc_blk_part_switch(struct mmc_card *card,
245 unsigned int part_type);
246 static void mmc_blk_rw_rq_prep(struct mmc_queue_req *mqrq,
247 @@ -2923,6 +2930,8 @@ static int mmc_blk_probe(struct mmc_card
248 {
249 struct mmc_blk_data *md;
250 int ret = 0;
251 + char quirk_str[24];
252 + char cap_str[10];
253
254 /*
255 * Check that the card supports the command class(es) we need.
256 @@ -2930,7 +2939,16 @@ static int mmc_blk_probe(struct mmc_card
257 if (!(card->csd.cmdclass & CCC_BLOCK_READ))
258 return -ENODEV;
259
260 - mmc_fixup_device(card, mmc_blk_fixups);
261 + if (card_quirks) {
262 + unsigned long quirks;
263 + if (kstrtoul(card_quirks, 0, &quirks) == 0)
264 + card->quirks = (unsigned int)quirks;
265 + else
266 + pr_err("mmc_block: Invalid card_quirks parameter '%s'\n",
267 + card_quirks);
268 + }
269 + else
270 + mmc_fixup_device(card, mmc_blk_fixups);
271
272 card->complete_wq = alloc_workqueue("mmc_complete",
273 WQ_MEM_RECLAIM | WQ_HIGHPRI, 0);
274 @@ -2945,6 +2963,17 @@ static int mmc_blk_probe(struct mmc_card
275 goto out_free;
276 }
277
278 + string_get_size((u64)get_capacity(md->disk), 512, STRING_UNITS_2,
279 + cap_str, sizeof(cap_str));
280 + if (card->quirks)
281 + snprintf(quirk_str, sizeof(quirk_str),
282 + " (quirks 0x%08x)", card->quirks);
283 + else
284 + quirk_str[0] = '\0';
285 + pr_info("%s: %s %s %s%s%s\n",
286 + md->disk->disk_name, mmc_card_id(card), mmc_card_name(card),
287 + cap_str, md->read_only ? " (ro)" : "", quirk_str);
288 +
289 ret = mmc_blk_alloc_parts(card, md);
290 if (ret)
291 goto out;
292 --- a/drivers/mmc/core/core.c
293 +++ b/drivers/mmc/core/core.c
294 @@ -1801,7 +1801,8 @@ EXPORT_SYMBOL(mmc_erase);
295
296 int mmc_can_erase(struct mmc_card *card)
297 {
298 - if (card->csd.cmdclass & CCC_ERASE && card->erase_size)
299 + if (card->csd.cmdclass & CCC_ERASE && card->erase_size &&
300 + !(card->quirks & MMC_QUIRK_ERASE_BROKEN))
301 return 1;
302 return 0;
303 }
304 --- a/drivers/mmc/core/quirks.h
305 +++ b/drivers/mmc/core/quirks.h
306 @@ -99,6 +99,14 @@ static const struct mmc_fixup __maybe_un
307 MMC_FIXUP("V10016", CID_MANFID_KINGSTON, CID_OEMID_ANY, add_quirk_mmc,
308 MMC_QUIRK_TRIM_BROKEN),
309
310 + /*
311 + * On some Kingston SD cards, multiple erases of less than 64
312 + * sectors can cause corruption.
313 + */
314 + MMC_FIXUP("SD16G", 0x41, 0x3432, add_quirk, MMC_QUIRK_ERASE_BROKEN),
315 + MMC_FIXUP("SD32G", 0x41, 0x3432, add_quirk, MMC_QUIRK_ERASE_BROKEN),
316 + MMC_FIXUP("SD64G", 0x41, 0x3432, add_quirk, MMC_QUIRK_ERASE_BROKEN),
317 +
318 END_FIXUP
319 };
320
321 --- a/drivers/mmc/host/Kconfig
322 +++ b/drivers/mmc/host/Kconfig
323 @@ -5,6 +5,35 @@
324
325 comment "MMC/SD/SDIO Host Controller Drivers"
326
327 +config MMC_BCM2835_MMC
328 + tristate "MMC support on BCM2835"
329 + depends on MACH_BCM2708 || MACH_BCM2709 || ARCH_BCM2835
330 + help
331 + This selects the MMC Interface on BCM2835.
332 +
333 + If you have a controller with this interface, say Y or M here.
334 +
335 + If unsure, say N.
336 +
337 +config MMC_BCM2835_DMA
338 + bool "DMA support on BCM2835 Arasan controller"
339 + depends on MMC_BCM2835_MMC
340 + help
341 + Enable DMA support on the Arasan SDHCI controller in Broadcom 2708
342 + based chips.
343 +
344 + If unsure, say N.
345 +
346 +config MMC_BCM2835_PIO_DMA_BARRIER
347 + int "Block count limit for PIO transfers"
348 + depends on MMC_BCM2835_MMC && MMC_BCM2835_DMA
349 + range 0 256
350 + default 2
351 + help
352 + The inclusive limit in bytes under which PIO will be used instead of DMA
353 +
354 + If unsure, say 2 here.
355 +
356 config MMC_DEBUG
357 bool "MMC host drivers debugging"
358 depends on MMC != n
359 --- a/drivers/mmc/host/Makefile
360 +++ b/drivers/mmc/host/Makefile
361 @@ -23,6 +23,7 @@ obj-$(CONFIG_MMC_SDHCI_F_SDH30) += sdhci
362 obj-$(CONFIG_MMC_SDHCI_MILBEAUT) += sdhci-milbeaut.o
363 obj-$(CONFIG_MMC_SDHCI_SPEAR) += sdhci-spear.o
364 obj-$(CONFIG_MMC_SDHCI_AM654) += sdhci_am654.o
365 +obj-$(CONFIG_MMC_BCM2835_MMC) += bcm2835-mmc.o
366 obj-$(CONFIG_MMC_WBSD) += wbsd.o
367 obj-$(CONFIG_MMC_AU1X) += au1xmmc.o
368 obj-$(CONFIG_MMC_ALCOR) += alcor.o
369 --- /dev/null
370 +++ b/drivers/mmc/host/bcm2835-mmc.c
371 @@ -0,0 +1,1576 @@
372 +/*
373 + * BCM2835 MMC host driver.
374 + *
375 + * Author: Gellert Weisz <gellert@raspberrypi.org>
376 + * Copyright 2014
377 + *
378 + * Based on
379 + * sdhci-bcm2708.c by Broadcom
380 + * sdhci-bcm2835.c by Stephen Warren and Oleksandr Tymoshenko
381 + * sdhci.c and sdhci-pci.c by Pierre Ossman
382 + *
383 + * This program is free software; you can redistribute it and/or modify it
384 + * under the terms and conditions of the GNU General Public License,
385 + * version 2, as published by the Free Software Foundation.
386 + *
387 + * This program is distributed in the hope it will be useful, but WITHOUT
388 + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
389 + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
390 + * more details.
391 + *
392 + * You should have received a copy of the GNU General Public License
393 + * along with this program. If not, see <http://www.gnu.org/licenses/>.
394 + */
395 +
396 +#include <linux/delay.h>
397 +#include <linux/module.h>
398 +#include <linux/io.h>
399 +#include <linux/mmc/mmc.h>
400 +#include <linux/mmc/host.h>
401 +#include <linux/mmc/sd.h>
402 +#include <linux/scatterlist.h>
403 +#include <linux/of_address.h>
404 +#include <linux/of_irq.h>
405 +#include <linux/clk.h>
406 +#include <linux/platform_device.h>
407 +#include <linux/err.h>
408 +#include <linux/blkdev.h>
409 +#include <linux/dmaengine.h>
410 +#include <linux/dma-mapping.h>
411 +#include <linux/of_dma.h>
412 +#include <linux/swiotlb.h>
413 +
414 +#include "sdhci.h"
415 +
416 +
417 +#define DRIVER_NAME "mmc-bcm2835"
418 +
419 +#define DBG(f, x...) \
420 +pr_debug(DRIVER_NAME " [%s()]: " f, __func__, ## x)
421 +
422 +#ifndef CONFIG_MMC_BCM2835_DMA
423 + #define FORCE_PIO
424 +#endif
425 +
426 +
427 +/* the inclusive limit in bytes under which PIO will be used instead of DMA */
428 +#ifdef CONFIG_MMC_BCM2835_PIO_DMA_BARRIER
429 +#define PIO_DMA_BARRIER CONFIG_MMC_BCM2835_PIO_DMA_BARRIER
430 +#else
431 +#define PIO_DMA_BARRIER 00
432 +#endif
433 +
434 +#define MIN_FREQ 400000
435 +#define TIMEOUT_VAL 0xE
436 +#define BCM2835_SDHCI_WRITE_DELAY(f) (((2 * 1000000) / f) + 1)
437 +
438 +
439 +unsigned mmc_debug;
440 +unsigned mmc_debug2;
441 +
442 +struct bcm2835_host {
443 + spinlock_t lock;
444 +
445 + void __iomem *ioaddr;
446 + u32 bus_addr;
447 +
448 + struct mmc_host *mmc;
449 +
450 + u32 timeout;
451 +
452 + int clock; /* Current clock speed */
453 + u8 pwr; /* Current voltage */
454 +
455 + unsigned int max_clk; /* Max possible freq */
456 + unsigned int timeout_clk; /* Timeout freq (KHz) */
457 + unsigned int clk_mul; /* Clock Muliplier value */
458 +
459 + struct tasklet_struct finish_tasklet; /* Tasklet structures */
460 +
461 + struct timer_list timer; /* Timer for timeouts */
462 +
463 + struct sg_mapping_iter sg_miter; /* SG state for PIO */
464 + unsigned int blocks; /* remaining PIO blocks */
465 +
466 + int irq; /* Device IRQ */
467 +
468 +
469 + u32 ier; /* cached registers */
470 +
471 + struct mmc_request *mrq; /* Current request */
472 + struct mmc_command *cmd; /* Current command */
473 + struct mmc_data *data; /* Current data request */
474 + unsigned int data_early:1; /* Data finished before cmd */
475 +
476 + wait_queue_head_t buf_ready_int; /* Waitqueue for Buffer Read Ready interrupt */
477 +
478 + u32 shadow;
479 +
480 + /*DMA part*/
481 + struct dma_chan *dma_chan_rxtx; /* DMA channel for reads and writes */
482 + struct dma_slave_config dma_cfg_rx;
483 + struct dma_slave_config dma_cfg_tx;
484 + struct dma_async_tx_descriptor *tx_desc; /* descriptor */
485 +
486 + bool have_dma;
487 + bool use_dma;
488 + bool wait_for_dma;
489 + /*end of DMA part*/
490 +
491 + int max_delay; /* maximum length of time spent waiting */
492 +
493 + int flags; /* Host attributes */
494 +#define SDHCI_REQ_USE_DMA (1<<2) /* Use DMA for this req. */
495 +#define SDHCI_DEVICE_DEAD (1<<3) /* Device unresponsive */
496 +#define SDHCI_AUTO_CMD12 (1<<6) /* Auto CMD12 support */
497 +#define SDHCI_AUTO_CMD23 (1<<7) /* Auto CMD23 support */
498 +#define SDHCI_SDIO_IRQ_ENABLED (1<<9) /* SDIO irq enabled */
499 +
500 + u32 overclock_50; /* frequency to use when 50MHz is requested (in MHz) */
501 + u32 max_overclock; /* Highest reported */
502 +};
503 +
504 +
505 +static inline void bcm2835_mmc_writel(struct bcm2835_host *host, u32 val, int reg, int from)
506 +{
507 + unsigned delay;
508 + lockdep_assert_held_once(&host->lock);
509 + writel(val, host->ioaddr + reg);
510 + udelay(BCM2835_SDHCI_WRITE_DELAY(max(host->clock, MIN_FREQ)));
511 +
512 + delay = ((mmc_debug >> 16) & 0xf) << ((mmc_debug >> 20) & 0xf);
513 + if (delay && !((1<<from) & mmc_debug2))
514 + udelay(delay);
515 +}
516 +
517 +static inline void mmc_raw_writel(struct bcm2835_host *host, u32 val, int reg)
518 +{
519 + unsigned delay;
520 + lockdep_assert_held_once(&host->lock);
521 + writel(val, host->ioaddr + reg);
522 +
523 + delay = ((mmc_debug >> 24) & 0xf) << ((mmc_debug >> 28) & 0xf);
524 + if (delay)
525 + udelay(delay);
526 +}
527 +
528 +static inline u32 bcm2835_mmc_readl(struct bcm2835_host *host, int reg)
529 +{
530 + lockdep_assert_held_once(&host->lock);
531 + return readl(host->ioaddr + reg);
532 +}
533 +
534 +static inline void bcm2835_mmc_writew(struct bcm2835_host *host, u16 val, int reg)
535 +{
536 + u32 oldval = (reg == SDHCI_COMMAND) ? host->shadow :
537 + bcm2835_mmc_readl(host, reg & ~3);
538 + u32 word_num = (reg >> 1) & 1;
539 + u32 word_shift = word_num * 16;
540 + u32 mask = 0xffff << word_shift;
541 + u32 newval = (oldval & ~mask) | (val << word_shift);
542 +
543 + if (reg == SDHCI_TRANSFER_MODE)
544 + host->shadow = newval;
545 + else
546 + bcm2835_mmc_writel(host, newval, reg & ~3, 0);
547 +
548 +}
549 +
550 +static inline void bcm2835_mmc_writeb(struct bcm2835_host *host, u8 val, int reg)
551 +{
552 + u32 oldval = bcm2835_mmc_readl(host, reg & ~3);
553 + u32 byte_num = reg & 3;
554 + u32 byte_shift = byte_num * 8;
555 + u32 mask = 0xff << byte_shift;
556 + u32 newval = (oldval & ~mask) | (val << byte_shift);
557 +
558 + bcm2835_mmc_writel(host, newval, reg & ~3, 1);
559 +}
560 +
561 +
562 +static inline u16 bcm2835_mmc_readw(struct bcm2835_host *host, int reg)
563 +{
564 + u32 val = bcm2835_mmc_readl(host, (reg & ~3));
565 + u32 word_num = (reg >> 1) & 1;
566 + u32 word_shift = word_num * 16;
567 + u32 word = (val >> word_shift) & 0xffff;
568 +
569 + return word;
570 +}
571 +
572 +static inline u8 bcm2835_mmc_readb(struct bcm2835_host *host, int reg)
573 +{
574 + u32 val = bcm2835_mmc_readl(host, (reg & ~3));
575 + u32 byte_num = reg & 3;
576 + u32 byte_shift = byte_num * 8;
577 + u32 byte = (val >> byte_shift) & 0xff;
578 +
579 + return byte;
580 +}
581 +
582 +static void bcm2835_mmc_unsignal_irqs(struct bcm2835_host *host, u32 clear)
583 +{
584 + u32 ier;
585 +
586 + ier = bcm2835_mmc_readl(host, SDHCI_SIGNAL_ENABLE);
587 + ier &= ~clear;
588 + /* change which requests generate IRQs - makes no difference to
589 + the content of SDHCI_INT_STATUS, or the need to acknowledge IRQs */
590 + bcm2835_mmc_writel(host, ier, SDHCI_SIGNAL_ENABLE, 2);
591 +}
592 +
593 +
594 +static void bcm2835_mmc_dumpregs(struct bcm2835_host *host)
595 +{
596 + pr_debug(DRIVER_NAME ": =========== REGISTER DUMP (%s)===========\n",
597 + mmc_hostname(host->mmc));
598 +
599 + pr_debug(DRIVER_NAME ": Sys addr: 0x%08x | Version: 0x%08x\n",
600 + bcm2835_mmc_readl(host, SDHCI_DMA_ADDRESS),
601 + bcm2835_mmc_readw(host, SDHCI_HOST_VERSION));
602 + pr_debug(DRIVER_NAME ": Blk size: 0x%08x | Blk cnt: 0x%08x\n",
603 + bcm2835_mmc_readw(host, SDHCI_BLOCK_SIZE),
604 + bcm2835_mmc_readw(host, SDHCI_BLOCK_COUNT));
605 + pr_debug(DRIVER_NAME ": Argument: 0x%08x | Trn mode: 0x%08x\n",
606 + bcm2835_mmc_readl(host, SDHCI_ARGUMENT),
607 + bcm2835_mmc_readw(host, SDHCI_TRANSFER_MODE));
608 + pr_debug(DRIVER_NAME ": Present: 0x%08x | Host ctl: 0x%08x\n",
609 + bcm2835_mmc_readl(host, SDHCI_PRESENT_STATE),
610 + bcm2835_mmc_readb(host, SDHCI_HOST_CONTROL));
611 + pr_debug(DRIVER_NAME ": Power: 0x%08x | Blk gap: 0x%08x\n",
612 + bcm2835_mmc_readb(host, SDHCI_POWER_CONTROL),
613 + bcm2835_mmc_readb(host, SDHCI_BLOCK_GAP_CONTROL));
614 + pr_debug(DRIVER_NAME ": Wake-up: 0x%08x | Clock: 0x%08x\n",
615 + bcm2835_mmc_readb(host, SDHCI_WAKE_UP_CONTROL),
616 + bcm2835_mmc_readw(host, SDHCI_CLOCK_CONTROL));
617 + pr_debug(DRIVER_NAME ": Timeout: 0x%08x | Int stat: 0x%08x\n",
618 + bcm2835_mmc_readb(host, SDHCI_TIMEOUT_CONTROL),
619 + bcm2835_mmc_readl(host, SDHCI_INT_STATUS));
620 + pr_debug(DRIVER_NAME ": Int enab: 0x%08x | Sig enab: 0x%08x\n",
621 + bcm2835_mmc_readl(host, SDHCI_INT_ENABLE),
622 + bcm2835_mmc_readl(host, SDHCI_SIGNAL_ENABLE));
623 + pr_debug(DRIVER_NAME ": AC12 err: 0x%08x | Slot int: 0x%08x\n",
624 + bcm2835_mmc_readw(host, SDHCI_AUTO_CMD_STATUS),
625 + bcm2835_mmc_readw(host, SDHCI_SLOT_INT_STATUS));
626 + pr_debug(DRIVER_NAME ": Caps: 0x%08x | Caps_1: 0x%08x\n",
627 + bcm2835_mmc_readl(host, SDHCI_CAPABILITIES),
628 + bcm2835_mmc_readl(host, SDHCI_CAPABILITIES_1));
629 + pr_debug(DRIVER_NAME ": Cmd: 0x%08x | Max curr: 0x%08x\n",
630 + bcm2835_mmc_readw(host, SDHCI_COMMAND),
631 + bcm2835_mmc_readl(host, SDHCI_MAX_CURRENT));
632 + pr_debug(DRIVER_NAME ": Host ctl2: 0x%08x\n",
633 + bcm2835_mmc_readw(host, SDHCI_HOST_CONTROL2));
634 +
635 + pr_debug(DRIVER_NAME ": ===========================================\n");
636 +}
637 +
638 +
639 +static void bcm2835_mmc_reset(struct bcm2835_host *host, u8 mask)
640 +{
641 + unsigned long timeout;
642 + unsigned long flags;
643 +
644 + spin_lock_irqsave(&host->lock, flags);
645 + bcm2835_mmc_writeb(host, mask, SDHCI_SOFTWARE_RESET);
646 +
647 + if (mask & SDHCI_RESET_ALL)
648 + host->clock = 0;
649 +
650 + /* Wait max 100 ms */
651 + timeout = 100;
652 +
653 + /* hw clears the bit when it's done */
654 + while (bcm2835_mmc_readb(host, SDHCI_SOFTWARE_RESET) & mask) {
655 + if (timeout == 0) {
656 + pr_err("%s: Reset 0x%x never completed.\n",
657 + mmc_hostname(host->mmc), (int)mask);
658 + bcm2835_mmc_dumpregs(host);
659 + return;
660 + }
661 + timeout--;
662 + spin_unlock_irqrestore(&host->lock, flags);
663 + mdelay(1);
664 + spin_lock_irqsave(&host->lock, flags);
665 + }
666 +
667 + if (100-timeout > 10 && 100-timeout > host->max_delay) {
668 + host->max_delay = 100-timeout;
669 + pr_warn("Warning: MMC controller hung for %d ms\n", host->max_delay);
670 + }
671 + spin_unlock_irqrestore(&host->lock, flags);
672 +}
673 +
674 +static void bcm2835_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios);
675 +
676 +static void bcm2835_mmc_init(struct bcm2835_host *host, int soft)
677 +{
678 + unsigned long flags;
679 + if (soft)
680 + bcm2835_mmc_reset(host, SDHCI_RESET_CMD|SDHCI_RESET_DATA);
681 + else
682 + bcm2835_mmc_reset(host, SDHCI_RESET_ALL);
683 +
684 + host->ier = SDHCI_INT_BUS_POWER | SDHCI_INT_DATA_END_BIT |
685 + SDHCI_INT_DATA_CRC | SDHCI_INT_DATA_TIMEOUT |
686 + SDHCI_INT_INDEX | SDHCI_INT_END_BIT | SDHCI_INT_CRC |
687 + SDHCI_INT_TIMEOUT | SDHCI_INT_DATA_END |
688 + SDHCI_INT_RESPONSE;
689 +
690 + spin_lock_irqsave(&host->lock, flags);
691 + bcm2835_mmc_writel(host, host->ier, SDHCI_INT_ENABLE, 3);
692 + bcm2835_mmc_writel(host, host->ier, SDHCI_SIGNAL_ENABLE, 3);
693 + spin_unlock_irqrestore(&host->lock, flags);
694 +
695 + if (soft) {
696 + /* force clock reconfiguration */
697 + host->clock = 0;
698 + bcm2835_mmc_set_ios(host->mmc, &host->mmc->ios);
699 + }
700 +}
701 +
702 +
703 +
704 +static void bcm2835_mmc_finish_data(struct bcm2835_host *host);
705 +
706 +static void bcm2835_mmc_dma_complete(void *param)
707 +{
708 + struct bcm2835_host *host = param;
709 + struct dma_chan *dma_chan;
710 + unsigned long flags;
711 + u32 dir_data;
712 +
713 + spin_lock_irqsave(&host->lock, flags);
714 +
715 + host->use_dma = false;
716 +
717 + if (host->data) {
718 + dma_chan = host->dma_chan_rxtx;
719 + if (host->data->flags & MMC_DATA_WRITE)
720 + dir_data = DMA_TO_DEVICE;
721 + else
722 + dir_data = DMA_FROM_DEVICE;
723 + dma_unmap_sg(dma_chan->device->dev,
724 + host->data->sg, host->data->sg_len,
725 + dir_data);
726 + if (! (host->data->flags & MMC_DATA_WRITE))
727 + bcm2835_mmc_finish_data(host);
728 + } else if (host->wait_for_dma) {
729 + host->wait_for_dma = false;
730 + tasklet_schedule(&host->finish_tasklet);
731 + }
732 +
733 + spin_unlock_irqrestore(&host->lock, flags);
734 +}
735 +
736 +static void bcm2835_bcm2835_mmc_read_block_pio(struct bcm2835_host *host)
737 +{
738 + unsigned long flags;
739 + size_t blksize, len, chunk;
740 +
741 + u32 scratch = 0;
742 + u8 *buf;
743 +
744 + blksize = host->data->blksz;
745 + chunk = 0;
746 +
747 + local_irq_save(flags);
748 +
749 + while (blksize) {
750 + if (!sg_miter_next(&host->sg_miter))
751 + BUG();
752 +
753 + len = min(host->sg_miter.length, blksize);
754 +
755 + blksize -= len;
756 + host->sg_miter.consumed = len;
757 +
758 + buf = host->sg_miter.addr;
759 +
760 + while (len) {
761 + if (chunk == 0) {
762 + scratch = bcm2835_mmc_readl(host, SDHCI_BUFFER);
763 + chunk = 4;
764 + }
765 +
766 + *buf = scratch & 0xFF;
767 +
768 + buf++;
769 + scratch >>= 8;
770 + chunk--;
771 + len--;
772 + }
773 + }
774 +
775 + sg_miter_stop(&host->sg_miter);
776 +
777 + local_irq_restore(flags);
778 +}
779 +
780 +static void bcm2835_bcm2835_mmc_write_block_pio(struct bcm2835_host *host)
781 +{
782 + unsigned long flags;
783 + size_t blksize, len, chunk;
784 + u32 scratch;
785 + u8 *buf;
786 +
787 + blksize = host->data->blksz;
788 + chunk = 0;
789 + chunk = 0;
790 + scratch = 0;
791 +
792 + local_irq_save(flags);
793 +
794 + while (blksize) {
795 + if (!sg_miter_next(&host->sg_miter))
796 + BUG();
797 +
798 + len = min(host->sg_miter.length, blksize);
799 +
800 + blksize -= len;
801 + host->sg_miter.consumed = len;
802 +
803 + buf = host->sg_miter.addr;
804 +
805 + while (len) {
806 + scratch |= (u32)*buf << (chunk * 8);
807 +
808 + buf++;
809 + chunk++;
810 + len--;
811 +
812 + if ((chunk == 4) || ((len == 0) && (blksize == 0))) {
813 + mmc_raw_writel(host, scratch, SDHCI_BUFFER);
814 + chunk = 0;
815 + scratch = 0;
816 + }
817 + }
818 + }
819 +
820 + sg_miter_stop(&host->sg_miter);
821 +
822 + local_irq_restore(flags);
823 +}
824 +
825 +
826 +static void bcm2835_mmc_transfer_pio(struct bcm2835_host *host)
827 +{
828 + u32 mask;
829 +
830 + BUG_ON(!host->data);
831 +
832 + if (host->blocks == 0)
833 + return;
834 +
835 + if (host->data->flags & MMC_DATA_READ)
836 + mask = SDHCI_DATA_AVAILABLE;
837 + else
838 + mask = SDHCI_SPACE_AVAILABLE;
839 +
840 + while (bcm2835_mmc_readl(host, SDHCI_PRESENT_STATE) & mask) {
841 +
842 + if (host->data->flags & MMC_DATA_READ)
843 + bcm2835_bcm2835_mmc_read_block_pio(host);
844 + else
845 + bcm2835_bcm2835_mmc_write_block_pio(host);
846 +
847 + host->blocks--;
848 +
849 + /* QUIRK used in sdhci.c removes the 'if' */
850 + /* but it seems this is unnecessary */
851 + if (host->blocks == 0)
852 + break;
853 +
854 +
855 + }
856 +}
857 +
858 +
859 +static void bcm2835_mmc_transfer_dma(struct bcm2835_host *host)
860 +{
861 + u32 len, dir_data, dir_slave;
862 + struct dma_async_tx_descriptor *desc = NULL;
863 + struct dma_chan *dma_chan;
864 +
865 +
866 + WARN_ON(!host->data);
867 +
868 + if (!host->data)
869 + return;
870 +
871 + if (host->blocks == 0)
872 + return;
873 +
874 + dma_chan = host->dma_chan_rxtx;
875 + if (host->data->flags & MMC_DATA_READ) {
876 + dir_data = DMA_FROM_DEVICE;
877 + dir_slave = DMA_DEV_TO_MEM;
878 + } else {
879 + dir_data = DMA_TO_DEVICE;
880 + dir_slave = DMA_MEM_TO_DEV;
881 + }
882 +
883 + /* The parameters have already been validated, so this will not fail */
884 + (void)dmaengine_slave_config(dma_chan,
885 + (dir_data == DMA_FROM_DEVICE) ?
886 + &host->dma_cfg_rx :
887 + &host->dma_cfg_tx);
888 +
889 + BUG_ON(!dma_chan->device);
890 + BUG_ON(!dma_chan->device->dev);
891 + BUG_ON(!host->data->sg);
892 +
893 + len = dma_map_sg(dma_chan->device->dev, host->data->sg,
894 + host->data->sg_len, dir_data);
895 + if (len > 0) {
896 + desc = dmaengine_prep_slave_sg(dma_chan, host->data->sg,
897 + len, dir_slave,
898 + DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
899 + } else {
900 + dev_err(mmc_dev(host->mmc), "dma_map_sg returned zero length\n");
901 + }
902 + if (desc) {
903 + unsigned long flags;
904 + spin_lock_irqsave(&host->lock, flags);
905 + bcm2835_mmc_unsignal_irqs(host, SDHCI_INT_DATA_AVAIL |
906 + SDHCI_INT_SPACE_AVAIL);
907 + host->tx_desc = desc;
908 + desc->callback = bcm2835_mmc_dma_complete;
909 + desc->callback_param = host;
910 + spin_unlock_irqrestore(&host->lock, flags);
911 + dmaengine_submit(desc);
912 + dma_async_issue_pending(dma_chan);
913 + } else {
914 + dma_unmap_sg(dma_chan->device->dev, host->data->sg, len, dir_data);
915 + }
916 +
917 +}
918 +
919 +
920 +
921 +static void bcm2835_mmc_set_transfer_irqs(struct bcm2835_host *host)
922 +{
923 + u32 pio_irqs = SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL;
924 + u32 dma_irqs = SDHCI_INT_DMA_END | SDHCI_INT_ADMA_ERROR;
925 +
926 + if (host->use_dma)
927 + host->ier = (host->ier & ~pio_irqs) | dma_irqs;
928 + else
929 + host->ier = (host->ier & ~dma_irqs) | pio_irqs;
930 +
931 + bcm2835_mmc_writel(host, host->ier, SDHCI_INT_ENABLE, 4);
932 + bcm2835_mmc_writel(host, host->ier, SDHCI_SIGNAL_ENABLE, 4);
933 +}
934 +
935 +
936 +static void bcm2835_mmc_prepare_data(struct bcm2835_host *host, struct mmc_command *cmd)
937 +{
938 + u8 count;
939 + struct mmc_data *data = cmd->data;
940 +
941 + WARN_ON(host->data);
942 +
943 + if (data || (cmd->flags & MMC_RSP_BUSY)) {
944 + count = TIMEOUT_VAL;
945 + bcm2835_mmc_writeb(host, count, SDHCI_TIMEOUT_CONTROL);
946 + }
947 +
948 + if (!data)
949 + return;
950 +
951 + /* Sanity checks */
952 + BUG_ON(data->blksz * data->blocks > 524288);
953 + BUG_ON(data->blksz > host->mmc->max_blk_size);
954 + BUG_ON(data->blocks > 65535);
955 +
956 + host->data = data;
957 + host->data_early = 0;
958 + host->data->bytes_xfered = 0;
959 +
960 +
961 + if (!(host->flags & SDHCI_REQ_USE_DMA)) {
962 + int flags;
963 +
964 + flags = SG_MITER_ATOMIC;
965 + if (host->data->flags & MMC_DATA_READ)
966 + flags |= SG_MITER_TO_SG;
967 + else
968 + flags |= SG_MITER_FROM_SG;
969 + sg_miter_start(&host->sg_miter, data->sg, data->sg_len, flags);
970 + host->blocks = data->blocks;
971 + }
972 +
973 + host->use_dma = host->have_dma && data->blocks > PIO_DMA_BARRIER;
974 +
975 + bcm2835_mmc_set_transfer_irqs(host);
976 +
977 + /* Set the DMA boundary value and block size */
978 + bcm2835_mmc_writew(host, SDHCI_MAKE_BLKSZ(SDHCI_DEFAULT_BOUNDARY_ARG,
979 + data->blksz), SDHCI_BLOCK_SIZE);
980 + bcm2835_mmc_writew(host, data->blocks, SDHCI_BLOCK_COUNT);
981 +
982 + BUG_ON(!host->data);
983 +}
984 +
985 +static void bcm2835_mmc_set_transfer_mode(struct bcm2835_host *host,
986 + struct mmc_command *cmd)
987 +{
988 + u16 mode;
989 + struct mmc_data *data = cmd->data;
990 +
991 + if (data == NULL) {
992 + /* clear Auto CMD settings for no data CMDs */
993 + mode = bcm2835_mmc_readw(host, SDHCI_TRANSFER_MODE);
994 + bcm2835_mmc_writew(host, mode & ~(SDHCI_TRNS_AUTO_CMD12 |
995 + SDHCI_TRNS_AUTO_CMD23), SDHCI_TRANSFER_MODE);
996 + return;
997 + }
998 +
999 + WARN_ON(!host->data);
1000 +
1001 + mode = SDHCI_TRNS_BLK_CNT_EN;
1002 +
1003 + if ((mmc_op_multi(cmd->opcode) || data->blocks > 1)) {
1004 + mode |= SDHCI_TRNS_MULTI;
1005 +
1006 + /*
1007 + * If we are sending CMD23, CMD12 never gets sent
1008 + * on successful completion (so no Auto-CMD12).
1009 + */
1010 + if (!host->mrq->sbc && (host->flags & SDHCI_AUTO_CMD12))
1011 + mode |= SDHCI_TRNS_AUTO_CMD12;
1012 + else if (host->mrq->sbc && (host->flags & SDHCI_AUTO_CMD23)) {
1013 + mode |= SDHCI_TRNS_AUTO_CMD23;
1014 + bcm2835_mmc_writel(host, host->mrq->sbc->arg, SDHCI_ARGUMENT2, 5);
1015 + }
1016 + }
1017 +
1018 + if (data->flags & MMC_DATA_READ)
1019 + mode |= SDHCI_TRNS_READ;
1020 + if (host->flags & SDHCI_REQ_USE_DMA)
1021 + mode |= SDHCI_TRNS_DMA;
1022 +
1023 + bcm2835_mmc_writew(host, mode, SDHCI_TRANSFER_MODE);
1024 +}
1025 +
1026 +void bcm2835_mmc_send_command(struct bcm2835_host *host, struct mmc_command *cmd)
1027 +{
1028 + int flags;
1029 + u32 mask;
1030 + unsigned long timeout;
1031 +
1032 + WARN_ON(host->cmd);
1033 +
1034 + /* Wait max 10 ms */
1035 + timeout = 1000;
1036 +
1037 + mask = SDHCI_CMD_INHIBIT;
1038 + if ((cmd->data != NULL) || (cmd->flags & MMC_RSP_BUSY))
1039 + mask |= SDHCI_DATA_INHIBIT;
1040 +
1041 + /* We shouldn't wait for data inihibit for stop commands, even
1042 + though they might use busy signaling */
1043 + if (host->mrq->data && (cmd == host->mrq->data->stop))
1044 + mask &= ~SDHCI_DATA_INHIBIT;
1045 +
1046 + while (bcm2835_mmc_readl(host, SDHCI_PRESENT_STATE) & mask) {
1047 + if (timeout == 0) {
1048 + pr_err("%s: Controller never released inhibit bit(s).\n",
1049 + mmc_hostname(host->mmc));
1050 + bcm2835_mmc_dumpregs(host);
1051 + cmd->error = -EIO;
1052 + tasklet_schedule(&host->finish_tasklet);
1053 + return;
1054 + }
1055 + timeout--;
1056 + udelay(10);
1057 + }
1058 +
1059 + if ((1000-timeout)/100 > 1 && (1000-timeout)/100 > host->max_delay) {
1060 + host->max_delay = (1000-timeout)/100;
1061 + pr_warn("Warning: MMC controller hung for %d ms\n", host->max_delay);
1062 + }
1063 +
1064 + timeout = jiffies;
1065 + if (!cmd->data && cmd->busy_timeout > 9000)
1066 + timeout += DIV_ROUND_UP(cmd->busy_timeout, 1000) * HZ + HZ;
1067 + else
1068 + timeout += 10 * HZ;
1069 + mod_timer(&host->timer, timeout);
1070 +
1071 + host->cmd = cmd;
1072 + host->use_dma = false;
1073 +
1074 + bcm2835_mmc_prepare_data(host, cmd);
1075 +
1076 + bcm2835_mmc_writel(host, cmd->arg, SDHCI_ARGUMENT, 6);
1077 +
1078 + bcm2835_mmc_set_transfer_mode(host, cmd);
1079 +
1080 + if ((cmd->flags & MMC_RSP_136) && (cmd->flags & MMC_RSP_BUSY)) {
1081 + pr_err("%s: Unsupported response type!\n",
1082 + mmc_hostname(host->mmc));
1083 + cmd->error = -EINVAL;
1084 + tasklet_schedule(&host->finish_tasklet);
1085 + return;
1086 + }
1087 +
1088 + if (!(cmd->flags & MMC_RSP_PRESENT))
1089 + flags = SDHCI_CMD_RESP_NONE;
1090 + else if (cmd->flags & MMC_RSP_136)
1091 + flags = SDHCI_CMD_RESP_LONG;
1092 + else if (cmd->flags & MMC_RSP_BUSY)
1093 + flags = SDHCI_CMD_RESP_SHORT_BUSY;
1094 + else
1095 + flags = SDHCI_CMD_RESP_SHORT;
1096 +
1097 + if (cmd->flags & MMC_RSP_CRC)
1098 + flags |= SDHCI_CMD_CRC;
1099 + if (cmd->flags & MMC_RSP_OPCODE)
1100 + flags |= SDHCI_CMD_INDEX;
1101 +
1102 + if (cmd->data)
1103 + flags |= SDHCI_CMD_DATA;
1104 +
1105 + bcm2835_mmc_writew(host, SDHCI_MAKE_CMD(cmd->opcode, flags), SDHCI_COMMAND);
1106 +}
1107 +
1108 +
1109 +static void bcm2835_mmc_finish_data(struct bcm2835_host *host)
1110 +{
1111 + struct mmc_data *data;
1112 +
1113 + BUG_ON(!host->data);
1114 +
1115 + data = host->data;
1116 + host->data = NULL;
1117 +
1118 + if (data->error)
1119 + data->bytes_xfered = 0;
1120 + else
1121 + data->bytes_xfered = data->blksz * data->blocks;
1122 +
1123 + /*
1124 + * Need to send CMD12 if -
1125 + * a) open-ended multiblock transfer (no CMD23)
1126 + * b) error in multiblock transfer
1127 + */
1128 + if (data->stop &&
1129 + (data->error ||
1130 + !host->mrq->sbc)) {
1131 +
1132 + /*
1133 + * The controller needs a reset of internal state machines
1134 + * upon error conditions.
1135 + */
1136 + if (data->error) {
1137 + bcm2835_mmc_reset(host, SDHCI_RESET_CMD);
1138 + bcm2835_mmc_reset(host, SDHCI_RESET_DATA);
1139 + }
1140 +
1141 + bcm2835_mmc_send_command(host, data->stop);
1142 + } else if (host->use_dma) {
1143 + host->wait_for_dma = true;
1144 + } else {
1145 + tasklet_schedule(&host->finish_tasklet);
1146 + }
1147 +}
1148 +
1149 +static void bcm2835_mmc_finish_command(struct bcm2835_host *host)
1150 +{
1151 + int i;
1152 +
1153 + BUG_ON(host->cmd == NULL);
1154 +
1155 + if (host->cmd->flags & MMC_RSP_PRESENT) {
1156 + if (host->cmd->flags & MMC_RSP_136) {
1157 + /* CRC is stripped so we need to do some shifting. */
1158 + for (i = 0; i < 4; i++) {
1159 + host->cmd->resp[i] = bcm2835_mmc_readl(host,
1160 + SDHCI_RESPONSE + (3-i)*4) << 8;
1161 + if (i != 3)
1162 + host->cmd->resp[i] |=
1163 + bcm2835_mmc_readb(host,
1164 + SDHCI_RESPONSE + (3-i)*4-1);
1165 + }
1166 + } else {
1167 + host->cmd->resp[0] = bcm2835_mmc_readl(host, SDHCI_RESPONSE);
1168 + }
1169 + }
1170 +
1171 + host->cmd->error = 0;
1172 +
1173 + /* Finished CMD23, now send actual command. */
1174 + if (host->cmd == host->mrq->sbc) {
1175 + host->cmd = NULL;
1176 + bcm2835_mmc_send_command(host, host->mrq->cmd);
1177 +
1178 + if (host->mrq->cmd->data && host->use_dma) {
1179 + /* DMA transfer starts now, PIO starts after interrupt */
1180 + bcm2835_mmc_transfer_dma(host);
1181 + }
1182 + } else {
1183 +
1184 + /* Processed actual command. */
1185 + if (host->data && host->data_early)
1186 + bcm2835_mmc_finish_data(host);
1187 +
1188 + if (!host->cmd->data)
1189 + tasklet_schedule(&host->finish_tasklet);
1190 +
1191 + host->cmd = NULL;
1192 + }
1193 +}
1194 +
1195 +
1196 +static void bcm2835_mmc_timeout_timer(struct timer_list *t)
1197 +{
1198 + struct bcm2835_host *host = from_timer(host, t, timer);
1199 + unsigned long flags;
1200 +
1201 + spin_lock_irqsave(&host->lock, flags);
1202 +
1203 + if (host->mrq) {
1204 + pr_err("%s: Timeout waiting for hardware interrupt.\n",
1205 + mmc_hostname(host->mmc));
1206 + bcm2835_mmc_dumpregs(host);
1207 +
1208 + if (host->data) {
1209 + host->data->error = -ETIMEDOUT;
1210 + bcm2835_mmc_finish_data(host);
1211 + } else {
1212 + if (host->cmd)
1213 + host->cmd->error = -ETIMEDOUT;
1214 + else
1215 + host->mrq->cmd->error = -ETIMEDOUT;
1216 +
1217 + tasklet_schedule(&host->finish_tasklet);
1218 + }
1219 + }
1220 +
1221 + spin_unlock_irqrestore(&host->lock, flags);
1222 +}
1223 +
1224 +
1225 +static void bcm2835_mmc_enable_sdio_irq_nolock(struct bcm2835_host *host, int enable)
1226 +{
1227 + if (!(host->flags & SDHCI_DEVICE_DEAD)) {
1228 + if (enable)
1229 + host->ier |= SDHCI_INT_CARD_INT;
1230 + else
1231 + host->ier &= ~SDHCI_INT_CARD_INT;
1232 +
1233 + bcm2835_mmc_writel(host, host->ier, SDHCI_INT_ENABLE, 7);
1234 + bcm2835_mmc_writel(host, host->ier, SDHCI_SIGNAL_ENABLE, 7);
1235 + }
1236 +}
1237 +
1238 +static void bcm2835_mmc_enable_sdio_irq(struct mmc_host *mmc, int enable)
1239 +{
1240 + struct bcm2835_host *host = mmc_priv(mmc);
1241 + unsigned long flags;
1242 +
1243 + spin_lock_irqsave(&host->lock, flags);
1244 + if (enable)
1245 + host->flags |= SDHCI_SDIO_IRQ_ENABLED;
1246 + else
1247 + host->flags &= ~SDHCI_SDIO_IRQ_ENABLED;
1248 +
1249 + bcm2835_mmc_enable_sdio_irq_nolock(host, enable);
1250 + spin_unlock_irqrestore(&host->lock, flags);
1251 +}
1252 +
1253 +static void bcm2835_mmc_cmd_irq(struct bcm2835_host *host, u32 intmask)
1254 +{
1255 +
1256 + BUG_ON(intmask == 0);
1257 +
1258 + if (!host->cmd) {
1259 + pr_err("%s: Got command interrupt 0x%08x even "
1260 + "though no command operation was in progress.\n",
1261 + mmc_hostname(host->mmc), (unsigned)intmask);
1262 + bcm2835_mmc_dumpregs(host);
1263 + return;
1264 + }
1265 +
1266 + if (intmask & SDHCI_INT_TIMEOUT)
1267 + host->cmd->error = -ETIMEDOUT;
1268 + else if (intmask & (SDHCI_INT_CRC | SDHCI_INT_END_BIT |
1269 + SDHCI_INT_INDEX)) {
1270 + host->cmd->error = -EILSEQ;
1271 + }
1272 +
1273 + if (host->cmd->error) {
1274 + tasklet_schedule(&host->finish_tasklet);
1275 + return;
1276 + }
1277 +
1278 + if (intmask & SDHCI_INT_RESPONSE)
1279 + bcm2835_mmc_finish_command(host);
1280 +
1281 +}
1282 +
1283 +static void bcm2835_mmc_data_irq(struct bcm2835_host *host, u32 intmask)
1284 +{
1285 + struct dma_chan *dma_chan;
1286 + u32 dir_data;
1287 +
1288 + BUG_ON(intmask == 0);
1289 +
1290 + if (!host->data) {
1291 + /*
1292 + * The "data complete" interrupt is also used to
1293 + * indicate that a busy state has ended. See comment
1294 + * above in sdhci_cmd_irq().
1295 + */
1296 + if (host->cmd && (host->cmd->flags & MMC_RSP_BUSY)) {
1297 + if (intmask & SDHCI_INT_DATA_END) {
1298 + bcm2835_mmc_finish_command(host);
1299 + return;
1300 + }
1301 + }
1302 +
1303 + pr_debug("%s: Got data interrupt 0x%08x even "
1304 + "though no data operation was in progress.\n",
1305 + mmc_hostname(host->mmc), (unsigned)intmask);
1306 + bcm2835_mmc_dumpregs(host);
1307 +
1308 + return;
1309 + }
1310 +
1311 + if (intmask & SDHCI_INT_DATA_TIMEOUT)
1312 + host->data->error = -ETIMEDOUT;
1313 + else if (intmask & SDHCI_INT_DATA_END_BIT)
1314 + host->data->error = -EILSEQ;
1315 + else if ((intmask & SDHCI_INT_DATA_CRC) &&
1316 + SDHCI_GET_CMD(bcm2835_mmc_readw(host, SDHCI_COMMAND))
1317 + != MMC_BUS_TEST_R)
1318 + host->data->error = -EILSEQ;
1319 +
1320 + if (host->use_dma) {
1321 + if (host->data->flags & MMC_DATA_WRITE) {
1322 + /* IRQ handled here */
1323 +
1324 + dma_chan = host->dma_chan_rxtx;
1325 + dir_data = DMA_TO_DEVICE;
1326 + dma_unmap_sg(dma_chan->device->dev,
1327 + host->data->sg, host->data->sg_len,
1328 + dir_data);
1329 +
1330 + bcm2835_mmc_finish_data(host);
1331 + }
1332 +
1333 + } else {
1334 + if (host->data->error)
1335 + bcm2835_mmc_finish_data(host);
1336 + else {
1337 + if (intmask & (SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL))
1338 + bcm2835_mmc_transfer_pio(host);
1339 +
1340 + if (intmask & SDHCI_INT_DATA_END) {
1341 + if (host->cmd) {
1342 + /*
1343 + * Data managed to finish before the
1344 + * command completed. Make sure we do
1345 + * things in the proper order.
1346 + */
1347 + host->data_early = 1;
1348 + } else {
1349 + bcm2835_mmc_finish_data(host);
1350 + }
1351 + }
1352 + }
1353 + }
1354 +}
1355 +
1356 +
1357 +static irqreturn_t bcm2835_mmc_irq(int irq, void *dev_id)
1358 +{
1359 + irqreturn_t result = IRQ_NONE;
1360 + struct bcm2835_host *host = dev_id;
1361 + u32 intmask, mask, unexpected = 0;
1362 + int max_loops = 16;
1363 +
1364 + spin_lock(&host->lock);
1365 +
1366 + intmask = bcm2835_mmc_readl(host, SDHCI_INT_STATUS);
1367 +
1368 + if (!intmask || intmask == 0xffffffff) {
1369 + result = IRQ_NONE;
1370 + goto out;
1371 + }
1372 +
1373 + do {
1374 + /* Clear selected interrupts. */
1375 + mask = intmask & (SDHCI_INT_CMD_MASK | SDHCI_INT_DATA_MASK |
1376 + SDHCI_INT_BUS_POWER);
1377 + bcm2835_mmc_writel(host, mask, SDHCI_INT_STATUS, 8);
1378 +
1379 +
1380 + if (intmask & SDHCI_INT_CMD_MASK)
1381 + bcm2835_mmc_cmd_irq(host, intmask & SDHCI_INT_CMD_MASK);
1382 +
1383 + if (intmask & SDHCI_INT_DATA_MASK)
1384 + bcm2835_mmc_data_irq(host, intmask & SDHCI_INT_DATA_MASK);
1385 +
1386 + if (intmask & SDHCI_INT_BUS_POWER)
1387 + pr_err("%s: Card is consuming too much power!\n",
1388 + mmc_hostname(host->mmc));
1389 +
1390 + if (intmask & SDHCI_INT_CARD_INT) {
1391 + bcm2835_mmc_enable_sdio_irq_nolock(host, false);
1392 + sdio_signal_irq(host->mmc);
1393 + }
1394 +
1395 + intmask &= ~(SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE |
1396 + SDHCI_INT_CMD_MASK | SDHCI_INT_DATA_MASK |
1397 + SDHCI_INT_ERROR | SDHCI_INT_BUS_POWER |
1398 + SDHCI_INT_CARD_INT);
1399 +
1400 + if (intmask) {
1401 + unexpected |= intmask;
1402 + bcm2835_mmc_writel(host, intmask, SDHCI_INT_STATUS, 9);
1403 + }
1404 +
1405 + if (result == IRQ_NONE)
1406 + result = IRQ_HANDLED;
1407 +
1408 + intmask = bcm2835_mmc_readl(host, SDHCI_INT_STATUS);
1409 + } while (intmask && --max_loops);
1410 +out:
1411 + spin_unlock(&host->lock);
1412 +
1413 + if (unexpected) {
1414 + pr_err("%s: Unexpected interrupt 0x%08x.\n",
1415 + mmc_hostname(host->mmc), unexpected);
1416 + bcm2835_mmc_dumpregs(host);
1417 + }
1418 +
1419 + return result;
1420 +}
1421 +
1422 +
1423 +static void bcm2835_mmc_ack_sdio_irq(struct mmc_host *mmc)
1424 +{
1425 + struct bcm2835_host *host = mmc_priv(mmc);
1426 + unsigned long flags;
1427 +
1428 + spin_lock_irqsave(&host->lock, flags);
1429 + if (host->flags & SDHCI_SDIO_IRQ_ENABLED)
1430 + bcm2835_mmc_enable_sdio_irq_nolock(host, true);
1431 + spin_unlock_irqrestore(&host->lock, flags);
1432 +}
1433 +
1434 +void bcm2835_mmc_set_clock(struct bcm2835_host *host, unsigned int clock)
1435 +{
1436 + int div = 0; /* Initialized for compiler warning */
1437 + int real_div = div, clk_mul = 1;
1438 + u16 clk = 0;
1439 + unsigned long timeout;
1440 + unsigned int input_clock = clock;
1441 +
1442 + if (host->overclock_50 && (clock == 50000000))
1443 + clock = host->overclock_50 * 1000000 + 999999;
1444 +
1445 + host->mmc->actual_clock = 0;
1446 +
1447 + bcm2835_mmc_writew(host, 0, SDHCI_CLOCK_CONTROL);
1448 +
1449 + if (clock == 0)
1450 + return;
1451 +
1452 + /* Version 3.00 divisors must be a multiple of 2. */
1453 + if (host->max_clk <= clock)
1454 + div = 1;
1455 + else {
1456 + for (div = 2; div < SDHCI_MAX_DIV_SPEC_300;
1457 + div += 2) {
1458 + if ((host->max_clk / div) <= clock)
1459 + break;
1460 + }
1461 + }
1462 +
1463 + real_div = div;
1464 + div >>= 1;
1465 +
1466 + if (real_div)
1467 + clock = (host->max_clk * clk_mul) / real_div;
1468 + host->mmc->actual_clock = clock;
1469 +
1470 + if ((clock > input_clock) && (clock > host->max_overclock)) {
1471 + pr_warn("%s: Overclocking to %dHz\n",
1472 + mmc_hostname(host->mmc), clock);
1473 + host->max_overclock = clock;
1474 + }
1475 +
1476 + clk |= (div & SDHCI_DIV_MASK) << SDHCI_DIVIDER_SHIFT;
1477 + clk |= ((div & SDHCI_DIV_HI_MASK) >> SDHCI_DIV_MASK_LEN)
1478 + << SDHCI_DIVIDER_HI_SHIFT;
1479 + clk |= SDHCI_CLOCK_INT_EN;
1480 + bcm2835_mmc_writew(host, clk, SDHCI_CLOCK_CONTROL);
1481 +
1482 + /* Wait max 20 ms */
1483 + timeout = 20;
1484 + while (!((clk = bcm2835_mmc_readw(host, SDHCI_CLOCK_CONTROL))
1485 + & SDHCI_CLOCK_INT_STABLE)) {
1486 + if (timeout == 0) {
1487 + pr_err("%s: Internal clock never "
1488 + "stabilised.\n", mmc_hostname(host->mmc));
1489 + bcm2835_mmc_dumpregs(host);
1490 + return;
1491 + }
1492 + timeout--;
1493 + mdelay(1);
1494 + }
1495 +
1496 + if (20-timeout > 10 && 20-timeout > host->max_delay) {
1497 + host->max_delay = 20-timeout;
1498 + pr_warn("Warning: MMC controller hung for %d ms\n", host->max_delay);
1499 + }
1500 +
1501 + clk |= SDHCI_CLOCK_CARD_EN;
1502 + bcm2835_mmc_writew(host, clk, SDHCI_CLOCK_CONTROL);
1503 +}
1504 +
1505 +static void bcm2835_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
1506 +{
1507 + struct bcm2835_host *host;
1508 + unsigned long flags;
1509 +
1510 + host = mmc_priv(mmc);
1511 +
1512 + spin_lock_irqsave(&host->lock, flags);
1513 +
1514 + WARN_ON(host->mrq != NULL);
1515 +
1516 + host->mrq = mrq;
1517 +
1518 + if (mrq->sbc && !(host->flags & SDHCI_AUTO_CMD23))
1519 + bcm2835_mmc_send_command(host, mrq->sbc);
1520 + else
1521 + bcm2835_mmc_send_command(host, mrq->cmd);
1522 +
1523 + spin_unlock_irqrestore(&host->lock, flags);
1524 +
1525 + if (!(mrq->sbc && !(host->flags & SDHCI_AUTO_CMD23)) && mrq->cmd->data && host->use_dma) {
1526 + /* DMA transfer starts now, PIO starts after interrupt */
1527 + bcm2835_mmc_transfer_dma(host);
1528 + }
1529 +}
1530 +
1531 +
1532 +static void bcm2835_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
1533 +{
1534 +
1535 + struct bcm2835_host *host = mmc_priv(mmc);
1536 + unsigned long flags;
1537 + u8 ctrl;
1538 + u16 clk, ctrl_2;
1539 +
1540 + pr_debug("bcm2835_mmc_set_ios: clock %d, pwr %d, bus_width %d, timing %d, vdd %d, drv_type %d\n",
1541 + ios->clock, ios->power_mode, ios->bus_width,
1542 + ios->timing, ios->signal_voltage, ios->drv_type);
1543 +
1544 + spin_lock_irqsave(&host->lock, flags);
1545 +
1546 + if (!ios->clock || ios->clock != host->clock) {
1547 + bcm2835_mmc_set_clock(host, ios->clock);
1548 + host->clock = ios->clock;
1549 + }
1550 +
1551 + if (host->pwr != SDHCI_POWER_330) {
1552 + host->pwr = SDHCI_POWER_330;
1553 + bcm2835_mmc_writeb(host, SDHCI_POWER_330 | SDHCI_POWER_ON, SDHCI_POWER_CONTROL);
1554 + }
1555 +
1556 + ctrl = bcm2835_mmc_readb(host, SDHCI_HOST_CONTROL);
1557 +
1558 + /* set bus width */
1559 + ctrl &= ~SDHCI_CTRL_8BITBUS;
1560 + if (ios->bus_width == MMC_BUS_WIDTH_4)
1561 + ctrl |= SDHCI_CTRL_4BITBUS;
1562 + else
1563 + ctrl &= ~SDHCI_CTRL_4BITBUS;
1564 +
1565 + ctrl &= ~SDHCI_CTRL_HISPD; /* NO_HISPD_BIT */
1566 +
1567 +
1568 + bcm2835_mmc_writeb(host, ctrl, SDHCI_HOST_CONTROL);
1569 + /*
1570 + * We only need to set Driver Strength if the
1571 + * preset value enable is not set.
1572 + */
1573 + ctrl_2 = bcm2835_mmc_readw(host, SDHCI_HOST_CONTROL2);
1574 + ctrl_2 &= ~SDHCI_CTRL_DRV_TYPE_MASK;
1575 + if (ios->drv_type == MMC_SET_DRIVER_TYPE_A)
1576 + ctrl_2 |= SDHCI_CTRL_DRV_TYPE_A;
1577 + else if (ios->drv_type == MMC_SET_DRIVER_TYPE_C)
1578 + ctrl_2 |= SDHCI_CTRL_DRV_TYPE_C;
1579 +
1580 + bcm2835_mmc_writew(host, ctrl_2, SDHCI_HOST_CONTROL2);
1581 +
1582 + /* Reset SD Clock Enable */
1583 + clk = bcm2835_mmc_readw(host, SDHCI_CLOCK_CONTROL);
1584 + clk &= ~SDHCI_CLOCK_CARD_EN;
1585 + bcm2835_mmc_writew(host, clk, SDHCI_CLOCK_CONTROL);
1586 +
1587 + /* Re-enable SD Clock */
1588 + bcm2835_mmc_set_clock(host, host->clock);
1589 + bcm2835_mmc_writeb(host, ctrl, SDHCI_HOST_CONTROL);
1590 +
1591 + spin_unlock_irqrestore(&host->lock, flags);
1592 +}
1593 +
1594 +
1595 +static struct mmc_host_ops bcm2835_ops = {
1596 + .request = bcm2835_mmc_request,
1597 + .set_ios = bcm2835_mmc_set_ios,
1598 + .enable_sdio_irq = bcm2835_mmc_enable_sdio_irq,
1599 + .ack_sdio_irq = bcm2835_mmc_ack_sdio_irq,
1600 +};
1601 +
1602 +
1603 +static void bcm2835_mmc_tasklet_finish(unsigned long param)
1604 +{
1605 + struct bcm2835_host *host;
1606 + unsigned long flags;
1607 + struct mmc_request *mrq;
1608 +
1609 + host = (struct bcm2835_host *)param;
1610 +
1611 + spin_lock_irqsave(&host->lock, flags);
1612 +
1613 + /*
1614 + * If this tasklet gets rescheduled while running, it will
1615 + * be run again afterwards but without any active request.
1616 + */
1617 + if (!host->mrq) {
1618 + spin_unlock_irqrestore(&host->lock, flags);
1619 + return;
1620 + }
1621 +
1622 + del_timer(&host->timer);
1623 +
1624 + mrq = host->mrq;
1625 +
1626 + /*
1627 + * The controller needs a reset of internal state machines
1628 + * upon error conditions.
1629 + */
1630 + if (!(host->flags & SDHCI_DEVICE_DEAD) &&
1631 + ((mrq->cmd && mrq->cmd->error) ||
1632 + (mrq->data && (mrq->data->error ||
1633 + (mrq->data->stop && mrq->data->stop->error))))) {
1634 +
1635 + spin_unlock_irqrestore(&host->lock, flags);
1636 + bcm2835_mmc_reset(host, SDHCI_RESET_CMD);
1637 + bcm2835_mmc_reset(host, SDHCI_RESET_DATA);
1638 + spin_lock_irqsave(&host->lock, flags);
1639 + }
1640 +
1641 + host->mrq = NULL;
1642 + host->cmd = NULL;
1643 + host->data = NULL;
1644 +
1645 + spin_unlock_irqrestore(&host->lock, flags);
1646 + mmc_request_done(host->mmc, mrq);
1647 +}
1648 +
1649 +
1650 +
1651 +static int bcm2835_mmc_add_host(struct bcm2835_host *host)
1652 +{
1653 + struct mmc_host *mmc = host->mmc;
1654 + struct device *dev = mmc->parent;
1655 +#ifndef FORCE_PIO
1656 + struct dma_slave_config cfg;
1657 +#endif
1658 + int ret;
1659 +
1660 + bcm2835_mmc_reset(host, SDHCI_RESET_ALL);
1661 +
1662 + host->clk_mul = 0;
1663 +
1664 + if (!mmc->f_max || mmc->f_max > host->max_clk)
1665 + mmc->f_max = host->max_clk;
1666 + mmc->f_min = host->max_clk / SDHCI_MAX_DIV_SPEC_300;
1667 +
1668 + /* SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK */
1669 + host->timeout_clk = mmc->f_max / 1000;
1670 + mmc->max_busy_timeout = (1 << 27) / host->timeout_clk;
1671 +
1672 + /* host controller capabilities */
1673 + mmc->caps |= MMC_CAP_CMD23 | MMC_CAP_NEEDS_POLL |
1674 + MMC_CAP_SDIO_IRQ | MMC_CAP_SD_HIGHSPEED |
1675 + MMC_CAP_MMC_HIGHSPEED;
1676 +
1677 + mmc->caps2 |= MMC_CAP2_SDIO_IRQ_NOTHREAD;
1678 +
1679 + host->flags = SDHCI_AUTO_CMD23;
1680 +
1681 + dev_info(dev, "mmc_debug:%x mmc_debug2:%x\n", mmc_debug, mmc_debug2);
1682 +#ifdef FORCE_PIO
1683 + dev_info(dev, "Forcing PIO mode\n");
1684 + host->have_dma = false;
1685 +#else
1686 + if (IS_ERR_OR_NULL(host->dma_chan_rxtx)) {
1687 + dev_err(dev, "%s: Unable to initialise DMA channel. Falling back to PIO\n",
1688 + DRIVER_NAME);
1689 + host->have_dma = false;
1690 + } else {
1691 + dev_info(dev, "DMA channel allocated");
1692 +
1693 + cfg.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
1694 + cfg.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
1695 + cfg.slave_id = 11; /* DREQ channel */
1696 +
1697 + /* Validate the slave configurations */
1698 +
1699 + cfg.direction = DMA_MEM_TO_DEV;
1700 + cfg.src_addr = 0;
1701 + cfg.dst_addr = host->bus_addr + SDHCI_BUFFER;
1702 +
1703 + ret = dmaengine_slave_config(host->dma_chan_rxtx, &cfg);
1704 +
1705 + if (ret == 0) {
1706 + host->dma_cfg_tx = cfg;
1707 +
1708 + cfg.direction = DMA_DEV_TO_MEM;
1709 + cfg.src_addr = host->bus_addr + SDHCI_BUFFER;
1710 + cfg.dst_addr = 0;
1711 +
1712 + ret = dmaengine_slave_config(host->dma_chan_rxtx, &cfg);
1713 + }
1714 +
1715 + if (ret == 0) {
1716 + host->dma_cfg_rx = cfg;
1717 +
1718 + host->have_dma = true;
1719 + } else {
1720 + pr_err("%s: unable to configure DMA channel. "
1721 + "Falling back to PIO\n",
1722 + mmc_hostname(mmc));
1723 + dma_release_channel(host->dma_chan_rxtx);
1724 + host->dma_chan_rxtx = NULL;
1725 + host->have_dma = false;
1726 + }
1727 + }
1728 +#endif
1729 + mmc->max_segs = 128;
1730 + if (swiotlb_max_segment())
1731 + mmc->max_req_size = (1 << IO_TLB_SHIFT) * IO_TLB_SEGSIZE;
1732 + else
1733 + mmc->max_req_size = 524288;
1734 + mmc->max_seg_size = mmc->max_req_size;
1735 + mmc->max_blk_size = 512;
1736 + mmc->max_blk_count = 65535;
1737 +
1738 + /* report supported voltage ranges */
1739 + mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
1740 +
1741 + tasklet_init(&host->finish_tasklet,
1742 + bcm2835_mmc_tasklet_finish, (unsigned long)host);
1743 +
1744 + timer_setup(&host->timer, bcm2835_mmc_timeout_timer, 0);
1745 + init_waitqueue_head(&host->buf_ready_int);
1746 +
1747 + bcm2835_mmc_init(host, 0);
1748 + ret = request_irq(host->irq, bcm2835_mmc_irq, IRQF_SHARED,
1749 + mmc_hostname(mmc), host);
1750 + if (ret) {
1751 + dev_err(dev, "Failed to request IRQ %d: %d\n", host->irq, ret);
1752 + goto untasklet;
1753 + }
1754 +
1755 + ret = mmc_add_host(mmc);
1756 + if (ret) {
1757 + dev_err(dev, "could not add MMC host\n");
1758 + goto free_irq;
1759 + }
1760 +
1761 + return 0;
1762 +
1763 +free_irq:
1764 + free_irq(host->irq, host);
1765 +untasklet:
1766 + tasklet_kill(&host->finish_tasklet);
1767 +
1768 + return ret;
1769 +}
1770 +
1771 +static int bcm2835_mmc_probe(struct platform_device *pdev)
1772 +{
1773 + struct device *dev = &pdev->dev;
1774 + struct device_node *node = dev->of_node;
1775 + struct clk *clk;
1776 + struct resource *iomem;
1777 + struct bcm2835_host *host;
1778 + struct mmc_host *mmc;
1779 + const __be32 *addr;
1780 + int ret;
1781 +
1782 + mmc = mmc_alloc_host(sizeof(*host), dev);
1783 + if (!mmc)
1784 + return -ENOMEM;
1785 +
1786 + mmc->ops = &bcm2835_ops;
1787 + host = mmc_priv(mmc);
1788 + host->mmc = mmc;
1789 + host->timeout = msecs_to_jiffies(1000);
1790 + spin_lock_init(&host->lock);
1791 +
1792 + iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1793 + host->ioaddr = devm_ioremap_resource(dev, iomem);
1794 + if (IS_ERR(host->ioaddr)) {
1795 + ret = PTR_ERR(host->ioaddr);
1796 + goto err;
1797 + }
1798 +
1799 + addr = of_get_address(node, 0, NULL, NULL);
1800 + if (!addr) {
1801 + dev_err(dev, "could not get DMA-register address\n");
1802 + ret = -ENODEV;
1803 + goto err;
1804 + }
1805 + host->bus_addr = be32_to_cpup(addr);
1806 + pr_debug(" - ioaddr %lx, iomem->start %lx, bus_addr %lx\n",
1807 + (unsigned long)host->ioaddr,
1808 + (unsigned long)iomem->start,
1809 + (unsigned long)host->bus_addr);
1810 +
1811 +#ifndef FORCE_PIO
1812 + if (node) {
1813 + host->dma_chan_rxtx = dma_request_slave_channel(dev, "rx-tx");
1814 + if (!host->dma_chan_rxtx)
1815 + host->dma_chan_rxtx =
1816 + dma_request_slave_channel(dev, "tx");
1817 + if (!host->dma_chan_rxtx)
1818 + host->dma_chan_rxtx =
1819 + dma_request_slave_channel(dev, "rx");
1820 + } else {
1821 + dma_cap_mask_t mask;
1822 +
1823 + dma_cap_zero(mask);
1824 + /* we don't care about the channel, any would work */
1825 + dma_cap_set(DMA_SLAVE, mask);
1826 + host->dma_chan_rxtx = dma_request_channel(mask, NULL, NULL);
1827 + }
1828 +#endif
1829 + clk = devm_clk_get(dev, NULL);
1830 + if (IS_ERR(clk)) {
1831 + ret = PTR_ERR(clk);
1832 + if (ret == -EPROBE_DEFER)
1833 + dev_info(dev, "could not get clk, deferring probe\n");
1834 + else
1835 + dev_err(dev, "could not get clk\n");
1836 + goto err;
1837 + }
1838 +
1839 + host->max_clk = clk_get_rate(clk);
1840 +
1841 + host->irq = platform_get_irq(pdev, 0);
1842 + if (host->irq <= 0) {
1843 + dev_err(dev, "get IRQ failed\n");
1844 + ret = -EINVAL;
1845 + goto err;
1846 + }
1847 +
1848 + if (node) {
1849 + mmc_of_parse(mmc);
1850 +
1851 + /* Read any custom properties */
1852 + of_property_read_u32(node,
1853 + "brcm,overclock-50",
1854 + &host->overclock_50);
1855 + } else {
1856 + mmc->caps |= MMC_CAP_4_BIT_DATA;
1857 + }
1858 +
1859 + ret = bcm2835_mmc_add_host(host);
1860 + if (ret)
1861 + goto err;
1862 +
1863 + platform_set_drvdata(pdev, host);
1864 +
1865 + return 0;
1866 +err:
1867 + if (host->dma_chan_rxtx)
1868 + dma_release_channel(host->dma_chan_rxtx);
1869 + mmc_free_host(mmc);
1870 +
1871 + return ret;
1872 +}
1873 +
1874 +static int bcm2835_mmc_remove(struct platform_device *pdev)
1875 +{
1876 + struct bcm2835_host *host = platform_get_drvdata(pdev);
1877 + unsigned long flags;
1878 + int dead;
1879 + u32 scratch;
1880 +
1881 + dead = 0;
1882 + scratch = bcm2835_mmc_readl(host, SDHCI_INT_STATUS);
1883 + if (scratch == (u32)-1)
1884 + dead = 1;
1885 +
1886 +
1887 + if (dead) {
1888 + spin_lock_irqsave(&host->lock, flags);
1889 +
1890 + host->flags |= SDHCI_DEVICE_DEAD;
1891 +
1892 + if (host->mrq) {
1893 + pr_err("%s: Controller removed during "
1894 + " transfer!\n", mmc_hostname(host->mmc));
1895 +
1896 + host->mrq->cmd->error = -ENOMEDIUM;
1897 + tasklet_schedule(&host->finish_tasklet);
1898 + }
1899 +
1900 + spin_unlock_irqrestore(&host->lock, flags);
1901 + }
1902 +
1903 + mmc_remove_host(host->mmc);
1904 +
1905 + if (!dead)
1906 + bcm2835_mmc_reset(host, SDHCI_RESET_ALL);
1907 +
1908 + free_irq(host->irq, host);
1909 +
1910 + del_timer_sync(&host->timer);
1911 +
1912 + tasklet_kill(&host->finish_tasklet);
1913 +
1914 + if (host->dma_chan_rxtx)
1915 + dma_release_channel(host->dma_chan_rxtx);
1916 +
1917 + mmc_free_host(host->mmc);
1918 +
1919 + return 0;
1920 +}
1921 +
1922 +
1923 +static const struct of_device_id bcm2835_mmc_match[] = {
1924 + { .compatible = "brcm,bcm2835-mmc" },
1925 + { }
1926 +};
1927 +MODULE_DEVICE_TABLE(of, bcm2835_mmc_match);
1928 +
1929 +
1930 +
1931 +static struct platform_driver bcm2835_mmc_driver = {
1932 + .probe = bcm2835_mmc_probe,
1933 + .remove = bcm2835_mmc_remove,
1934 + .driver = {
1935 + .name = DRIVER_NAME,
1936 + .owner = THIS_MODULE,
1937 + .of_match_table = bcm2835_mmc_match,
1938 + },
1939 +};
1940 +module_platform_driver(bcm2835_mmc_driver);
1941 +
1942 +module_param(mmc_debug, uint, 0644);
1943 +module_param(mmc_debug2, uint, 0644);
1944 +MODULE_ALIAS("platform:mmc-bcm2835");
1945 +MODULE_DESCRIPTION("BCM2835 SDHCI driver");
1946 +MODULE_LICENSE("GPL v2");
1947 +MODULE_AUTHOR("Gellert Weisz");
1948 --- a/drivers/mmc/host/sdhci-iproc.c
1949 +++ b/drivers/mmc/host/sdhci-iproc.c
1950 @@ -173,6 +173,17 @@ static unsigned int sdhci_iproc_get_max_
1951 return pltfm_host->clock;
1952 }
1953
1954 +static void sdhci_iproc_set_power(struct sdhci_host *host, unsigned char mode,
1955 + unsigned short vdd)
1956 +{
1957 + if (!IS_ERR(host->mmc->supply.vmmc)) {
1958 + struct mmc_host *mmc = host->mmc;
1959 +
1960 + mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, vdd);
1961 + }
1962 + sdhci_set_power_noreg(host, mode, vdd);
1963 +}
1964 +
1965 /*
1966 * There is a known bug on BCM2711's SDHCI core integration where the
1967 * controller will hang when the difference between the core clock and the bus
1968 @@ -207,6 +218,7 @@ static const struct sdhci_ops sdhci_ipro
1969 .write_b = sdhci_iproc_writeb,
1970 .set_clock = sdhci_set_clock,
1971 .get_max_clock = sdhci_iproc_get_max_clock,
1972 + .set_power = sdhci_iproc_set_power,
1973 .set_bus_width = sdhci_set_bus_width,
1974 .reset = sdhci_reset,
1975 .set_uhs_signaling = sdhci_set_uhs_signaling,
1976 --- a/drivers/mmc/host/sdhci.c
1977 +++ b/drivers/mmc/host/sdhci.c
1978 @@ -40,7 +40,7 @@
1979 pr_debug("%s: " DRIVER_NAME ": " f, mmc_hostname(host->mmc), ## x)
1980
1981 #define SDHCI_DUMP(f, x...) \
1982 - pr_err("%s: " DRIVER_NAME ": " f, mmc_hostname(host->mmc), ## x)
1983 + pr_debug("%s: " DRIVER_NAME ": " f, mmc_hostname(host->mmc), ## x)
1984
1985 #define MAX_TUNING_LOOP 40
1986
1987 @@ -3143,7 +3143,7 @@ static void sdhci_timeout_timer(struct t
1988 spin_lock_irqsave(&host->lock, flags);
1989
1990 if (host->cmd && !sdhci_data_line_cmd(host->cmd)) {
1991 - pr_err("%s: Timeout waiting for hardware cmd interrupt.\n",
1992 + pr_debug("%s: Timeout waiting for hardware cmd interrupt.\n",
1993 mmc_hostname(host->mmc));
1994 sdhci_dumpregs(host);
1995
1996 @@ -3165,7 +3165,7 @@ static void sdhci_timeout_data_timer(str
1997
1998 if (host->data || host->data_cmd ||
1999 (host->cmd && sdhci_data_line_cmd(host->cmd))) {
2000 - pr_err("%s: Timeout waiting for hardware interrupt.\n",
2001 + pr_debug("%s: Timeout waiting for hardware interrupt.\n",
2002 mmc_hostname(host->mmc));
2003 sdhci_dumpregs(host);
2004
2005 --- a/include/linux/mmc/card.h
2006 +++ b/include/linux/mmc/card.h
2007 @@ -293,6 +293,8 @@ struct mmc_card {
2008 #define MMC_QUIRK_TRIM_BROKEN (1<<12) /* Skip trim */
2009 #define MMC_QUIRK_BROKEN_HPI (1<<13) /* Disable broken HPI support */
2010
2011 +#define MMC_QUIRK_ERASE_BROKEN (1<<31) /* Skip erase */
2012 +
2013 bool reenable_cmdq; /* Re-enable Command Queue */
2014
2015 unsigned int erase_size; /* erase size in sectors */
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