target/linux/brcm2708/patches-3.14/0035-BCM2708-Extend-mach-header.patch

   1 From 824d59b5066dff20761ecedebd4fbce27f301c70 Mon Sep 17 00:00:00 2001
   2 From: Florian Meier <florian.meier@koalo.de>
   3 Date: Fri, 22 Nov 2013 14:37:51 +0100
   4 Subject: [PATCH 35/54] BCM2708: Extend mach header
   5
   6 Extend the headers of the mach-bcm2708
   7 in order to support I2S and DMA engine.
   8
   9 Signed-off-by: Florian Meier <florian.meier@koalo.de>
  10 ---
  11  arch/arm/mach-bcm2708/include/mach/dma.h      | 2 ++
  12  arch/arm/mach-bcm2708/include/mach/platform.h | 2 ++
  13  2 files changed, 4 insertions(+)
  14
  15 --- a/arch/arm/mach-bcm2708/include/mach/dma.h
  16 +++ b/arch/arm/mach-bcm2708/include/mach/dma.h
  17 @@ -45,6 +45,8 @@
  18  #define BCM2708_DMA_ADDR       0x04
  19  /* the current control block appears in the following registers - read only */
  20  #define BCM2708_DMA_INFO       0x08
  21 +#define BCM2708_DMA_SOURCE_AD  0x0c
  22 +#define BCM2708_DMA_DEST_AD    0x10
  23  #define BCM2708_DMA_NEXTCB     0x1C
  24  #define BCM2708_DMA_DEBUG      0x20
  25
  26 --- a/arch/arm/mach-bcm2708/include/mach/platform.h
  27 +++ b/arch/arm/mach-bcm2708/include/mach/platform.h
  28 @@ -62,10 +62,12 @@
  29  #define DMA_BASE                (BCM2708_PERI_BASE + 0x7000)   /* DMA controller */
  30  #define ARM_BASE                 (BCM2708_PERI_BASE + 0xB000)   /* BCM2708 ARM control block */
  31  #define PM_BASE                         (BCM2708_PERI_BASE + 0x100000) /* Power Management, Reset controller and Watchdog registers */
  32 +#define PCM_CLOCK_BASE           (BCM2708_PERI_BASE + 0x101098) /* PCM Clock */
  33  #define RNG_BASE                 (BCM2708_PERI_BASE + 0x104000) /* Hardware RNG */
  34  #define GPIO_BASE                (BCM2708_PERI_BASE + 0x200000) /* GPIO */
  35  #define UART0_BASE               (BCM2708_PERI_BASE + 0x201000)        /* Uart 0 */
  36  #define MMCI0_BASE               (BCM2708_PERI_BASE + 0x202000) /* MMC interface */
  37 +#define I2S_BASE                 (BCM2708_PERI_BASE + 0x203000) /* I2S */
  38  #define SPI0_BASE               (BCM2708_PERI_BASE + 0x204000) /* SPI0 */
  39  #define BSC0_BASE               (BCM2708_PERI_BASE + 0x205000) /* BSC0 I2C/TWI */
  40  #define UART1_BASE               (BCM2708_PERI_BASE + 0x215000) /* Uart 1 */