target/linux/brcm2708/patches-3.18/0045-dwc_otg-Fix-various-issues-with-root-port-and-transa.patch

   1 From 8eb79690a70cce34e9a1c35cf165716f78301d2e Mon Sep 17 00:00:00 2001
   2 From: P33M <P33M@github.com>
   3 Date: Fri, 20 Jun 2014 16:03:12 +0100
   4 Subject: [PATCH 045/114] dwc_otg: Fix various issues with root port and
   5  transaction errors
   6
   7 Process the host port interrupts correctly (and don't trample them).
   8 Root port hotplug now functional again.
   9
  10 Fix a few thinkos with the transaction error passthrough for fiq_fsm.
  11 ---
  12  drivers/usb/host/dwc_otg/dwc_otg_cil_intr.c | 7 +++----
  13  drivers/usb/host/dwc_otg/dwc_otg_fiq_fsm.c  | 6 +++++-
  14  drivers/usb/host/dwc_otg/dwc_otg_hcd_intr.c | 2 +-
  15  3 files changed, 9 insertions(+), 6 deletions(-)
  16
  17 --- a/drivers/usb/host/dwc_otg/dwc_otg_cil_intr.c
  18 +++ b/drivers/usb/host/dwc_otg/dwc_otg_cil_intr.c
  19 @@ -1348,10 +1348,9 @@ static inline uint32_t dwc_otg_read_comm
  20                 local_fiq_disable();
  21                 /* Pull in the interrupts that the FIQ has masked */
  22                 gintmsk.d32 |= ~(hcd->fiq_state->gintmsk_saved.d32);
  23 +               gintmsk.d32 |= gintmsk_common.d32;
  24                 /* for the upstairs function to reenable - have to read it here in case FIQ triggers again */
  25 -               reenable_gintmsk->d32 |= gintmsk.d32;
  26 -               reenable_gintmsk->d32 |= ~(hcd->fiq_state->gintmsk_saved.d32);
  27 -               reenable_gintmsk->d32 &= gintmsk_common.d32;
  28 +               reenable_gintmsk->d32 = gintmsk.d32;
  29                 local_fiq_enable();
  30         }
  31
  32 @@ -1535,7 +1534,7 @@ int32_t dwc_otg_handle_common_intr(void
  33  //             fiq_print(FIQDBG_INT, otg_dev->hcd->fiq_state, "CILOUT %1d", retval);
  34  //             fiq_print(FIQDBG_INT, otg_dev->hcd->fiq_state, "%08x", gintsts.d32);
  35  //             fiq_print(FIQDBG_INT, otg_dev->hcd->fiq_state, "%08x", gintmsk_reenable.d32);
  36 -               if (retval) {
  37 +               if (retval && fiq_enable) {
  38                         DWC_WRITE_REG32(&core_if->core_global_regs->gintmsk, gintmsk_reenable.d32);
  39                 }
  40
  41 --- a/drivers/usb/host/dwc_otg/dwc_otg_fiq_fsm.c
  42 +++ b/drivers/usb/host/dwc_otg/dwc_otg_fiq_fsm.c
  43 @@ -696,7 +696,11 @@ static int notrace noinline fiq_fsm_do_h
  44                 fiq_print(FIQDBG_ERR, state, "ERRST %02d", n);
  45                 if (hcint_probe.b.nak || hcint_probe.b.ack || hcint_probe.b.datatglerr) {
  46                         fiq_print(FIQDBG_ERR, state, "RESET %02d", n);
  47 -                       st->nr_errors = 0;
  48 +                       /* In some random cases we can get a NAK interrupt coincident with a Xacterr
  49 +                        * interrupt, after the device has disappeared.
  50 +                        */
  51 +                       if (!hcint.b.xacterr)
  52 +                               st->nr_errors = 0;
  53                         hcintmsk.b.nak = 0;
  54                         hcintmsk.b.ack = 0;
  55                         hcintmsk.b.datatglerr = 0;
  56 --- a/drivers/usb/host/dwc_otg/dwc_otg_hcd_intr.c
  57 +++ b/drivers/usb/host/dwc_otg/dwc_otg_hcd_intr.c
  58 @@ -2619,7 +2619,7 @@ int32_t dwc_otg_hcd_handle_hc_n_intr(dwc
  59                         case FIQ_PASSTHROUGH_ERRORSTATE:
  60                                 /* Hook into the error count */
  61                                 fiq_print(FIQDBG_ERR, dwc_otg_hcd->fiq_state, "HCDERR%02d", num);
  62 -                               if (dwc_otg_hcd->fiq_state->channel[num].nr_errors) {
  63 +                               if (!dwc_otg_hcd->fiq_state->channel[num].nr_errors) {
  64                                         qtd->error_count = 0;
  65                                         fiq_print(FIQDBG_ERR, dwc_otg_hcd->fiq_state, "RESET   ");
  66                                 }