target/linux/brcm2708/patches-4.1/0148-pinctrl-bcm2835-Clear-the-event-latch-register-when-.patch

   1 From 2a2dc4e5e4946e75b98c71eacc3660e913dbd302 Mon Sep 17 00:00:00 2001
   2 From: Jonathan Bell <jonathan@raspberrypi.org>
   3 Date: Tue, 30 Jun 2015 12:35:39 +0100
   4 Subject: [PATCH 148/148] pinctrl: bcm2835: Clear the event latch register when
   5  disabling interrupts
   6
   7 It's possible to hit a race condition if interrupts are generated on a GPIO
   8 pin when the IRQ line in question is being disabled.
   9
  10 If the interrupt is freed, bcm2835_gpio_irq_disable() is called which
  11 disables the event generation sources (edge, level). If an event occurred
  12 between the last disabling of hard IRQs and the write to the event
  13 source registers, a bit would be set in the GPIO event detect register
  14 (GPEDSn) which goes unacknowledged by bcm2835_gpio_irq_handler()
  15 so Linux complains loudly.
  16
  17 There is no per-GPIO mask register, so when disabling GPIO interrupts
  18 write 1 to the relevant bit in GPEDSn to clear out any stale events.
  19
  20 Signed-off-by: Jonathan Bell <jonathan@raspberrypi.org>
  21 Acked-by: Stephen Warren <swarren@wwwdotorg.org>
  22 Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
  23 ---
  24  drivers/pinctrl/bcm/pinctrl-bcm2835.c | 2 ++
  25  1 file changed, 2 insertions(+)
  26
  27 --- a/drivers/pinctrl/bcm/pinctrl-bcm2835.c
  28 +++ b/drivers/pinctrl/bcm/pinctrl-bcm2835.c
  29 @@ -503,6 +503,8 @@ static void bcm2835_gpio_irq_disable(str
  30
  31         spin_lock_irqsave(&pc->irq_lock[bank], flags);
  32         bcm2835_gpio_irq_config(pc, gpio, false);
  33 +       /* Clear events that were latched prior to clearing event sources */
  34 +       bcm2835_gpio_set_bit(pc, GPEDS0, gpio);
  35         clear_bit(offset, &pc->enabled_irq_map[bank]);
  36         spin_unlock_irqrestore(&pc->irq_lock[bank], flags);
  37  }