brcm2708-gpu-fw: update to latest version
[openwrt/openwrt.git] / target / linux / brcm2708 / patches-4.4 / 0471-net-ethernet-enc28j60-add-device-tree-support.patch
1 From 55d0ce46f962a768dd358ca26158c8c195988645 Mon Sep 17 00:00:00 2001
2 From: Michael Heimpold <mhei@heimpold.de>
3 Date: Thu, 28 Apr 2016 22:06:15 +0200
4 Subject: [PATCH] net: ethernet: enc28j60: add device tree support
5
6 (Upstream commit 2dd355a007e44960ec049c75920ddb6778fec9ee)
7
8 The following patch adds the required match table for device tree support
9 (and while at, fix the indent). It's also possible to specify the
10 MAC address in the DT blob.
11
12 Also add the corresponding binding documentation file.
13
14 Signed-off-by: Michael Heimpold <mhei@heimpold.de>
15 Signed-off-by: David S. Miller <davem@davemloft.net>
16 ---
17 .../devicetree/bindings/net/microchip,enc28j60.txt | 59 ++++++++++++++++++++++
18 drivers/net/ethernet/microchip/enc28j60.c | 21 +++++---
19 2 files changed, 73 insertions(+), 7 deletions(-)
20 create mode 100644 Documentation/devicetree/bindings/net/microchip,enc28j60.txt
21
22 --- /dev/null
23 +++ b/Documentation/devicetree/bindings/net/microchip,enc28j60.txt
24 @@ -0,0 +1,59 @@
25 +* Microchip ENC28J60
26 +
27 +This is a standalone 10 MBit ethernet controller with SPI interface.
28 +
29 +For each device connected to a SPI bus, define a child node within
30 +the SPI master node.
31 +
32 +Required properties:
33 +- compatible: Should be "microchip,enc28j60"
34 +- reg: Specify the SPI chip select the ENC28J60 is wired to
35 +- interrupt-parent: Specify the phandle of the source interrupt, see interrupt
36 + binding documentation for details. Usually this is the GPIO bank
37 + the interrupt line is wired to.
38 +- interrupts: Specify the interrupt index within the interrupt controller (referred
39 + to above in interrupt-parent) and interrupt type. The ENC28J60 natively
40 + generates falling edge interrupts, however, additional board logic
41 + might invert the signal.
42 +- pinctrl-names: List of assigned state names, see pinctrl binding documentation.
43 +- pinctrl-0: List of phandles to configure the GPIO pin used as interrupt line,
44 + see also generic and your platform specific pinctrl binding
45 + documentation.
46 +
47 +Optional properties:
48 +- spi-max-frequency: Maximum frequency of the SPI bus when accessing the ENC28J60.
49 + According to the ENC28J80 datasheet, the chip allows a maximum of 20 MHz, however,
50 + board designs may need to limit this value.
51 +- local-mac-address: See ethernet.txt in the same directory.
52 +
53 +
54 +Example (for NXP i.MX28 with pin control stuff for GPIO irq):
55 +
56 + ssp2: ssp@80014000 {
57 + compatible = "fsl,imx28-spi";
58 + pinctrl-names = "default";
59 + pinctrl-0 = <&spi2_pins_b &spi2_sck_cfg>;
60 + status = "okay";
61 +
62 + enc28j60: ethernet@0 {
63 + compatible = "microchip,enc28j60";
64 + pinctrl-names = "default";
65 + pinctrl-0 = <&enc28j60_pins>;
66 + reg = <0>;
67 + interrupt-parent = <&gpio3>;
68 + interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
69 + spi-max-frequency = <12000000>;
70 + };
71 + };
72 +
73 + pinctrl@80018000 {
74 + enc28j60_pins: enc28j60_pins@0 {
75 + reg = <0>;
76 + fsl,pinmux-ids = <
77 + MX28_PAD_AUART0_RTS__GPIO_3_3 /* Interrupt */
78 + >;
79 + fsl,drive-strength = <MXS_DRIVE_4mA>;
80 + fsl,voltage = <MXS_VOLTAGE_HIGH>;
81 + fsl,pull-up = <MXS_PULL_DISABLE>;
82 + };
83 + };
84 --- a/drivers/net/ethernet/microchip/enc28j60.c
85 +++ b/drivers/net/ethernet/microchip/enc28j60.c
86 @@ -28,11 +28,12 @@
87 #include <linux/skbuff.h>
88 #include <linux/delay.h>
89 #include <linux/spi/spi.h>
90 +#include <linux/of_net.h>
91
92 #include "enc28j60_hw.h"
93
94 #define DRV_NAME "enc28j60"
95 -#define DRV_VERSION "1.01"
96 +#define DRV_VERSION "1.02"
97
98 #define SPI_OPLEN 1
99
100 @@ -1544,6 +1545,7 @@ static int enc28j60_probe(struct spi_dev
101 {
102 struct net_device *dev;
103 struct enc28j60_net *priv;
104 + const void *macaddr;
105 int ret = 0;
106
107 if (netif_msg_drv(&debug))
108 @@ -1575,7 +1577,12 @@ static int enc28j60_probe(struct spi_dev
109 ret = -EIO;
110 goto error_irq;
111 }
112 - eth_hw_addr_random(dev);
113 +
114 + macaddr = of_get_mac_address(spi->dev.of_node);
115 + if (macaddr)
116 + ether_addr_copy(dev->dev_addr, macaddr);
117 + else
118 + eth_hw_addr_random(dev);
119 enc28j60_set_hw_macaddr(dev);
120
121 /* Board setup must set the relevant edge trigger type;
122 @@ -1630,16 +1637,16 @@ static int enc28j60_remove(struct spi_de
123 return 0;
124 }
125
126 -static const struct of_device_id enc28j60_of_match[] = {
127 - { .compatible = "microchip,enc28j60", },
128 +static const struct of_device_id enc28j60_dt_ids[] = {
129 + { .compatible = "microchip,enc28j60" },
130 { /* sentinel */ }
131 };
132 -MODULE_DEVICE_TABLE(of, enc28j60_of_match);
133 +MODULE_DEVICE_TABLE(of, enc28j60_dt_ids);
134
135 static struct spi_driver enc28j60_driver = {
136 .driver = {
137 - .name = DRV_NAME,
138 - .of_match_table = enc28j60_of_match,
139 + .name = DRV_NAME,
140 + .of_match_table = enc28j60_dt_ids,
141 },
142 .probe = enc28j60_probe,
143 .remove = enc28j60_remove,