ssb: Update to latest upstream version of ssb.
[openwrt/openwrt.git] / target / linux / brcm47xx / files / arch / mips / bcm947xx / setup.c
1 /*
2 * Copyright (C) 2004 Florian Schirmer (jolt@tuxbox.org)
3 * Copyright (C) 2005 Waldemar Brodkorb <wbx@openwrt.org>
4 * Copyright (C) 2006 Felix Fietkau <nbd@openwrt.org>
5 * Copyright (C) 2006 Michael Buesch
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 *
12 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
13 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
14 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
15 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
16 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
17 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
18 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
19 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
20 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
21 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
22 *
23 * You should have received a copy of the GNU General Public License along
24 * with this program; if not, write to the Free Software Foundation, Inc.,
25 * 675 Mass Ave, Cambridge, MA 02139, USA.
26 */
27
28 #include <linux/init.h>
29 #include <linux/types.h>
30 #include <linux/tty.h>
31 #include <linux/serial.h>
32 #include <linux/serial_core.h>
33 #include <linux/serial_reg.h>
34 #include <linux/serial_8250.h>
35 #include <asm/bootinfo.h>
36 #include <asm/time.h>
37 #include <asm/reboot.h>
38 #include <asm/cfe.h>
39 #include <linux/pm.h>
40 #include <linux/ssb/ssb.h>
41
42 #include <nvram.h>
43
44 extern void bcm47xx_pci_init(void);
45 extern void bcm47xx_time_init(void);
46
47 struct ssb_bus ssb;
48
49 static void bcm47xx_machine_restart(char *command)
50 {
51 printk(KERN_ALERT "Please stand by while rebooting the system...\n");
52 local_irq_disable();
53 /* CFE has a reboot callback, but that does not work.
54 * Oopses with: Reserved instruction in kernel code.
55 */
56
57 /* Set the watchdog timer to reset immediately */
58 ssb_chipco_watchdog_timer_set(&ssb.chipco, 1);
59 while (1)
60 cpu_relax();
61 }
62
63 static void bcm47xx_machine_halt(void)
64 {
65 /* Disable interrupts and watchdog and spin forever */
66 local_irq_disable();
67 ssb_chipco_watchdog_timer_set(&ssb.chipco, 0);
68 while (1)
69 cpu_relax();
70 }
71
72 static void e_aton(char *str, char *dest)
73 {
74 int i = 0;
75
76 if (str == NULL) {
77 memset(dest, 0, 6);
78 return;
79 }
80
81 for (;;) {
82 dest[i++] = (char) simple_strtoul(str, NULL, 16);
83 str += 2;
84 if (!*str++ || i == 6)
85 break;
86 }
87 }
88
89 static void bcm47xx_fill_sprom(struct ssb_sprom *sprom)
90 {
91 char *s;
92
93 memset(sprom, 0xFF, sizeof(struct ssb_sprom));
94
95 sprom->revision = 1;
96 if ((s = nvram_get("il0macaddr")))
97 e_aton(s, sprom->il0mac);
98 if ((s = nvram_get("et0macaddr")))
99 e_aton(s, sprom->et0mac);
100 if ((s = nvram_get("et1macaddr")))
101 e_aton(s, sprom->et1mac);
102 if ((s = nvram_get("et0phyaddr")))
103 sprom->et0phyaddr = simple_strtoul(s, NULL, 0);
104 if ((s = nvram_get("et1phyaddr")))
105 sprom->et1phyaddr = simple_strtoul(s, NULL, 0);
106 if ((s = nvram_get("et0mdcport")))
107 sprom->et0mdcport = !!simple_strtoul(s, NULL, 10);
108 if ((s = nvram_get("et1mdcport")))
109 sprom->et1mdcport = !!simple_strtoul(s, NULL, 10);
110 if ((s = nvram_get("pa0b0")))
111 sprom->pa0b0 = simple_strtoul(s, NULL, 0);
112 if ((s = nvram_get("pa0b1")))
113 sprom->pa0b1 = simple_strtoul(s, NULL, 0);
114 if ((s = nvram_get("pa0b2")))
115 sprom->pa0b2 = simple_strtoul(s, NULL, 0);
116 if ((s = nvram_get("pa1b0")))
117 sprom->pa1b0 = simple_strtoul(s, NULL, 0);
118 if ((s = nvram_get("pa1b1")))
119 sprom->pa1b1 = simple_strtoul(s, NULL, 0);
120 if ((s = nvram_get("pa1b2")))
121 sprom->pa1b2 = simple_strtoul(s, NULL, 0);
122 if ((s = nvram_get("wl0gpio0")))
123 sprom->gpio0 = simple_strtoul(s, NULL, 0);
124 if ((s = nvram_get("wl0gpio1")))
125 sprom->gpio1 = simple_strtoul(s, NULL, 0);
126 if ((s = nvram_get("wl0gpio2")))
127 sprom->gpio2 = simple_strtoul(s, NULL, 0);
128 if ((s = nvram_get("wl0gpio3")))
129 sprom->gpio3 = simple_strtoul(s, NULL, 0);
130 if ((s = nvram_get("pa0maxpwr")))
131 sprom->maxpwr_bg = simple_strtoul(s, NULL, 0);
132 if ((s = nvram_get("pa1maxpwr")))
133 sprom->maxpwr_a = simple_strtoul(s, NULL, 0);
134 if ((s = nvram_get("pa0itssit")))
135 sprom->itssi_bg = simple_strtoul(s, NULL, 0);
136 if ((s = nvram_get("pa1itssit")))
137 sprom->itssi_a = simple_strtoul(s, NULL, 0);
138 sprom->boardflags_lo = 0;
139 if ((s = nvram_get("boardflags")))
140 sprom->boardflags_lo = simple_strtoul(s, NULL, 0);
141 sprom->boardflags_hi = 0;
142 if ((s = nvram_get("boardflags2")))
143 sprom->boardflags_hi = simple_strtoul(s, NULL, 0);
144 }
145
146 static int bcm47xx_get_invariants(struct ssb_bus *bus, struct ssb_init_invariants *iv)
147 {
148 char *s;
149
150 iv->boardinfo.vendor = SSB_BOARDVENDOR_BCM;
151 if ((s = nvram_get("boardtype")))
152 iv->boardinfo.type = (u16)simple_strtoul(s, NULL, 0);
153 if ((s = nvram_get("boardrev")))
154 iv->boardinfo.rev = (u16)simple_strtoul(s, NULL, 0);
155
156 bcm47xx_fill_sprom(&iv->sprom);
157
158 return 0;
159 }
160
161 void __init plat_mem_setup(void)
162 {
163 int i, err;
164 char *s;
165 struct ssb_mipscore *mcore;
166
167 err = ssb_bus_ssbbus_register(&ssb, SSB_ENUM_BASE, bcm47xx_get_invariants);
168 if (err) {
169 const char *msg = "Failed to initialize SSB bus (err %d)\n";
170 cfe_printk(msg, err); /* Make sure the message gets out of the box. */
171 panic(msg, err);
172 }
173 mcore = &ssb.mipscore;
174
175 s = nvram_get("kernel_args");
176 if (s && !strncmp(s, "console=ttyS1", 13)) {
177 struct ssb_serial_port port;
178
179 cfe_printk("Swapping serial ports!\n");
180 /* swap serial ports */
181 memcpy(&port, &mcore->serial_ports[0], sizeof(port));
182 memcpy(&mcore->serial_ports[0], &mcore->serial_ports[1], sizeof(port));
183 memcpy(&mcore->serial_ports[1], &port, sizeof(port));
184 }
185
186 for (i = 0; i < mcore->nr_serial_ports; i++) {
187 struct ssb_serial_port *port = &(mcore->serial_ports[i]);
188 struct uart_port s;
189
190 memset(&s, 0, sizeof(s));
191 s.line = i;
192 s.membase = port->regs;
193 s.irq = port->irq + 2;
194 s.uartclk = port->baud_base;
195 s.flags = UPF_BOOT_AUTOCONF | UPF_SHARE_IRQ;
196 s.iotype = SERIAL_IO_MEM;
197 s.regshift = port->reg_shift;
198
199 early_serial_setup(&s);
200 }
201 cfe_printk("Serial init done.\n");
202
203 _machine_restart = bcm47xx_machine_restart;
204 _machine_halt = bcm47xx_machine_halt;
205 pm_power_off = bcm47xx_machine_halt;
206 board_time_init = bcm47xx_time_init;
207 }
208
209 EXPORT_SYMBOL(ssb);