target/linux/brcm63xx/patches-3.10/067-MIPS-BMIPS-add-a-smp-ops-registration-helper.patch

   1 From 0b135a3e8f344061ed0aa66e2514627dd7aa946f Mon Sep 17 00:00:00 2001
   2 From: Jonas Gorski <jogo@openwrt.org>
   3 Date: Sun, 23 Jun 2013 14:04:51 +0200
   4 Subject: [PATCH V2 08/13] MIPS: BMIPS: add a smp ops registration helper
   5
   6 Add a helper similar to the generic register_XXX_smp_ops() for bmips.
   7 Register SMP UP ops in case of BMIPS32/3300.
   8
   9 Signed-off-by: Jonas Gorski <jogo@openwrt.org>
  10 ---
  11 V1 -> V2:
  12  * use SMP_UP (ops) in case of BMIPS32_3300
  13
  14  arch/mips/Kconfig             |  1 +
  15  arch/mips/bcm63xx/prom.c      |  2 +-
  16  arch/mips/include/asm/bmips.h | 26 ++++++++++++++++++++++++++
  17  3 files changed, 28 insertions(+), 1 deletion(-)
  18
  19 --- a/arch/mips/Kconfig
  20 +++ b/arch/mips/Kconfig
  21 @@ -1551,6 +1551,7 @@ config CPU_LOONGSON1
  22         select CPU_SUPPORTS_HIGHMEM
  23
  24  config CPU_BMIPS32_3300
  25 +       select SMP_UP if SMP
  26         bool
  27
  28  config CPU_BMIPS4350
  29 --- a/arch/mips/bcm63xx/prom.c
  30 +++ b/arch/mips/bcm63xx/prom.c
  31 @@ -61,7 +61,7 @@ void __init prom_init(void)
  32
  33         if (IS_ENABLED(CONFIG_CPU_BMIPS4350) && IS_ENABLED(CONFIG_SMP)) {
  34                 /* set up SMP */
  35 -               register_smp_ops(&bmips43xx_smp_ops);
  36 +               register_bmips_smp_ops();
  37
  38                 /*
  39                  * BCM6328 might not have its second CPU enabled, while BCM3368
  40 --- a/arch/mips/include/asm/bmips.h
  41 +++ b/arch/mips/include/asm/bmips.h
  42 @@ -46,9 +46,35 @@
  43
  44  #include <linux/cpumask.h>
  45  #include <asm/r4kcache.h>
  46 +#include <asm/smp-ops.h>
  47
  48  extern struct plat_smp_ops bmips43xx_smp_ops;
  49  extern struct plat_smp_ops bmips5000_smp_ops;
  50 +
  51 +static inline int register_bmips_smp_ops(void)
  52 +{
  53 +#if IS_ENABLED(CONFIG_CPU_BMIPS) && IS_ENABLED(CONFIG_SMP)
  54 +       switch (current_cpu_type()) {
  55 +       case CPU_BMIPS32:
  56 +       case CPU_BMIPS3300:
  57 +               return register_up_smp_ops();
  58 +       case CPU_BMIPS4350:
  59 +       case CPU_BMIPS4380:
  60 +               register_smp_ops(&bmips43xx_smp_ops);
  61 +               break;
  62 +       case CPU_BMIPS5000:
  63 +               register_smp_ops(&bmips5000_smp_ops);
  64 +               break;
  65 +       default:
  66 +               return -ENODEV;
  67 +       }
  68 +
  69 +       return 0;
  70 +#else
  71 +       return -ENODEV;
  72 +#endif
  73 +}
  74 +
  75  extern char bmips_reset_nmi_vec;
  76  extern char bmips_reset_nmi_vec_end;
  77  extern char bmips_smp_movevec;