target/linux/brcm63xx/patches-3.18/032-MIPS-Provide-a-generic-plat_irq_dispatch.patch

   1 From 85f7cdacbb81db8c4cc8e474837eab1f0e4ff77b Mon Sep 17 00:00:00 2001
   2 From: Andrew Bresticker <abrestic@chromium.org>
   3 Date: Thu, 18 Sep 2014 14:47:09 -0700
   4 Subject: [PATCH 3/3] MIPS: Provide a generic plat_irq_dispatch
   5
   6 For platforms which boot with device-tree or have correctly chained
   7 all external interrupt controllers, a generic plat_irq_dispatch() can
   8 be used.  Implement a plat_irq_dispatch() which simply handles all the
   9 pending interrupts as reported by C0_Cause.
  10
  11 Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
  12 Reviewed-by: Qais Yousef <qais.yousef@imgtec.com>
  13 Tested-by: Qais Yousef <qais.yousef@imgtec.com>
  14 Cc: Thomas Gleixner <tglx@linutronix.de>
  15 Cc: Jason Cooper <jason@lakedaemon.net>
  16 Cc: Andrew Bresticker <abrestic@chromium.org>
  17 Cc: Jeffrey Deans <jeffrey.deans@imgtec.com>
  18 Cc: Markos Chandras <markos.chandras@imgtec.com>
  19 Cc: Paul Burton <paul.burton@imgtec.com>
  20 Cc: Qais Yousef <qais.yousef@imgtec.com>
  21 Cc: Jonas Gorski <jogo@openwrt.org>
  22 Cc: John Crispin <blogic@openwrt.org>
  23 Cc: David Daney <ddaney.cavm@gmail.com>
  24 Cc: linux-mips@linux-mips.org
  25 Cc: linux-kernel@vger.kernel.org
  26 Patchwork: https://patchwork.linux-mips.org/patch/7801/
  27 Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
  28 ---
  29  arch/mips/kernel/irq_cpu.c |   18 ++++++++++++++++++
  30  1 file changed, 18 insertions(+)
  31
  32 --- a/arch/mips/kernel/irq_cpu.c
  33 +++ b/arch/mips/kernel/irq_cpu.c
  34 @@ -98,6 +98,24 @@ static struct irq_chip mips_mt_cpu_irq_c
  35         .irq_enable     = unmask_mips_irq,
  36  };
  37
  38 +asmlinkage void __weak plat_irq_dispatch(void)
  39 +{
  40 +       unsigned long pending = read_c0_cause() & read_c0_status() & ST0_IM;
  41 +       int irq;
  42 +
  43 +       if (!pending) {
  44 +               spurious_interrupt();
  45 +               return;
  46 +       }
  47 +
  48 +       pending >>= CAUSEB_IP;
  49 +       while (pending) {
  50 +               irq = fls(pending) - 1;
  51 +               do_IRQ(MIPS_CPU_IRQ_BASE + irq);
  52 +               pending &= ~BIT(irq);
  53 +       }
  54 +}
  55 +
  56  static int mips_cpu_intc_map(struct irq_domain *d, unsigned int irq,
  57                              irq_hw_number_t hw)
  58  {