target/linux/generic/backport-5.10/611-v5.12-net-ethernet-mediatek-support-setting-MTU.patch

   1 From 4fd59792097a6b2fb949d41264386a7ecade469e Mon Sep 17 00:00:00 2001
   2 From: DENG Qingfang <dqfext@gmail.com>
   3 Date: Mon, 25 Jan 2021 12:20:46 +0800
   4 Subject: [PATCH] net: ethernet: mediatek: support setting MTU
   5
   6 MT762x HW, except for MT7628, supports frame length up to 2048
   7 (maximum length on GDM), so allow setting MTU up to 2030.
   8
   9 Also set the default frame length to the hardware default 1518.
  10
  11 Signed-off-by: DENG Qingfang <dqfext@gmail.com>
  12 Reviewed-by: Andrew Lunn <andrew@lunn.ch>
  13 Link: https://lore.kernel.org/r/20210125042046.5599-1-dqfext@gmail.com
  14 Signed-off-by: Jakub Kicinski <kuba@kernel.org>
  15 ---
  16  drivers/net/ethernet/mediatek/mtk_eth_soc.c | 43 ++++++++++++++++++---
  17  drivers/net/ethernet/mediatek/mtk_eth_soc.h | 12 ++++--
  18  2 files changed, 47 insertions(+), 8 deletions(-)
  19
  20 --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
  21 +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
  22 @@ -355,7 +355,7 @@ static void mtk_mac_config(struct phylin
  23         /* Setup gmac */
  24         mcr_cur = mtk_r32(mac->hw, MTK_MAC_MCR(mac->id));
  25         mcr_new = mcr_cur;
  26 -       mcr_new |= MAC_MCR_MAX_RX_1536 | MAC_MCR_IPG_CFG | MAC_MCR_FORCE_MODE |
  27 +       mcr_new |= MAC_MCR_IPG_CFG | MAC_MCR_FORCE_MODE |
  28                    MAC_MCR_BACKOFF_EN | MAC_MCR_BACKPR_EN | MAC_MCR_FORCE_LINK;
  29
  30         /* Only update control register when needed! */
  31 @@ -782,8 +782,8 @@ static void mtk_get_stats64(struct net_d
  32  static inline int mtk_max_frag_size(int mtu)
  33  {
  34         /* make sure buf_size will be at least MTK_MAX_RX_LENGTH */
  35 -       if (mtu + MTK_RX_ETH_HLEN < MTK_MAX_RX_LENGTH)
  36 -               mtu = MTK_MAX_RX_LENGTH - MTK_RX_ETH_HLEN;
  37 +       if (mtu + MTK_RX_ETH_HLEN < MTK_MAX_RX_LENGTH_2K)
  38 +               mtu = MTK_MAX_RX_LENGTH_2K - MTK_RX_ETH_HLEN;
  39
  40         return SKB_DATA_ALIGN(MTK_RX_HLEN + mtu) +
  41                 SKB_DATA_ALIGN(sizeof(struct skb_shared_info));
  42 @@ -794,7 +794,7 @@ static inline int mtk_max_buf_size(int f
  43         int buf_size = frag_size - NET_SKB_PAD - NET_IP_ALIGN -
  44                        SKB_DATA_ALIGN(sizeof(struct skb_shared_info));
  45
  46 -       WARN_ON(buf_size < MTK_MAX_RX_LENGTH);
  47 +       WARN_ON(buf_size < MTK_MAX_RX_LENGTH_2K);
  48
  49         return buf_size;
  50  }
  51 @@ -2606,6 +2606,35 @@ static void mtk_uninit(struct net_device
  52         mtk_rx_irq_disable(eth, ~0);
  53  }
  54
  55 +static int mtk_change_mtu(struct net_device *dev, int new_mtu)
  56 +{
  57 +       int length = new_mtu + MTK_RX_ETH_HLEN;
  58 +       struct mtk_mac *mac = netdev_priv(dev);
  59 +       struct mtk_eth *eth = mac->hw;
  60 +       u32 mcr_cur, mcr_new;
  61 +
  62 +       if (!MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628)) {
  63 +               mcr_cur = mtk_r32(mac->hw, MTK_MAC_MCR(mac->id));
  64 +               mcr_new = mcr_cur & ~MAC_MCR_MAX_RX_MASK;
  65 +
  66 +               if (length <= 1518)
  67 +                       mcr_new |= MAC_MCR_MAX_RX(MAC_MCR_MAX_RX_1518);
  68 +               else if (length <= 1536)
  69 +                       mcr_new |= MAC_MCR_MAX_RX(MAC_MCR_MAX_RX_1536);
  70 +               else if (length <= 1552)
  71 +                       mcr_new |= MAC_MCR_MAX_RX(MAC_MCR_MAX_RX_1552);
  72 +               else
  73 +                       mcr_new |= MAC_MCR_MAX_RX(MAC_MCR_MAX_RX_2048);
  74 +
  75 +               if (mcr_new != mcr_cur)
  76 +                       mtk_w32(mac->hw, mcr_new, MTK_MAC_MCR(mac->id));
  77 +       }
  78 +
  79 +       dev->mtu = new_mtu;
  80 +
  81 +       return 0;
  82 +}
  83 +
  84  static int mtk_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
  85  {
  86         struct mtk_mac *mac = netdev_priv(dev);
  87 @@ -2902,6 +2931,7 @@ static const struct net_device_ops mtk_n
  88         .ndo_set_mac_address    = mtk_set_mac_address,
  89         .ndo_validate_addr      = eth_validate_addr,
  90         .ndo_do_ioctl           = mtk_do_ioctl,
  91 +       .ndo_change_mtu         = mtk_change_mtu,
  92         .ndo_tx_timeout         = mtk_tx_timeout,
  93         .ndo_get_stats64        = mtk_get_stats64,
  94         .ndo_fix_features       = mtk_fix_features,
  95 @@ -3004,7 +3034,10 @@ static int mtk_add_mac(struct mtk_eth *e
  96         eth->netdev[id]->irq = eth->irq[0];
  97         eth->netdev[id]->dev.of_node = np;
  98
  99 -       eth->netdev[id]->max_mtu = MTK_MAX_RX_LENGTH - MTK_RX_ETH_HLEN;
 100 +       if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628))
 101 +               eth->netdev[id]->max_mtu = MTK_MAX_RX_LENGTH - MTK_RX_ETH_HLEN;
 102 +       else
 103 +               eth->netdev[id]->max_mtu = MTK_MAX_RX_LENGTH_2K - MTK_RX_ETH_HLEN;
 104
 105         return 0;
 106
 107 --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
 108 +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
 109 @@ -20,12 +20,13 @@
 110  #include "mtk_ppe.h"
 111
 112  #define MTK_QDMA_PAGE_SIZE     2048
 113 -#define        MTK_MAX_RX_LENGTH       1536
 114 +#define MTK_MAX_RX_LENGTH      1536
 115 +#define MTK_MAX_RX_LENGTH_2K   2048
 116  #define MTK_TX_DMA_BUF_LEN     0x3fff
 117  #define MTK_DMA_SIZE           512
 118  #define MTK_NAPI_WEIGHT                64
 119  #define MTK_MAC_COUNT          2
 120 -#define MTK_RX_ETH_HLEN                (VLAN_ETH_HLEN + VLAN_HLEN + ETH_FCS_LEN)
 121 +#define MTK_RX_ETH_HLEN                (ETH_HLEN + ETH_FCS_LEN)
 122  #define MTK_RX_HLEN            (NET_SKB_PAD + MTK_RX_ETH_HLEN + NET_IP_ALIGN)
 123  #define MTK_DMA_DUMMY_DESC     0xffffffff
 124  #define MTK_DEFAULT_MSG_ENABLE (NETIF_MSG_DRV | \
 125 @@ -352,7 +353,12 @@
 126
 127  /* Mac control registers */
 128  #define MTK_MAC_MCR(x)         (0x10100 + (x * 0x100))
 129 -#define MAC_MCR_MAX_RX_1536    BIT(24)
 130 +#define MAC_MCR_MAX_RX_MASK    GENMASK(25, 24)
 131 +#define MAC_MCR_MAX_RX(_x)     (MAC_MCR_MAX_RX_MASK & ((_x) << 24))
 132 +#define MAC_MCR_MAX_RX_1518    0x0
 133 +#define MAC_MCR_MAX_RX_1536    0x1
 134 +#define MAC_MCR_MAX_RX_1552    0x2
 135 +#define MAC_MCR_MAX_RX_2048    0x3
 136  #define MAC_MCR_IPG_CFG                (BIT(18) | BIT(16))
 137  #define MAC_MCR_FORCE_MODE     BIT(15)
 138  #define MAC_MCR_TX_EN          BIT(14)