kernel: backport some Bluetooth RTL8761 USB IDs
[openwrt/openwrt.git] / target / linux / generic / backport-5.10 / 713-v5.15-net-phy-marvell-add-SFP-support-for-88E1510.patch
1 From b697d9d38a5a5ab405d7cc4743d39fe2c5d7517c Mon Sep 17 00:00:00 2001
2 From: Ivan Bornyakov <i.bornyakov@metrotek.ru>
3 Date: Thu, 12 Aug 2021 16:42:56 +0300
4 Subject: [PATCH] net: phy: marvell: add SFP support for 88E1510
5
6 Add support for SFP cages connected to the Marvell 88E1512 transceiver.
7 88E1512 supports for SGMII/1000Base-X/100Base-FX media type with RGMII
8 on system interface. Configure PHY to appropriate mode depending on the
9 type of SFP inserted. On SFP removal configure PHY to the RGMII-copper
10 mode so RJ-45 port can still work.
11
12 Signed-off-by: Ivan Bornyakov <i.bornyakov@metrotek.ru>
13 Link: https://lore.kernel.org/r/20210812134256.2436-1-i.bornyakov@metrotek.ru
14 Signed-off-by: Jakub Kicinski <kuba@kernel.org>
15 ---
16 drivers/net/phy/marvell.c | 105 +++++++++++++++++++++++++++++++++++++-
17 1 file changed, 104 insertions(+), 1 deletion(-)
18
19 --- a/drivers/net/phy/marvell.c
20 +++ b/drivers/net/phy/marvell.c
21 @@ -32,6 +32,7 @@
22 #include <linux/marvell_phy.h>
23 #include <linux/bitfield.h>
24 #include <linux/of.h>
25 +#include <linux/sfp.h>
26
27 #include <linux/io.h>
28 #include <asm/irq.h>
29 @@ -46,6 +47,7 @@
30 #define MII_MARVELL_MISC_TEST_PAGE 0x06
31 #define MII_MARVELL_VCT7_PAGE 0x07
32 #define MII_MARVELL_WOL_PAGE 0x11
33 +#define MII_MARVELL_MODE_PAGE 0x12
34
35 #define MII_M1011_IEVENT 0x13
36 #define MII_M1011_IEVENT_CLEAR 0x0000
37 @@ -162,7 +164,14 @@
38
39 #define MII_88E1510_GEN_CTRL_REG_1 0x14
40 #define MII_88E1510_GEN_CTRL_REG_1_MODE_MASK 0x7
41 +#define MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII 0x0 /* RGMII to copper */
42 #define MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII 0x1 /* SGMII to copper */
43 +/* RGMII to 1000BASE-X */
44 +#define MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_1000X 0x2
45 +/* RGMII to 100BASE-FX */
46 +#define MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_100FX 0x3
47 +/* RGMII to SGMII */
48 +#define MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_SGMII 0x4
49 #define MII_88E1510_GEN_CTRL_REG_1_RESET 0x8000 /* Soft reset */
50
51 #define MII_VCT5_TX_RX_MDI0_COUPLING 0x10
52 @@ -2505,6 +2514,100 @@ static int marvell_probe(struct phy_devi
53 return marvell_hwmon_probe(phydev);
54 }
55
56 +static int m88e1510_sfp_insert(void *upstream, const struct sfp_eeprom_id *id)
57 +{
58 + struct phy_device *phydev = upstream;
59 + phy_interface_t interface;
60 + struct device *dev;
61 + int oldpage;
62 + int ret = 0;
63 + u16 mode;
64 +
65 + __ETHTOOL_DECLARE_LINK_MODE_MASK(supported) = { 0, };
66 +
67 + dev = &phydev->mdio.dev;
68 +
69 + sfp_parse_support(phydev->sfp_bus, id, supported);
70 + interface = sfp_select_interface(phydev->sfp_bus, supported);
71 +
72 + dev_info(dev, "%s SFP module inserted\n", phy_modes(interface));
73 +
74 + switch (interface) {
75 + case PHY_INTERFACE_MODE_1000BASEX:
76 + mode = MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_1000X;
77 +
78 + break;
79 + case PHY_INTERFACE_MODE_100BASEX:
80 + mode = MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_100FX;
81 +
82 + break;
83 + case PHY_INTERFACE_MODE_SGMII:
84 + mode = MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_SGMII;
85 +
86 + break;
87 + default:
88 + dev_err(dev, "Incompatible SFP module inserted\n");
89 +
90 + return -EINVAL;
91 + }
92 +
93 + oldpage = phy_select_page(phydev, MII_MARVELL_MODE_PAGE);
94 + if (oldpage < 0)
95 + goto error;
96 +
97 + ret = __phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1,
98 + MII_88E1510_GEN_CTRL_REG_1_MODE_MASK, mode);
99 + if (ret < 0)
100 + goto error;
101 +
102 + ret = __phy_set_bits(phydev, MII_88E1510_GEN_CTRL_REG_1,
103 + MII_88E1510_GEN_CTRL_REG_1_RESET);
104 +
105 +error:
106 + return phy_restore_page(phydev, oldpage, ret);
107 +}
108 +
109 +static void m88e1510_sfp_remove(void *upstream)
110 +{
111 + struct phy_device *phydev = upstream;
112 + int oldpage;
113 + int ret = 0;
114 +
115 + oldpage = phy_select_page(phydev, MII_MARVELL_MODE_PAGE);
116 + if (oldpage < 0)
117 + goto error;
118 +
119 + ret = __phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1,
120 + MII_88E1510_GEN_CTRL_REG_1_MODE_MASK,
121 + MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII);
122 + if (ret < 0)
123 + goto error;
124 +
125 + ret = __phy_set_bits(phydev, MII_88E1510_GEN_CTRL_REG_1,
126 + MII_88E1510_GEN_CTRL_REG_1_RESET);
127 +
128 +error:
129 + phy_restore_page(phydev, oldpage, ret);
130 +}
131 +
132 +static const struct sfp_upstream_ops m88e1510_sfp_ops = {
133 + .module_insert = m88e1510_sfp_insert,
134 + .module_remove = m88e1510_sfp_remove,
135 + .attach = phy_sfp_attach,
136 + .detach = phy_sfp_detach,
137 +};
138 +
139 +static int m88e1510_probe(struct phy_device *phydev)
140 +{
141 + int err;
142 +
143 + err = marvell_probe(phydev);
144 + if (err)
145 + return err;
146 +
147 + return phy_sfp_probe(phydev, &m88e1510_sfp_ops);
148 +}
149 +
150 static struct phy_driver marvell_drivers[] = {
151 {
152 .phy_id = MARVELL_PHY_ID_88E1101,
153 @@ -2711,7 +2814,7 @@ static struct phy_driver marvell_drivers
154 .driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
155 .features = PHY_GBIT_FIBRE_FEATURES,
156 .flags = PHY_POLL_CABLE_TEST,
157 - .probe = marvell_probe,
158 + .probe = m88e1510_probe,
159 .config_init = m88e1510_config_init,
160 .config_aneg = m88e1510_config_aneg,
161 .read_status = marvell_read_status,