target/linux/generic/backport-5.10/735-v5.14-14-net-dsa-qca8k-add-support-for-switch-rev.patch

   1 From 95ffeaf18b3bb90eeef52cbf7d79ccc9d0345ff5 Mon Sep 17 00:00:00 2001
   2 From: Ansuel Smith <ansuelsmth@gmail.com>
   3 Date: Fri, 14 May 2021 23:00:04 +0200
   4 Subject: [PATCH] net: dsa: qca8k: add support for switch rev
   5
   6 qca8k internal phy driver require some special debug value to be set
   7 based on the switch revision. Rework the switch id read function to
   8 also read the chip revision.
   9
  10 Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
  11 Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
  12 Signed-off-by: David S. Miller <davem@davemloft.net>
  13 ---
  14  drivers/net/dsa/qca8k.c | 53 ++++++++++++++++++++++++++---------------
  15  drivers/net/dsa/qca8k.h |  7 ++++--
  16  2 files changed, 39 insertions(+), 21 deletions(-)
  17
  18 --- a/drivers/net/dsa/qca8k.c
  19 +++ b/drivers/net/dsa/qca8k.c
  20 @@ -1588,12 +1588,40 @@ static const struct dsa_switch_ops qca8k
  21         .phylink_mac_link_up    = qca8k_phylink_mac_link_up,
  22  };
  23
  24 +static int qca8k_read_switch_id(struct qca8k_priv *priv)
  25 +{
  26 +       const struct qca8k_match_data *data;
  27 +       u32 val;
  28 +       u8 id;
  29 +
  30 +       /* get the switches ID from the compatible */
  31 +       data = of_device_get_match_data(priv->dev);
  32 +       if (!data)
  33 +               return -ENODEV;
  34 +
  35 +       val = qca8k_read(priv, QCA8K_REG_MASK_CTRL);
  36 +       if (val < 0)
  37 +               return -ENODEV;
  38 +
  39 +       id = QCA8K_MASK_CTRL_DEVICE_ID(val & QCA8K_MASK_CTRL_DEVICE_ID_MASK);
  40 +       if (id != data->id) {
  41 +               dev_err(priv->dev, "Switch id detected %x but expected %x", id, data->id);
  42 +               return -ENODEV;
  43 +       }
  44 +
  45 +       priv->switch_id = id;
  46 +
  47 +       /* Save revision to communicate to the internal PHY driver */
  48 +       priv->switch_revision = (val & QCA8K_MASK_CTRL_REV_ID_MASK);
  49 +
  50 +       return 0;
  51 +}
  52 +
  53  static int
  54  qca8k_sw_probe(struct mdio_device *mdiodev)
  55  {
  56 -       const struct qca8k_match_data *data;
  57         struct qca8k_priv *priv;
  58 -       u32 id;
  59 +       int ret;
  60
  61         /* allocate the private data struct so that we can probe the switches
  62          * ID register
  63 @@ -1619,24 +1647,11 @@ qca8k_sw_probe(struct mdio_device *mdiod
  64                 gpiod_set_value_cansleep(priv->reset_gpio, 0);
  65         }
  66
  67 -       /* get the switches ID from the compatible */
  68 -       data = of_device_get_match_data(&mdiodev->dev);
  69 -       if (!data)
  70 -               return -ENODEV;
  71 +       /* Check the detected switch id */
  72 +       ret = qca8k_read_switch_id(priv);
  73 +       if (ret)
  74 +               return ret;
  75
  76 -       /* read the switches ID register */
  77 -       id = qca8k_read(priv, QCA8K_REG_MASK_CTRL);
  78 -       if (id < 0)
  79 -               return id;
  80 -
  81 -       id >>= QCA8K_MASK_CTRL_ID_S;
  82 -       id &= QCA8K_MASK_CTRL_ID_M;
  83 -       if (id != data->id) {
  84 -               dev_err(&mdiodev->dev, "Switch id detected %x but expected %x", id, data->id);
  85 -               return -ENODEV;
  86 -       }
  87 -
  88 -       priv->switch_id = id;
  89         priv->ds = devm_kzalloc(&mdiodev->dev, sizeof(*priv->ds), GFP_KERNEL);
  90         if (!priv->ds)
  91                 return -ENOMEM;
  92 --- a/drivers/net/dsa/qca8k.h
  93 +++ b/drivers/net/dsa/qca8k.h
  94 @@ -30,8 +30,10 @@
  95
  96  /* Global control registers */
  97  #define QCA8K_REG_MASK_CTRL                            0x000
  98 -#define   QCA8K_MASK_CTRL_ID_M                         0xff
  99 -#define   QCA8K_MASK_CTRL_ID_S                         8
 100 +#define   QCA8K_MASK_CTRL_REV_ID_MASK                  GENMASK(7, 0)
 101 +#define   QCA8K_MASK_CTRL_REV_ID(x)                    ((x) >> 0)
 102 +#define   QCA8K_MASK_CTRL_DEVICE_ID_MASK               GENMASK(15, 8)
 103 +#define   QCA8K_MASK_CTRL_DEVICE_ID(x)                 ((x) >> 8)
 104  #define QCA8K_REG_PORT0_PAD_CTRL                       0x004
 105  #define QCA8K_REG_PORT5_PAD_CTRL                       0x008
 106  #define QCA8K_REG_PORT6_PAD_CTRL                       0x00c
 107 @@ -251,6 +253,7 @@ struct qca8k_match_data {
 108
 109  struct qca8k_priv {
 110         u8 switch_id;
 111 +       u8 switch_revision;
 112         struct regmap *regmap;
 113         struct mii_bus *bus;
 114         struct ar8xxx_port_status port_sts[QCA8K_NUM_PORTS];