kernel: backport NVMEM late fixes from v6.2
[openwrt/openwrt.git] / target / linux / generic / backport-5.10 / 747-v5.16-05-net-dsa-qca8k-add-support-for-cpu-port-6.patch
1 From 3fcf734aa482487df83cf8f18608438fcf59127f Mon Sep 17 00:00:00 2001
2 From: Ansuel Smith <ansuelsmth@gmail.com>
3 Date: Thu, 14 Oct 2021 00:39:10 +0200
4 Subject: net: dsa: qca8k: add support for cpu port 6
5
6 Currently CPU port is always hardcoded to port 0. This switch have 2 CPU
7 ports. The original intention of this driver seems to be use the
8 mac06_exchange bit to swap MAC0 with MAC6 in the strange configuration
9 where device have connected only the CPU port 6. To skip the
10 introduction of a new binding, rework the driver to address the
11 secondary CPU port as primary and drop any reference of hardcoded port.
12 With configuration of mac06 exchange, just skip the definition of port0
13 and define the CPU port as a secondary. The driver will autoconfigure
14 the switch to use that as the primary CPU port.
15
16 Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
17 Signed-off-by: David S. Miller <davem@davemloft.net>
18 ---
19 drivers/net/dsa/qca8k.c | 51 ++++++++++++++++++++++++++++++++++---------------
20 drivers/net/dsa/qca8k.h | 2 --
21 2 files changed, 36 insertions(+), 17 deletions(-)
22
23 --- a/drivers/net/dsa/qca8k.c
24 +++ b/drivers/net/dsa/qca8k.c
25 @@ -977,6 +977,22 @@ qca8k_setup_mac_pwr_sel(struct qca8k_pri
26 return ret;
27 }
28
29 +static int qca8k_find_cpu_port(struct dsa_switch *ds)
30 +{
31 + struct qca8k_priv *priv = ds->priv;
32 +
33 + /* Find the connected cpu port. Valid port are 0 or 6 */
34 + if (dsa_is_cpu_port(ds, 0))
35 + return 0;
36 +
37 + dev_dbg(priv->dev, "port 0 is not the CPU port. Checking port 6");
38 +
39 + if (dsa_is_cpu_port(ds, 6))
40 + return 6;
41 +
42 + return -EINVAL;
43 +}
44 +
45 static int
46 qca8k_parse_port_config(struct qca8k_priv *priv)
47 {
48 @@ -1017,13 +1033,13 @@ static int
49 qca8k_setup(struct dsa_switch *ds)
50 {
51 struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv;
52 - int ret, i;
53 + int cpu_port, ret, i;
54 u32 mask;
55
56 - /* Make sure that port 0 is the cpu port */
57 - if (!dsa_is_cpu_port(ds, 0)) {
58 - dev_err(priv->dev, "port 0 is not the CPU port");
59 - return -EINVAL;
60 + cpu_port = qca8k_find_cpu_port(ds);
61 + if (cpu_port < 0) {
62 + dev_err(priv->dev, "No cpu port configured in both cpu port0 and port6");
63 + return cpu_port;
64 }
65
66 /* Parse CPU port config to be later used in phy_link mac_config */
67 @@ -1065,7 +1081,7 @@ qca8k_setup(struct dsa_switch *ds)
68 dev_warn(priv->dev, "mib init failed");
69
70 /* Enable QCA header mode on the cpu port */
71 - ret = qca8k_write(priv, QCA8K_REG_PORT_HDR_CTRL(QCA8K_CPU_PORT),
72 + ret = qca8k_write(priv, QCA8K_REG_PORT_HDR_CTRL(cpu_port),
73 QCA8K_PORT_HDR_CTRL_ALL << QCA8K_PORT_HDR_CTRL_TX_S |
74 QCA8K_PORT_HDR_CTRL_ALL << QCA8K_PORT_HDR_CTRL_RX_S);
75 if (ret) {
76 @@ -1087,10 +1103,10 @@ qca8k_setup(struct dsa_switch *ds)
77
78 /* Forward all unknown frames to CPU port for Linux processing */
79 ret = qca8k_write(priv, QCA8K_REG_GLOBAL_FW_CTRL1,
80 - BIT(0) << QCA8K_GLOBAL_FW_CTRL1_IGMP_DP_S |
81 - BIT(0) << QCA8K_GLOBAL_FW_CTRL1_BC_DP_S |
82 - BIT(0) << QCA8K_GLOBAL_FW_CTRL1_MC_DP_S |
83 - BIT(0) << QCA8K_GLOBAL_FW_CTRL1_UC_DP_S);
84 + BIT(cpu_port) << QCA8K_GLOBAL_FW_CTRL1_IGMP_DP_S |
85 + BIT(cpu_port) << QCA8K_GLOBAL_FW_CTRL1_BC_DP_S |
86 + BIT(cpu_port) << QCA8K_GLOBAL_FW_CTRL1_MC_DP_S |
87 + BIT(cpu_port) << QCA8K_GLOBAL_FW_CTRL1_UC_DP_S);
88 if (ret)
89 return ret;
90
91 @@ -1098,7 +1114,7 @@ qca8k_setup(struct dsa_switch *ds)
92 for (i = 0; i < QCA8K_NUM_PORTS; i++) {
93 /* CPU port gets connected to all user ports of the switch */
94 if (dsa_is_cpu_port(ds, i)) {
95 - ret = qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(QCA8K_CPU_PORT),
96 + ret = qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(cpu_port),
97 QCA8K_PORT_LOOKUP_MEMBER, dsa_user_ports(ds));
98 if (ret)
99 return ret;
100 @@ -1110,7 +1126,7 @@ qca8k_setup(struct dsa_switch *ds)
101
102 ret = qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(i),
103 QCA8K_PORT_LOOKUP_MEMBER,
104 - BIT(QCA8K_CPU_PORT));
105 + BIT(cpu_port));
106 if (ret)
107 return ret;
108
109 @@ -1616,9 +1632,12 @@ static int
110 qca8k_port_bridge_join(struct dsa_switch *ds, int port, struct net_device *br)
111 {
112 struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv;
113 - int port_mask = BIT(QCA8K_CPU_PORT);
114 + int port_mask, cpu_port;
115 int i, ret;
116
117 + cpu_port = dsa_to_port(ds, port)->cpu_dp->index;
118 + port_mask = BIT(cpu_port);
119 +
120 for (i = 1; i < QCA8K_NUM_PORTS; i++) {
121 if (dsa_to_port(ds, i)->bridge_dev != br)
122 continue;
123 @@ -1645,7 +1664,9 @@ static void
124 qca8k_port_bridge_leave(struct dsa_switch *ds, int port, struct net_device *br)
125 {
126 struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv;
127 - int i;
128 + int cpu_port, i;
129 +
130 + cpu_port = dsa_to_port(ds, port)->cpu_dp->index;
131
132 for (i = 1; i < QCA8K_NUM_PORTS; i++) {
133 if (dsa_to_port(ds, i)->bridge_dev != br)
134 @@ -1662,7 +1683,7 @@ qca8k_port_bridge_leave(struct dsa_switc
135 * this port
136 */
137 qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(port),
138 - QCA8K_PORT_LOOKUP_MEMBER, BIT(QCA8K_CPU_PORT));
139 + QCA8K_PORT_LOOKUP_MEMBER, BIT(cpu_port));
140 }
141
142 static int
143 --- a/drivers/net/dsa/qca8k.h
144 +++ b/drivers/net/dsa/qca8k.h
145 @@ -24,8 +24,6 @@
146
147 #define QCA8K_NUM_FDB_RECORDS 2048
148
149 -#define QCA8K_CPU_PORT 0
150 -
151 #define QCA8K_PORT_VID_DEF 1
152
153 /* Global control registers */