realtek: rtl931x: fix missing CONFIG_COMMON_CLK_REALTEK config flag
[openwrt/openwrt.git] / target / linux / generic / backport-5.15 / 721-v6.0-net-ethernet-mtk_eth_wed-add-axi-bus-support.patch
1 From 6e1df49f330dce7c58a39d6772f1385b6887bb03 Mon Sep 17 00:00:00 2001
2 Message-Id: <6e1df49f330dce7c58a39d6772f1385b6887bb03.1662990860.git.lorenzo@kernel.org>
3 From: Lorenzo Bianconi <lorenzo@kernel.org>
4 Date: Thu, 8 Sep 2022 11:26:10 +0200
5 Subject: [PATCH net-next] net: ethernet: mtk_eth_wed: add axi bus support
6
7 Other than pcie bus, introduce support for axi bus to mtk wed driver.
8 Axi bus is used to connect mt7986-wmac soc chip available on mt7986
9 device.
10
11 Co-developed-by: Bo Jiao <Bo.Jiao@mediatek.com>
12 Signed-off-by: Bo Jiao <Bo.Jiao@mediatek.com>
13 Co-developed-by: Sujuan Chen <sujuan.chen@mediatek.com>
14 Signed-off-by: Sujuan Chen <sujuan.chen@mediatek.com>
15 Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
16 ---
17 drivers/net/ethernet/mediatek/mtk_wed.c | 116 +++++++++++++------
18 drivers/net/ethernet/mediatek/mtk_wed_regs.h | 2 +
19 include/linux/soc/mediatek/mtk_wed.h | 11 +-
20 3 files changed, 91 insertions(+), 38 deletions(-)
21
22 --- a/drivers/net/ethernet/mediatek/mtk_wed.c
23 +++ b/drivers/net/ethernet/mediatek/mtk_wed.c
24 @@ -85,11 +85,31 @@ static struct mtk_wed_hw *
25 mtk_wed_assign(struct mtk_wed_device *dev)
26 {
27 struct mtk_wed_hw *hw;
28 + int i;
29 +
30 + if (dev->wlan.bus_type == MTK_WED_BUS_PCIE) {
31 + hw = hw_list[pci_domain_nr(dev->wlan.pci_dev->bus)];
32 + if (!hw)
33 + return NULL;
34 +
35 + if (!hw->wed_dev)
36 + goto out;
37 +
38 + if (hw->version == 1)
39 + return NULL;
40 +
41 + /* MT7986 WED devices do not have any pcie slot restrictions */
42 + }
43 + /* MT7986 PCIE or AXI */
44 + for (i = 0; i < ARRAY_SIZE(hw_list); i++) {
45 + hw = hw_list[i];
46 + if (hw && !hw->wed_dev)
47 + goto out;
48 + }
49
50 - hw = hw_list[pci_domain_nr(dev->wlan.pci_dev->bus)];
51 - if (!hw || hw->wed_dev)
52 - return NULL;
53 + return NULL;
54
55 +out:
56 hw->wed_dev = dev;
57 return hw;
58 }
59 @@ -322,7 +342,6 @@ mtk_wed_stop(struct mtk_wed_device *dev)
60 static void
61 mtk_wed_detach(struct mtk_wed_device *dev)
62 {
63 - struct device_node *wlan_node = dev->wlan.pci_dev->dev.of_node;
64 struct mtk_wed_hw *hw = dev->hw;
65
66 mutex_lock(&hw_lock);
67 @@ -337,9 +356,14 @@ mtk_wed_detach(struct mtk_wed_device *de
68 mtk_wed_free_buffer(dev);
69 mtk_wed_free_tx_rings(dev);
70
71 - if (of_dma_is_coherent(wlan_node) && hw->hifsys)
72 - regmap_update_bits(hw->hifsys, HIFSYS_DMA_AG_MAP,
73 - BIT(hw->index), BIT(hw->index));
74 + if (dev->wlan.bus_type == MTK_WED_BUS_PCIE) {
75 + struct device_node *wlan_node;
76 +
77 + wlan_node = dev->wlan.pci_dev->dev.of_node;
78 + if (of_dma_is_coherent(wlan_node) && hw->hifsys)
79 + regmap_update_bits(hw->hifsys, HIFSYS_DMA_AG_MAP,
80 + BIT(hw->index), BIT(hw->index));
81 + }
82
83 if (!hw_list[!hw->index]->wed_dev &&
84 hw->eth->dma_dev != hw->eth->dev)
85 @@ -356,40 +380,54 @@ mtk_wed_detach(struct mtk_wed_device *de
86 static void
87 mtk_wed_bus_init(struct mtk_wed_device *dev)
88 {
89 - struct device_node *np = dev->hw->eth->dev->of_node;
90 - struct regmap *regs;
91 - u32 val;
92 -
93 - regs = syscon_regmap_lookup_by_phandle(np, "mediatek,wed-pcie");
94 - if (IS_ERR(regs))
95 - return;
96 + switch (dev->wlan.bus_type) {
97 + case MTK_WED_BUS_PCIE: {
98 + struct device_node *np = dev->hw->eth->dev->of_node;
99 + struct regmap *regs;
100 + u32 val;
101 +
102 + regs = syscon_regmap_lookup_by_phandle(np,
103 + "mediatek,wed-pcie");
104 + if (IS_ERR(regs))
105 + break;
106
107 - regmap_update_bits(regs, 0, BIT(0), BIT(0));
108 + regmap_update_bits(regs, 0, BIT(0), BIT(0));
109
110 - wed_w32(dev, MTK_WED_PCIE_INT_CTRL,
111 - FIELD_PREP(MTK_WED_PCIE_INT_CTRL_POLL_EN, 2));
112 + wed_w32(dev, MTK_WED_PCIE_INT_CTRL,
113 + FIELD_PREP(MTK_WED_PCIE_INT_CTRL_POLL_EN, 2));
114
115 - /* pcie interrupt control: pola/source selection */
116 - wed_set(dev, MTK_WED_PCIE_INT_CTRL,
117 - MTK_WED_PCIE_INT_CTRL_MSK_EN_POLA |
118 - FIELD_PREP(MTK_WED_PCIE_INT_CTRL_SRC_SEL, 1));
119 - wed_r32(dev, MTK_WED_PCIE_INT_CTRL);
120 -
121 - val = wed_r32(dev, MTK_WED_PCIE_CFG_INTM);
122 - val = wed_r32(dev, MTK_WED_PCIE_CFG_BASE);
123 - wed_w32(dev, MTK_WED_PCIE_CFG_INTM, PCIE_BASE_ADDR0 | 0x180);
124 - wed_w32(dev, MTK_WED_PCIE_CFG_BASE, PCIE_BASE_ADDR0 | 0x184);
125 -
126 - val = wed_r32(dev, MTK_WED_PCIE_CFG_INTM);
127 - val = wed_r32(dev, MTK_WED_PCIE_CFG_BASE);
128 -
129 - /* pcie interrupt status trigger register */
130 - wed_w32(dev, MTK_WED_PCIE_INT_TRIGGER, BIT(24));
131 - wed_r32(dev, MTK_WED_PCIE_INT_TRIGGER);
132 -
133 - /* pola setting */
134 - val = wed_r32(dev, MTK_WED_PCIE_INT_CTRL);
135 - wed_set(dev, MTK_WED_PCIE_INT_CTRL, MTK_WED_PCIE_INT_CTRL_MSK_EN_POLA);
136 + /* pcie interrupt control: pola/source selection */
137 + wed_set(dev, MTK_WED_PCIE_INT_CTRL,
138 + MTK_WED_PCIE_INT_CTRL_MSK_EN_POLA |
139 + FIELD_PREP(MTK_WED_PCIE_INT_CTRL_SRC_SEL, 1));
140 + wed_r32(dev, MTK_WED_PCIE_INT_CTRL);
141 +
142 + val = wed_r32(dev, MTK_WED_PCIE_CFG_INTM);
143 + val = wed_r32(dev, MTK_WED_PCIE_CFG_BASE);
144 + wed_w32(dev, MTK_WED_PCIE_CFG_INTM, PCIE_BASE_ADDR0 | 0x180);
145 + wed_w32(dev, MTK_WED_PCIE_CFG_BASE, PCIE_BASE_ADDR0 | 0x184);
146 +
147 + val = wed_r32(dev, MTK_WED_PCIE_CFG_INTM);
148 + val = wed_r32(dev, MTK_WED_PCIE_CFG_BASE);
149 +
150 + /* pcie interrupt status trigger register */
151 + wed_w32(dev, MTK_WED_PCIE_INT_TRIGGER, BIT(24));
152 + wed_r32(dev, MTK_WED_PCIE_INT_TRIGGER);
153 +
154 + /* pola setting */
155 + val = wed_r32(dev, MTK_WED_PCIE_INT_CTRL);
156 + wed_set(dev, MTK_WED_PCIE_INT_CTRL,
157 + MTK_WED_PCIE_INT_CTRL_MSK_EN_POLA);
158 + break;
159 + }
160 + case MTK_WED_BUS_AXI:
161 + wed_set(dev, MTK_WED_WPDMA_INT_CTRL,
162 + MTK_WED_WPDMA_INT_CTRL_SIG_SRC |
163 + FIELD_PREP(MTK_WED_WPDMA_INT_CTRL_SRC_SEL, 0));
164 + break;
165 + default:
166 + break;
167 + }
168 }
169
170 static void
171 @@ -800,12 +838,14 @@ mtk_wed_attach(struct mtk_wed_device *de
172 __releases(RCU)
173 {
174 struct mtk_wed_hw *hw;
175 + struct device *device;
176 int ret = 0;
177
178 RCU_LOCKDEP_WARN(!rcu_read_lock_held(),
179 "mtk_wed_attach without holding the RCU read lock");
180
181 - if (pci_domain_nr(dev->wlan.pci_dev->bus) > 1 ||
182 + if ((dev->wlan.bus_type == MTK_WED_BUS_PCIE &&
183 + pci_domain_nr(dev->wlan.pci_dev->bus) > 1) ||
184 !try_module_get(THIS_MODULE))
185 ret = -ENODEV;
186
187 @@ -823,8 +863,10 @@ mtk_wed_attach(struct mtk_wed_device *de
188 goto out;
189 }
190
191 - dev_info(&dev->wlan.pci_dev->dev,
192 - "attaching wed device %d version %d\n",
193 + device = dev->wlan.bus_type == MTK_WED_BUS_PCIE
194 + ? &dev->wlan.pci_dev->dev
195 + : &dev->wlan.platform_dev->dev;
196 + dev_info(device, "attaching wed device %d version %d\n",
197 hw->index, hw->version);
198
199 dev->hw = hw;
200 --- a/drivers/net/ethernet/mediatek/mtk_wed_regs.h
201 +++ b/drivers/net/ethernet/mediatek/mtk_wed_regs.h
202 @@ -198,6 +198,8 @@ struct mtk_wdma_desc {
203
204 #define MTK_WED_WPDMA_INT_CTRL 0x520
205 #define MTK_WED_WPDMA_INT_CTRL_SUBRT_ADV BIT(21)
206 +#define MTK_WED_WPDMA_INT_CTRL_SIG_SRC BIT(22)
207 +#define MTK_WED_WPDMA_INT_CTRL_SRC_SEL GENMASK(17, 16)
208
209 #define MTK_WED_WPDMA_INT_MASK 0x524
210
211 --- a/include/linux/soc/mediatek/mtk_wed.h
212 +++ b/include/linux/soc/mediatek/mtk_wed.h
213 @@ -11,6 +11,11 @@
214 struct mtk_wed_hw;
215 struct mtk_wdma_desc;
216
217 +enum mtk_wed_bus_tye {
218 + MTK_WED_BUS_PCIE,
219 + MTK_WED_BUS_AXI,
220 +};
221 +
222 struct mtk_wed_ring {
223 struct mtk_wdma_desc *desc;
224 dma_addr_t desc_phys;
225 @@ -43,7 +48,11 @@ struct mtk_wed_device {
226
227 /* filled by driver: */
228 struct {
229 - struct pci_dev *pci_dev;
230 + union {
231 + struct platform_device *platform_dev;
232 + struct pci_dev *pci_dev;
233 + };
234 + enum mtk_wed_bus_tye bus_type;
235
236 u32 wpdma_phys;
237 u32 wpdma_int;