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c6c8736866217d0300daf3c5d3a353f2a8b7c949
[openwrt/openwrt.git] / target / linux / generic / patches-3.10 / 770-bgmac-backport.patch
1 patches for bgmac backported from net-next/master
2
3 --- a/drivers/net/ethernet/broadcom/Kconfig
4 +++ b/drivers/net/ethernet/broadcom/Kconfig
5 @@ -132,7 +132,8 @@ config BNX2X_SRIOV
6
7 config BGMAC
8 tristate "BCMA bus GBit core support"
9 - depends on BCMA_HOST_SOC && HAS_DMA
10 + depends on BCMA_HOST_SOC && HAS_DMA && BCM47XX
11 + select PHYLIB
12 ---help---
13 This driver supports GBit MAC and BCM4706 GBit MAC cores on BCMA bus.
14 They can be found on BCM47xx SoCs and provide gigabit ethernet.
15 --- a/drivers/net/ethernet/broadcom/bgmac.c
16 +++ b/drivers/net/ethernet/broadcom/bgmac.c
17 @@ -149,6 +149,8 @@ static netdev_tx_t bgmac_dma_tx_add(stru
18 dma_desc->ctl0 = cpu_to_le32(ctl0);
19 dma_desc->ctl1 = cpu_to_le32(ctl1);
20
21 + netdev_sent_queue(net_dev, skb->len);
22 +
23 wmb();
24
25 /* Increase ring->end to point empty slot. We tell hardware the first
26 @@ -157,6 +159,7 @@ static netdev_tx_t bgmac_dma_tx_add(stru
27 if (++ring->end >= BGMAC_TX_RING_SLOTS)
28 ring->end = 0;
29 bgmac_write(bgmac, ring->mmio_base + BGMAC_DMA_TX_INDEX,
30 + ring->index_base +
31 ring->end * sizeof(struct bgmac_dma_desc));
32
33 /* Always keep one slot free to allow detecting bugged calls. */
34 @@ -177,10 +180,13 @@ static void bgmac_dma_tx_free(struct bgm
35 struct device *dma_dev = bgmac->core->dma_dev;
36 int empty_slot;
37 bool freed = false;
38 + unsigned bytes_compl = 0, pkts_compl = 0;
39
40 /* The last slot that hardware didn't consume yet */
41 empty_slot = bgmac_read(bgmac, ring->mmio_base + BGMAC_DMA_TX_STATUS);
42 empty_slot &= BGMAC_DMA_TX_STATDPTR;
43 + empty_slot -= ring->index_base;
44 + empty_slot &= BGMAC_DMA_TX_STATDPTR;
45 empty_slot /= sizeof(struct bgmac_dma_desc);
46
47 while (ring->start != empty_slot) {
48 @@ -192,6 +198,9 @@ static void bgmac_dma_tx_free(struct bgm
49 slot->skb->len, DMA_TO_DEVICE);
50 slot->dma_addr = 0;
51
52 + bytes_compl += slot->skb->len;
53 + pkts_compl++;
54 +
55 /* Free memory! :) */
56 dev_kfree_skb(slot->skb);
57 slot->skb = NULL;
58 @@ -205,6 +214,8 @@ static void bgmac_dma_tx_free(struct bgm
59 freed = true;
60 }
61
62 + netdev_completed_queue(bgmac->net_dev, pkts_compl, bytes_compl);
63 +
64 if (freed && netif_queue_stopped(bgmac->net_dev))
65 netif_wake_queue(bgmac->net_dev);
66 }
67 @@ -241,31 +252,59 @@ static int bgmac_dma_rx_skb_for_slot(str
68 struct bgmac_slot_info *slot)
69 {
70 struct device *dma_dev = bgmac->core->dma_dev;
71 + struct sk_buff *skb;
72 + dma_addr_t dma_addr;
73 struct bgmac_rx_header *rx;
74
75 /* Alloc skb */
76 - slot->skb = netdev_alloc_skb(bgmac->net_dev, BGMAC_RX_BUF_SIZE);
77 - if (!slot->skb)
78 + skb = netdev_alloc_skb(bgmac->net_dev, BGMAC_RX_BUF_SIZE);
79 + if (!skb)
80 return -ENOMEM;
81
82 /* Poison - if everything goes fine, hardware will overwrite it */
83 - rx = (struct bgmac_rx_header *)slot->skb->data;
84 + rx = (struct bgmac_rx_header *)skb->data;
85 rx->len = cpu_to_le16(0xdead);
86 rx->flags = cpu_to_le16(0xbeef);
87
88 /* Map skb for the DMA */
89 - slot->dma_addr = dma_map_single(dma_dev, slot->skb->data,
90 - BGMAC_RX_BUF_SIZE, DMA_FROM_DEVICE);
91 - if (dma_mapping_error(dma_dev, slot->dma_addr)) {
92 + dma_addr = dma_map_single(dma_dev, skb->data,
93 + BGMAC_RX_BUF_SIZE, DMA_FROM_DEVICE);
94 + if (dma_mapping_error(dma_dev, dma_addr)) {
95 bgmac_err(bgmac, "DMA mapping error\n");
96 + dev_kfree_skb(skb);
97 return -ENOMEM;
98 }
99 +
100 + /* Update the slot */
101 + slot->skb = skb;
102 + slot->dma_addr = dma_addr;
103 +
104 if (slot->dma_addr & 0xC0000000)
105 bgmac_warn(bgmac, "DMA address using 0xC0000000 bit(s), it may need translation trick\n");
106
107 return 0;
108 }
109
110 +static void bgmac_dma_rx_setup_desc(struct bgmac *bgmac,
111 + struct bgmac_dma_ring *ring, int desc_idx)
112 +{
113 + struct bgmac_dma_desc *dma_desc = ring->cpu_base + desc_idx;
114 + u32 ctl0 = 0, ctl1 = 0;
115 +
116 + if (desc_idx == ring->num_slots - 1)
117 + ctl0 |= BGMAC_DESC_CTL0_EOT;
118 + ctl1 |= BGMAC_RX_BUF_SIZE & BGMAC_DESC_CTL1_LEN;
119 + /* Is there any BGMAC device that requires extension? */
120 + /* ctl1 |= (addrext << B43_DMA64_DCTL1_ADDREXT_SHIFT) &
121 + * B43_DMA64_DCTL1_ADDREXT_MASK;
122 + */
123 +
124 + dma_desc->addr_low = cpu_to_le32(lower_32_bits(ring->slots[desc_idx].dma_addr));
125 + dma_desc->addr_high = cpu_to_le32(upper_32_bits(ring->slots[desc_idx].dma_addr));
126 + dma_desc->ctl0 = cpu_to_le32(ctl0);
127 + dma_desc->ctl1 = cpu_to_le32(ctl1);
128 +}
129 +
130 static int bgmac_dma_rx_read(struct bgmac *bgmac, struct bgmac_dma_ring *ring,
131 int weight)
132 {
133 @@ -274,6 +313,8 @@ static int bgmac_dma_rx_read(struct bgma
134
135 end_slot = bgmac_read(bgmac, ring->mmio_base + BGMAC_DMA_RX_STATUS);
136 end_slot &= BGMAC_DMA_RX_STATDPTR;
137 + end_slot -= ring->index_base;
138 + end_slot &= BGMAC_DMA_RX_STATDPTR;
139 end_slot /= sizeof(struct bgmac_dma_desc);
140
141 ring->end = end_slot;
142 @@ -282,7 +323,6 @@ static int bgmac_dma_rx_read(struct bgma
143 struct device *dma_dev = bgmac->core->dma_dev;
144 struct bgmac_slot_info *slot = &ring->slots[ring->start];
145 struct sk_buff *skb = slot->skb;
146 - struct sk_buff *new_skb;
147 struct bgmac_rx_header *rx;
148 u16 len, flags;
149
150 @@ -295,38 +335,51 @@ static int bgmac_dma_rx_read(struct bgma
151 len = le16_to_cpu(rx->len);
152 flags = le16_to_cpu(rx->flags);
153
154 - /* Check for poison and drop or pass the packet */
155 - if (len == 0xdead && flags == 0xbeef) {
156 - bgmac_err(bgmac, "Found poisoned packet at slot %d, DMA issue!\n",
157 - ring->start);
158 - } else {
159 + do {
160 + dma_addr_t old_dma_addr = slot->dma_addr;
161 + int err;
162 +
163 + /* Check for poison and drop or pass the packet */
164 + if (len == 0xdead && flags == 0xbeef) {
165 + bgmac_err(bgmac, "Found poisoned packet at slot %d, DMA issue!\n",
166 + ring->start);
167 + dma_sync_single_for_device(dma_dev,
168 + slot->dma_addr,
169 + BGMAC_RX_BUF_SIZE,
170 + DMA_FROM_DEVICE);
171 + break;
172 + }
173 +
174 /* Omit CRC. */
175 len -= ETH_FCS_LEN;
176
177 - new_skb = netdev_alloc_skb_ip_align(bgmac->net_dev, len);
178 - if (new_skb) {
179 - skb_put(new_skb, len);
180 - skb_copy_from_linear_data_offset(skb, BGMAC_RX_FRAME_OFFSET,
181 - new_skb->data,
182 - len);
183 - skb_checksum_none_assert(skb);
184 - new_skb->protocol =
185 - eth_type_trans(new_skb, bgmac->net_dev);
186 - netif_receive_skb(new_skb);
187 - handled++;
188 - } else {
189 - bgmac->net_dev->stats.rx_dropped++;
190 - bgmac_err(bgmac, "Allocation of skb for copying packet failed!\n");
191 + /* Prepare new skb as replacement */
192 + err = bgmac_dma_rx_skb_for_slot(bgmac, slot);
193 + if (err) {
194 + /* Poison the old skb */
195 + rx->len = cpu_to_le16(0xdead);
196 + rx->flags = cpu_to_le16(0xbeef);
197 +
198 + dma_sync_single_for_device(dma_dev,
199 + slot->dma_addr,
200 + BGMAC_RX_BUF_SIZE,
201 + DMA_FROM_DEVICE);
202 + break;
203 }
204 + bgmac_dma_rx_setup_desc(bgmac, ring, ring->start);
205
206 - /* Poison the old skb */
207 - rx->len = cpu_to_le16(0xdead);
208 - rx->flags = cpu_to_le16(0xbeef);
209 - }
210 -
211 - /* Make it back accessible to the hardware */
212 - dma_sync_single_for_device(dma_dev, slot->dma_addr,
213 - BGMAC_RX_BUF_SIZE, DMA_FROM_DEVICE);
214 + /* Unmap old skb, we'll pass it to the netfif */
215 + dma_unmap_single(dma_dev, old_dma_addr,
216 + BGMAC_RX_BUF_SIZE, DMA_FROM_DEVICE);
217 +
218 + skb_put(skb, BGMAC_RX_FRAME_OFFSET + len);
219 + skb_pull(skb, BGMAC_RX_FRAME_OFFSET);
220 +
221 + skb_checksum_none_assert(skb);
222 + skb->protocol = eth_type_trans(skb, bgmac->net_dev);
223 + netif_receive_skb(skb);
224 + handled++;
225 + } while (0);
226
227 if (++ring->start >= BGMAC_RX_RING_SLOTS)
228 ring->start = 0;
229 @@ -418,9 +471,6 @@ static int bgmac_dma_alloc(struct bgmac
230 ring = &bgmac->tx_ring[i];
231 ring->num_slots = BGMAC_TX_RING_SLOTS;
232 ring->mmio_base = ring_base[i];
233 - if (bgmac_dma_unaligned(bgmac, ring, BGMAC_DMA_RING_TX))
234 - bgmac_warn(bgmac, "TX on ring 0x%X supports unaligned addressing but this feature is not implemented\n",
235 - ring->mmio_base);
236
237 /* Alloc ring of descriptors */
238 size = ring->num_slots * sizeof(struct bgmac_dma_desc);
239 @@ -435,6 +485,13 @@ static int bgmac_dma_alloc(struct bgmac
240 if (ring->dma_base & 0xC0000000)
241 bgmac_warn(bgmac, "DMA address using 0xC0000000 bit(s), it may need translation trick\n");
242
243 + ring->unaligned = bgmac_dma_unaligned(bgmac, ring,
244 + BGMAC_DMA_RING_TX);
245 + if (ring->unaligned)
246 + ring->index_base = lower_32_bits(ring->dma_base);
247 + else
248 + ring->index_base = 0;
249 +
250 /* No need to alloc TX slots yet */
251 }
252
253 @@ -444,9 +501,6 @@ static int bgmac_dma_alloc(struct bgmac
254 ring = &bgmac->rx_ring[i];
255 ring->num_slots = BGMAC_RX_RING_SLOTS;
256 ring->mmio_base = ring_base[i];
257 - if (bgmac_dma_unaligned(bgmac, ring, BGMAC_DMA_RING_RX))
258 - bgmac_warn(bgmac, "RX on ring 0x%X supports unaligned addressing but this feature is not implemented\n",
259 - ring->mmio_base);
260
261 /* Alloc ring of descriptors */
262 size = ring->num_slots * sizeof(struct bgmac_dma_desc);
263 @@ -462,6 +516,13 @@ static int bgmac_dma_alloc(struct bgmac
264 if (ring->dma_base & 0xC0000000)
265 bgmac_warn(bgmac, "DMA address using 0xC0000000 bit(s), it may need translation trick\n");
266
267 + ring->unaligned = bgmac_dma_unaligned(bgmac, ring,
268 + BGMAC_DMA_RING_RX);
269 + if (ring->unaligned)
270 + ring->index_base = lower_32_bits(ring->dma_base);
271 + else
272 + ring->index_base = 0;
273 +
274 /* Alloc RX slots */
275 for (j = 0; j < ring->num_slots; j++) {
276 err = bgmac_dma_rx_skb_for_slot(bgmac, &ring->slots[j]);
277 @@ -482,19 +543,19 @@ err_dma_free:
278 static void bgmac_dma_init(struct bgmac *bgmac)
279 {
280 struct bgmac_dma_ring *ring;
281 - struct bgmac_dma_desc *dma_desc;
282 - u32 ctl0, ctl1;
283 int i;
284
285 for (i = 0; i < BGMAC_MAX_TX_RINGS; i++) {
286 ring = &bgmac->tx_ring[i];
287
288 - /* We don't implement unaligned addressing, so enable first */
289 - bgmac_dma_tx_enable(bgmac, ring);
290 + if (!ring->unaligned)
291 + bgmac_dma_tx_enable(bgmac, ring);
292 bgmac_write(bgmac, ring->mmio_base + BGMAC_DMA_TX_RINGLO,
293 lower_32_bits(ring->dma_base));
294 bgmac_write(bgmac, ring->mmio_base + BGMAC_DMA_TX_RINGHI,
295 upper_32_bits(ring->dma_base));
296 + if (ring->unaligned)
297 + bgmac_dma_tx_enable(bgmac, ring);
298
299 ring->start = 0;
300 ring->end = 0; /* Points the slot that should *not* be read */
301 @@ -505,32 +566,20 @@ static void bgmac_dma_init(struct bgmac
302
303 ring = &bgmac->rx_ring[i];
304
305 - /* We don't implement unaligned addressing, so enable first */
306 - bgmac_dma_rx_enable(bgmac, ring);
307 + if (!ring->unaligned)
308 + bgmac_dma_rx_enable(bgmac, ring);
309 bgmac_write(bgmac, ring->mmio_base + BGMAC_DMA_RX_RINGLO,
310 lower_32_bits(ring->dma_base));
311 bgmac_write(bgmac, ring->mmio_base + BGMAC_DMA_RX_RINGHI,
312 upper_32_bits(ring->dma_base));
313 + if (ring->unaligned)
314 + bgmac_dma_rx_enable(bgmac, ring);
315
316 - for (j = 0, dma_desc = ring->cpu_base; j < ring->num_slots;
317 - j++, dma_desc++) {
318 - ctl0 = ctl1 = 0;
319 -
320 - if (j == ring->num_slots - 1)
321 - ctl0 |= BGMAC_DESC_CTL0_EOT;
322 - ctl1 |= BGMAC_RX_BUF_SIZE & BGMAC_DESC_CTL1_LEN;
323 - /* Is there any BGMAC device that requires extension? */
324 - /* ctl1 |= (addrext << B43_DMA64_DCTL1_ADDREXT_SHIFT) &
325 - * B43_DMA64_DCTL1_ADDREXT_MASK;
326 - */
327 -
328 - dma_desc->addr_low = cpu_to_le32(lower_32_bits(ring->slots[j].dma_addr));
329 - dma_desc->addr_high = cpu_to_le32(upper_32_bits(ring->slots[j].dma_addr));
330 - dma_desc->ctl0 = cpu_to_le32(ctl0);
331 - dma_desc->ctl1 = cpu_to_le32(ctl1);
332 - }
333 + for (j = 0; j < ring->num_slots; j++)
334 + bgmac_dma_rx_setup_desc(bgmac, ring, j);
335
336 bgmac_write(bgmac, ring->mmio_base + BGMAC_DMA_RX_INDEX,
337 + ring->index_base +
338 ring->num_slots * sizeof(struct bgmac_dma_desc));
339
340 ring->start = 0;
341 @@ -633,70 +682,6 @@ static int bgmac_phy_write(struct bgmac
342 return 0;
343 }
344
345 -/* http://bcm-v4.sipsolutions.net/mac-gbit/gmac/chipphyforce */
346 -static void bgmac_phy_force(struct bgmac *bgmac)
347 -{
348 - u16 ctl;
349 - u16 mask = ~(BGMAC_PHY_CTL_SPEED | BGMAC_PHY_CTL_SPEED_MSB |
350 - BGMAC_PHY_CTL_ANENAB | BGMAC_PHY_CTL_DUPLEX);
351 -
352 - if (bgmac->phyaddr == BGMAC_PHY_NOREGS)
353 - return;
354 -
355 - if (bgmac->autoneg)
356 - return;
357 -
358 - ctl = bgmac_phy_read(bgmac, bgmac->phyaddr, BGMAC_PHY_CTL);
359 - ctl &= mask;
360 - if (bgmac->full_duplex)
361 - ctl |= BGMAC_PHY_CTL_DUPLEX;
362 - if (bgmac->speed == BGMAC_SPEED_100)
363 - ctl |= BGMAC_PHY_CTL_SPEED_100;
364 - else if (bgmac->speed == BGMAC_SPEED_1000)
365 - ctl |= BGMAC_PHY_CTL_SPEED_1000;
366 - bgmac_phy_write(bgmac, bgmac->phyaddr, BGMAC_PHY_CTL, ctl);
367 -}
368 -
369 -/* http://bcm-v4.sipsolutions.net/mac-gbit/gmac/chipphyadvertise */
370 -static void bgmac_phy_advertise(struct bgmac *bgmac)
371 -{
372 - u16 adv;
373 -
374 - if (bgmac->phyaddr == BGMAC_PHY_NOREGS)
375 - return;
376 -
377 - if (!bgmac->autoneg)
378 - return;
379 -
380 - /* Adv selected 10/100 speeds */
381 - adv = bgmac_phy_read(bgmac, bgmac->phyaddr, BGMAC_PHY_ADV);
382 - adv &= ~(BGMAC_PHY_ADV_10HALF | BGMAC_PHY_ADV_10FULL |
383 - BGMAC_PHY_ADV_100HALF | BGMAC_PHY_ADV_100FULL);
384 - if (!bgmac->full_duplex && bgmac->speed & BGMAC_SPEED_10)
385 - adv |= BGMAC_PHY_ADV_10HALF;
386 - if (!bgmac->full_duplex && bgmac->speed & BGMAC_SPEED_100)
387 - adv |= BGMAC_PHY_ADV_100HALF;
388 - if (bgmac->full_duplex && bgmac->speed & BGMAC_SPEED_10)
389 - adv |= BGMAC_PHY_ADV_10FULL;
390 - if (bgmac->full_duplex && bgmac->speed & BGMAC_SPEED_100)
391 - adv |= BGMAC_PHY_ADV_100FULL;
392 - bgmac_phy_write(bgmac, bgmac->phyaddr, BGMAC_PHY_ADV, adv);
393 -
394 - /* Adv selected 1000 speeds */
395 - adv = bgmac_phy_read(bgmac, bgmac->phyaddr, BGMAC_PHY_ADV2);
396 - adv &= ~(BGMAC_PHY_ADV2_1000HALF | BGMAC_PHY_ADV2_1000FULL);
397 - if (!bgmac->full_duplex && bgmac->speed & BGMAC_SPEED_1000)
398 - adv |= BGMAC_PHY_ADV2_1000HALF;
399 - if (bgmac->full_duplex && bgmac->speed & BGMAC_SPEED_1000)
400 - adv |= BGMAC_PHY_ADV2_1000FULL;
401 - bgmac_phy_write(bgmac, bgmac->phyaddr, BGMAC_PHY_ADV2, adv);
402 -
403 - /* Restart */
404 - bgmac_phy_write(bgmac, bgmac->phyaddr, BGMAC_PHY_CTL,
405 - bgmac_phy_read(bgmac, bgmac->phyaddr, BGMAC_PHY_CTL) |
406 - BGMAC_PHY_CTL_RESTART);
407 -}
408 -
409 /* http://bcm-v4.sipsolutions.net/mac-gbit/gmac/chipphyinit */
410 static void bgmac_phy_init(struct bgmac *bgmac)
411 {
412 @@ -827,19 +812,28 @@ static void bgmac_clear_mib(struct bgmac
413 }
414
415 /* http://bcm-v4.sipsolutions.net/mac-gbit/gmac/gmac_speed */
416 -static void bgmac_speed(struct bgmac *bgmac, int speed)
417 +static void bgmac_mac_speed(struct bgmac *bgmac)
418 {
419 u32 mask = ~(BGMAC_CMDCFG_ES_MASK | BGMAC_CMDCFG_HD);
420 u32 set = 0;
421
422 - if (speed & BGMAC_SPEED_10)
423 + switch (bgmac->mac_speed) {
424 + case SPEED_10:
425 set |= BGMAC_CMDCFG_ES_10;
426 - if (speed & BGMAC_SPEED_100)
427 + break;
428 + case SPEED_100:
429 set |= BGMAC_CMDCFG_ES_100;
430 - if (speed & BGMAC_SPEED_1000)
431 + break;
432 + case SPEED_1000:
433 set |= BGMAC_CMDCFG_ES_1000;
434 - if (!bgmac->full_duplex)
435 + break;
436 + default:
437 + bgmac_err(bgmac, "Unsupported speed: %d\n", bgmac->mac_speed);
438 + }
439 +
440 + if (bgmac->mac_duplex == DUPLEX_HALF)
441 set |= BGMAC_CMDCFG_HD;
442 +
443 bgmac_cmdcfg_maskset(bgmac, mask, set, true);
444 }
445
446 @@ -848,10 +842,9 @@ static void bgmac_miiconfig(struct bgmac
447 u8 imode = (bgmac_read(bgmac, BGMAC_DEV_STATUS) & BGMAC_DS_MM_MASK) >>
448 BGMAC_DS_MM_SHIFT;
449 if (imode == 0 || imode == 1) {
450 - if (bgmac->autoneg)
451 - bgmac_speed(bgmac, BGMAC_SPEED_100);
452 - else
453 - bgmac_speed(bgmac, bgmac->speed);
454 + bgmac->mac_speed = SPEED_100;
455 + bgmac->mac_duplex = DUPLEX_FULL;
456 + bgmac_mac_speed(bgmac);
457 }
458 }
459
460 @@ -884,9 +877,9 @@ static void bgmac_chip_reset(struct bgma
461 }
462
463 iost = bcma_aread32(core, BCMA_IOST);
464 - if ((ci->id == BCMA_CHIP_ID_BCM5357 && ci->pkg == 10) ||
465 + if ((ci->id == BCMA_CHIP_ID_BCM5357 && ci->pkg == BCMA_PKG_ID_BCM47186) ||
466 (ci->id == BCMA_CHIP_ID_BCM4749 && ci->pkg == 10) ||
467 - (ci->id == BCMA_CHIP_ID_BCM53572 && ci->pkg == 9))
468 + (ci->id == BCMA_CHIP_ID_BCM53572 && ci->pkg == BCMA_PKG_ID_BCM47188))
469 iost &= ~BGMAC_BCMA_IOST_ATTACHED;
470
471 if (iost & BGMAC_BCMA_IOST_ATTACHED) {
472 @@ -898,30 +891,35 @@ static void bgmac_chip_reset(struct bgma
473 bcma_core_enable(core, flags);
474
475 if (core->id.rev > 2) {
476 - bgmac_set(bgmac, BCMA_CLKCTLST, 1 << 8);
477 - bgmac_wait_value(bgmac->core, BCMA_CLKCTLST, 1 << 24, 1 << 24,
478 + bgmac_set(bgmac, BCMA_CLKCTLST,
479 + BGMAC_BCMA_CLKCTLST_MISC_PLL_REQ);
480 + bgmac_wait_value(bgmac->core, BCMA_CLKCTLST,
481 + BGMAC_BCMA_CLKCTLST_MISC_PLL_ST,
482 + BGMAC_BCMA_CLKCTLST_MISC_PLL_ST,
483 1000);
484 }
485
486 - if (ci->id == BCMA_CHIP_ID_BCM5357 || ci->id == BCMA_CHIP_ID_BCM4749 ||
487 + if (ci->id == BCMA_CHIP_ID_BCM5357 ||
488 + ci->id == BCMA_CHIP_ID_BCM4749 ||
489 ci->id == BCMA_CHIP_ID_BCM53572) {
490 struct bcma_drv_cc *cc = &bgmac->core->bus->drv_cc;
491 u8 et_swtype = 0;
492 u8 sw_type = BGMAC_CHIPCTL_1_SW_TYPE_EPHY |
493 BGMAC_CHIPCTL_1_IF_TYPE_MII;
494 - char buf[2];
495 + char buf[4];
496
497 - if (bcm47xx_nvram_getenv("et_swtype", buf, 1) > 0) {
498 + if (bcm47xx_nvram_getenv("et_swtype", buf, sizeof(buf)) > 0) {
499 if (kstrtou8(buf, 0, &et_swtype))
500 bgmac_err(bgmac, "Failed to parse et_swtype (%s)\n",
501 buf);
502 et_swtype &= 0x0f;
503 et_swtype <<= 4;
504 sw_type = et_swtype;
505 - } else if (ci->id == BCMA_CHIP_ID_BCM5357 && ci->pkg == 9) {
506 + } else if (ci->id == BCMA_CHIP_ID_BCM5357 && ci->pkg == BCMA_PKG_ID_BCM5358) {
507 sw_type = BGMAC_CHIPCTL_1_SW_TYPE_EPHYRMII;
508 - } else if ((ci->id != BCMA_CHIP_ID_BCM53572 && ci->pkg == 10) ||
509 - (ci->id == BCMA_CHIP_ID_BCM53572 && ci->pkg == 9)) {
510 + } else if ((ci->id == BCMA_CHIP_ID_BCM5357 && ci->pkg == BCMA_PKG_ID_BCM47186) ||
511 + (ci->id == BCMA_CHIP_ID_BCM4749 && ci->pkg == 10) ||
512 + (ci->id == BCMA_CHIP_ID_BCM53572 && ci->pkg == BCMA_PKG_ID_BCM47188)) {
513 sw_type = BGMAC_CHIPCTL_1_IF_TYPE_RGMII |
514 BGMAC_CHIPCTL_1_SW_TYPE_RGMII;
515 }
516 @@ -960,6 +958,8 @@ static void bgmac_chip_reset(struct bgma
517 BGMAC_CMDCFG_CFE |
518 BGMAC_CMDCFG_SR,
519 false);
520 + bgmac->mac_speed = SPEED_UNKNOWN;
521 + bgmac->mac_duplex = DUPLEX_UNKNOWN;
522
523 bgmac_clear_mib(bgmac);
524 if (core->id.id == BCMA_CORE_4706_MAC_GBIT)
525 @@ -970,6 +970,8 @@ static void bgmac_chip_reset(struct bgma
526 bgmac_miiconfig(bgmac);
527 bgmac_phy_init(bgmac);
528
529 + netdev_reset_queue(bgmac->net_dev);
530 +
531 bgmac->int_status = 0;
532 }
533
534 @@ -1057,13 +1059,6 @@ static void bgmac_chip_init(struct bgmac
535
536 bgmac_write(bgmac, BGMAC_RXMAX_LENGTH, 32 + ETHER_MAX_LEN);
537
538 - if (!bgmac->autoneg) {
539 - bgmac_speed(bgmac, bgmac->speed);
540 - bgmac_phy_force(bgmac);
541 - } else if (bgmac->speed) { /* if there is anything to adv */
542 - bgmac_phy_advertise(bgmac);
543 - }
544 -
545 if (full_init) {
546 bgmac_dma_init(bgmac);
547 if (1) /* FIXME: is there any case we don't want IRQs? */
548 @@ -1153,6 +1148,8 @@ static int bgmac_open(struct net_device
549 }
550 napi_enable(&bgmac->napi);
551
552 + phy_start(bgmac->phy_dev);
553 +
554 netif_carrier_on(net_dev);
555
556 err_out:
557 @@ -1165,6 +1162,8 @@ static int bgmac_stop(struct net_device
558
559 netif_carrier_off(net_dev);
560
561 + phy_stop(bgmac->phy_dev);
562 +
563 napi_disable(&bgmac->napi);
564 bgmac_chip_intrs_off(bgmac);
565 free_irq(bgmac->core->irq, net_dev);
566 @@ -1243,61 +1242,16 @@ static int bgmac_get_settings(struct net
567 {
568 struct bgmac *bgmac = netdev_priv(net_dev);
569
570 - cmd->supported = SUPPORTED_10baseT_Half |
571 - SUPPORTED_10baseT_Full |
572 - SUPPORTED_100baseT_Half |
573 - SUPPORTED_100baseT_Full |
574 - SUPPORTED_1000baseT_Half |
575 - SUPPORTED_1000baseT_Full |
576 - SUPPORTED_Autoneg;
577 -
578 - if (bgmac->autoneg) {
579 - WARN_ON(cmd->advertising);
580 - if (bgmac->full_duplex) {
581 - if (bgmac->speed & BGMAC_SPEED_10)
582 - cmd->advertising |= ADVERTISED_10baseT_Full;
583 - if (bgmac->speed & BGMAC_SPEED_100)
584 - cmd->advertising |= ADVERTISED_100baseT_Full;
585 - if (bgmac->speed & BGMAC_SPEED_1000)
586 - cmd->advertising |= ADVERTISED_1000baseT_Full;
587 - } else {
588 - if (bgmac->speed & BGMAC_SPEED_10)
589 - cmd->advertising |= ADVERTISED_10baseT_Half;
590 - if (bgmac->speed & BGMAC_SPEED_100)
591 - cmd->advertising |= ADVERTISED_100baseT_Half;
592 - if (bgmac->speed & BGMAC_SPEED_1000)
593 - cmd->advertising |= ADVERTISED_1000baseT_Half;
594 - }
595 - } else {
596 - switch (bgmac->speed) {
597 - case BGMAC_SPEED_10:
598 - ethtool_cmd_speed_set(cmd, SPEED_10);
599 - break;
600 - case BGMAC_SPEED_100:
601 - ethtool_cmd_speed_set(cmd, SPEED_100);
602 - break;
603 - case BGMAC_SPEED_1000:
604 - ethtool_cmd_speed_set(cmd, SPEED_1000);
605 - break;
606 - }
607 - }
608 -
609 - cmd->duplex = bgmac->full_duplex ? DUPLEX_FULL : DUPLEX_HALF;
610 -
611 - cmd->autoneg = bgmac->autoneg;
612 -
613 - return 0;
614 + return phy_ethtool_gset(bgmac->phy_dev, cmd);
615 }
616
617 -#if 0
618 static int bgmac_set_settings(struct net_device *net_dev,
619 struct ethtool_cmd *cmd)
620 {
621 struct bgmac *bgmac = netdev_priv(net_dev);
622
623 - return -1;
624 + return phy_ethtool_sset(bgmac->phy_dev, cmd);
625 }
626 -#endif
627
628 static void bgmac_get_drvinfo(struct net_device *net_dev,
629 struct ethtool_drvinfo *info)
630 @@ -1308,6 +1262,7 @@ static void bgmac_get_drvinfo(struct net
631
632 static const struct ethtool_ops bgmac_ethtool_ops = {
633 .get_settings = bgmac_get_settings,
634 + .set_settings = bgmac_set_settings,
635 .get_drvinfo = bgmac_get_drvinfo,
636 };
637
638 @@ -1326,9 +1281,35 @@ static int bgmac_mii_write(struct mii_bu
639 return bgmac_phy_write(bus->priv, mii_id, regnum, value);
640 }
641
642 +static void bgmac_adjust_link(struct net_device *net_dev)
643 +{
644 + struct bgmac *bgmac = netdev_priv(net_dev);
645 + struct phy_device *phy_dev = bgmac->phy_dev;
646 + bool update = false;
647 +
648 + if (phy_dev->link) {
649 + if (phy_dev->speed != bgmac->mac_speed) {
650 + bgmac->mac_speed = phy_dev->speed;
651 + update = true;
652 + }
653 +
654 + if (phy_dev->duplex != bgmac->mac_duplex) {
655 + bgmac->mac_duplex = phy_dev->duplex;
656 + update = true;
657 + }
658 + }
659 +
660 + if (update) {
661 + bgmac_mac_speed(bgmac);
662 + phy_print_status(phy_dev);
663 + }
664 +}
665 +
666 static int bgmac_mii_register(struct bgmac *bgmac)
667 {
668 struct mii_bus *mii_bus;
669 + struct phy_device *phy_dev;
670 + char bus_id[MII_BUS_ID_SIZE + 3];
671 int i, err = 0;
672
673 mii_bus = mdiobus_alloc();
674 @@ -1360,8 +1341,22 @@ static int bgmac_mii_register(struct bgm
675
676 bgmac->mii_bus = mii_bus;
677
678 + /* Connect to the PHY */
679 + snprintf(bus_id, sizeof(bus_id), PHY_ID_FMT, mii_bus->id,
680 + bgmac->phyaddr);
681 + phy_dev = phy_connect(bgmac->net_dev, bus_id, &bgmac_adjust_link,
682 + PHY_INTERFACE_MODE_MII);
683 + if (IS_ERR(phy_dev)) {
684 + bgmac_err(bgmac, "PHY connecton failed\n");
685 + err = PTR_ERR(phy_dev);
686 + goto err_unregister_bus;
687 + }
688 + bgmac->phy_dev = phy_dev;
689 +
690 return err;
691
692 +err_unregister_bus:
693 + mdiobus_unregister(mii_bus);
694 err_free_irq:
695 kfree(mii_bus->irq);
696 err_free_bus:
697 @@ -1416,9 +1411,6 @@ static int bgmac_probe(struct bcma_devic
698 bcma_set_drvdata(core, bgmac);
699
700 /* Defaults */
701 - bgmac->autoneg = true;
702 - bgmac->full_duplex = true;
703 - bgmac->speed = BGMAC_SPEED_10 | BGMAC_SPEED_100 | BGMAC_SPEED_1000;
704 memcpy(bgmac->net_dev->dev_addr, mac, ETH_ALEN);
705
706 /* On BCM4706 we need common core to access PHY */
707 --- a/drivers/net/ethernet/broadcom/bgmac.h
708 +++ b/drivers/net/ethernet/broadcom/bgmac.h
709 @@ -95,7 +95,11 @@
710 #define BGMAC_RXQ_CTL_MDP_SHIFT 24
711 #define BGMAC_GPIO_SELECT 0x194
712 #define BGMAC_GPIO_OUTPUT_EN 0x198
713 -/* For 0x1e0 see BCMA_CLKCTLST */
714 +
715 +/* For 0x1e0 see BCMA_CLKCTLST. Below are BGMAC specific bits */
716 +#define BGMAC_BCMA_CLKCTLST_MISC_PLL_REQ 0x00000100
717 +#define BGMAC_BCMA_CLKCTLST_MISC_PLL_ST 0x01000000
718 +
719 #define BGMAC_HW_WAR 0x1e4
720 #define BGMAC_PWR_CTL 0x1e8
721 #define BGMAC_DMA_BASE0 0x200 /* Tx and Rx controller */
722 @@ -342,10 +346,6 @@
723 #define BGMAC_CHIPCTL_1_SW_TYPE_RGMII 0x000000C0
724 #define BGMAC_CHIPCTL_1_RXC_DLL_BYPASS 0x00010000
725
726 -#define BGMAC_SPEED_10 0x0001
727 -#define BGMAC_SPEED_100 0x0002
728 -#define BGMAC_SPEED_1000 0x0004
729 -
730 #define BGMAC_WEIGHT 64
731
732 #define ETHER_MAX_LEN 1518
733 @@ -384,6 +384,8 @@ struct bgmac_dma_ring {
734 u16 mmio_base;
735 struct bgmac_dma_desc *cpu_base;
736 dma_addr_t dma_base;
737 + u32 index_base; /* Used for unaligned rings only, otherwise 0 */
738 + bool unaligned;
739
740 struct bgmac_slot_info slots[BGMAC_RX_RING_SLOTS];
741 };
742 @@ -400,6 +402,7 @@ struct bgmac {
743 struct net_device *net_dev;
744 struct napi_struct napi;
745 struct mii_bus *mii_bus;
746 + struct phy_device *phy_dev;
747
748 /* DMA */
749 struct bgmac_dma_ring tx_ring[BGMAC_MAX_TX_RINGS];
750 @@ -414,10 +417,9 @@ struct bgmac {
751 u32 int_mask;
752 u32 int_status;
753
754 - /* Speed-related */
755 - int speed;
756 - bool autoneg;
757 - bool full_duplex;
758 + /* Current MAC state */
759 + int mac_speed;
760 + int mac_duplex;
761
762 u8 phyaddr;
763 bool has_robosw;
OpenWrt Source Repository