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kernel: add a ssb backport required for a new mac80211 update
[openwrt/openwrt.git] / target / linux / generic / patches-3.9 / 020-ssb_update.patch
1 --- a/drivers/ssb/Kconfig
2 +++ b/drivers/ssb/Kconfig
3 @@ -138,13 +138,13 @@ config SSB_DRIVER_MIPS
4
5 config SSB_SFLASH
6 bool "SSB serial flash support"
7 - depends on SSB_DRIVER_MIPS && BROKEN
8 + depends on SSB_DRIVER_MIPS
9 default y
10
11 # Assumption: We are on embedded, if we compile the MIPS core.
12 config SSB_EMBEDDED
13 bool
14 - depends on SSB_DRIVER_MIPS
15 + depends on SSB_DRIVER_MIPS && SSB_PCICORE_HOSTMODE
16 default y
17
18 config SSB_DRIVER_EXTIF
19 --- a/drivers/ssb/driver_chipcommon.c
20 +++ b/drivers/ssb/driver_chipcommon.c
21 @@ -354,7 +354,7 @@ void ssb_chipcommon_init(struct ssb_chip
22
23 if (cc->dev->id.revision >= 11)
24 cc->status = chipco_read32(cc, SSB_CHIPCO_CHIPSTAT);
25 - ssb_dprintk(KERN_INFO PFX "chipcommon status is 0x%x\n", cc->status);
26 + ssb_dbg("chipcommon status is 0x%x\n", cc->status);
27
28 if (cc->dev->id.revision >= 20) {
29 chipco_write32(cc, SSB_CHIPCO_GPIOPULLUP, 0);
30 --- a/drivers/ssb/driver_chipcommon_pmu.c
31 +++ b/drivers/ssb/driver_chipcommon_pmu.c
32 @@ -110,8 +110,8 @@ static void ssb_pmu0_pllinit_r0(struct s
33 return;
34 }
35
36 - ssb_printk(KERN_INFO PFX "Programming PLL to %u.%03u MHz\n",
37 - (crystalfreq / 1000), (crystalfreq % 1000));
38 + ssb_info("Programming PLL to %u.%03u MHz\n",
39 + crystalfreq / 1000, crystalfreq % 1000);
40
41 /* First turn the PLL off. */
42 switch (bus->chip_id) {
43 @@ -138,7 +138,7 @@ static void ssb_pmu0_pllinit_r0(struct s
44 }
45 tmp = chipco_read32(cc, SSB_CHIPCO_CLKCTLST);
46 if (tmp & SSB_CHIPCO_CLKCTLST_HAVEHT)
47 - ssb_printk(KERN_EMERG PFX "Failed to turn the PLL off!\n");
48 + ssb_emerg("Failed to turn the PLL off!\n");
49
50 /* Set PDIV in PLL control 0. */
51 pllctl = ssb_chipco_pll_read(cc, SSB_PMU0_PLLCTL0);
52 @@ -249,8 +249,8 @@ static void ssb_pmu1_pllinit_r0(struct s
53 return;
54 }
55
56 - ssb_printk(KERN_INFO PFX "Programming PLL to %u.%03u MHz\n",
57 - (crystalfreq / 1000), (crystalfreq % 1000));
58 + ssb_info("Programming PLL to %u.%03u MHz\n",
59 + crystalfreq / 1000, crystalfreq % 1000);
60
61 /* First turn the PLL off. */
62 switch (bus->chip_id) {
63 @@ -275,7 +275,7 @@ static void ssb_pmu1_pllinit_r0(struct s
64 }
65 tmp = chipco_read32(cc, SSB_CHIPCO_CLKCTLST);
66 if (tmp & SSB_CHIPCO_CLKCTLST_HAVEHT)
67 - ssb_printk(KERN_EMERG PFX "Failed to turn the PLL off!\n");
68 + ssb_emerg("Failed to turn the PLL off!\n");
69
70 /* Set p1div and p2div. */
71 pllctl = ssb_chipco_pll_read(cc, SSB_PMU1_PLLCTL0);
72 @@ -349,9 +349,8 @@ static void ssb_pmu_pll_init(struct ssb_
73 case 43222:
74 break;
75 default:
76 - ssb_printk(KERN_ERR PFX
77 - "ERROR: PLL init unknown for device %04X\n",
78 - bus->chip_id);
79 + ssb_err("ERROR: PLL init unknown for device %04X\n",
80 + bus->chip_id);
81 }
82 }
83
84 @@ -472,9 +471,8 @@ static void ssb_pmu_resources_init(struc
85 max_msk = 0xFFFFF;
86 break;
87 default:
88 - ssb_printk(KERN_ERR PFX
89 - "ERROR: PMU resource config unknown for device %04X\n",
90 - bus->chip_id);
91 + ssb_err("ERROR: PMU resource config unknown for device %04X\n",
92 + bus->chip_id);
93 }
94
95 if (updown_tab) {
96 @@ -526,8 +524,8 @@ void ssb_pmu_init(struct ssb_chipcommon
97 pmucap = chipco_read32(cc, SSB_CHIPCO_PMU_CAP);
98 cc->pmu.rev = (pmucap & SSB_CHIPCO_PMU_CAP_REVISION);
99
100 - ssb_dprintk(KERN_DEBUG PFX "Found rev %u PMU (capabilities 0x%08X)\n",
101 - cc->pmu.rev, pmucap);
102 + ssb_dbg("Found rev %u PMU (capabilities 0x%08X)\n",
103 + cc->pmu.rev, pmucap);
104
105 if (cc->pmu.rev == 1)
106 chipco_mask32(cc, SSB_CHIPCO_PMU_CTL,
107 @@ -638,9 +636,8 @@ u32 ssb_pmu_get_alp_clock(struct ssb_chi
108 case 0x5354:
109 ssb_pmu_get_alp_clock_clk0(cc);
110 default:
111 - ssb_printk(KERN_ERR PFX
112 - "ERROR: PMU alp clock unknown for device %04X\n",
113 - bus->chip_id);
114 + ssb_err("ERROR: PMU alp clock unknown for device %04X\n",
115 + bus->chip_id);
116 return 0;
117 }
118 }
119 @@ -654,9 +651,8 @@ u32 ssb_pmu_get_cpu_clock(struct ssb_chi
120 /* 5354 chip uses a non programmable PLL of frequency 240MHz */
121 return 240000000;
122 default:
123 - ssb_printk(KERN_ERR PFX
124 - "ERROR: PMU cpu clock unknown for device %04X\n",
125 - bus->chip_id);
126 + ssb_err("ERROR: PMU cpu clock unknown for device %04X\n",
127 + bus->chip_id);
128 return 0;
129 }
130 }
131 @@ -669,9 +665,8 @@ u32 ssb_pmu_get_controlclock(struct ssb_
132 case 0x5354:
133 return 120000000;
134 default:
135 - ssb_printk(KERN_ERR PFX
136 - "ERROR: PMU controlclock unknown for device %04X\n",
137 - bus->chip_id);
138 + ssb_err("ERROR: PMU controlclock unknown for device %04X\n",
139 + bus->chip_id);
140 return 0;
141 }
142 }
143 @@ -692,8 +687,23 @@ void ssb_pmu_spuravoid_pllupdate(struct
144 pmu_ctl = SSB_CHIPCO_PMU_CTL_PLL_UPD;
145 break;
146 case 43222:
147 - /* TODO: BCM43222 requires updating PLLs too */
148 - return;
149 + if (spuravoid == 1) {
150 + ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL0, 0x11500008);
151 + ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL1, 0x0C000C06);
152 + ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL2, 0x0F600a08);
153 + ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL3, 0x00000000);
154 + ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL4, 0x2001E920);
155 + ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL5, 0x88888815);
156 + } else {
157 + ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL0, 0x11100008);
158 + ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL1, 0x0c000c06);
159 + ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL2, 0x03000a08);
160 + ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL3, 0x00000000);
161 + ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL4, 0x200005c0);
162 + ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL5, 0x88888855);
163 + }
164 + pmu_ctl = SSB_CHIPCO_PMU_CTL_PLL_UPD;
165 + break;
166 default:
167 ssb_printk(KERN_ERR PFX
168 "Unknown spuravoidance settings for chip 0x%04X, not changing PLL\n",
169 --- a/drivers/ssb/driver_chipcommon_sflash.c
170 +++ b/drivers/ssb/driver_chipcommon_sflash.c
171 @@ -9,6 +9,19 @@
172
173 #include "ssb_private.h"
174
175 +static struct resource ssb_sflash_resource = {
176 + .name = "ssb_sflash",
177 + .start = SSB_FLASH2,
178 + .end = 0,
179 + .flags = IORESOURCE_MEM | IORESOURCE_READONLY,
180 +};
181 +
182 +struct platform_device ssb_sflash_dev = {
183 + .name = "ssb_sflash",
184 + .resource = &ssb_sflash_resource,
185 + .num_resources = 1,
186 +};
187 +
188 struct ssb_sflash_tbl_e {
189 char *name;
190 u32 id;
191 @@ -16,7 +29,7 @@ struct ssb_sflash_tbl_e {
192 u16 numblocks;
193 };
194
195 -static struct ssb_sflash_tbl_e ssb_sflash_st_tbl[] = {
196 +static const struct ssb_sflash_tbl_e ssb_sflash_st_tbl[] = {
197 { "M25P20", 0x11, 0x10000, 4, },
198 { "M25P40", 0x12, 0x10000, 8, },
199
200 @@ -27,7 +40,7 @@ static struct ssb_sflash_tbl_e ssb_sflas
201 { 0 },
202 };
203
204 -static struct ssb_sflash_tbl_e ssb_sflash_sst_tbl[] = {
205 +static const struct ssb_sflash_tbl_e ssb_sflash_sst_tbl[] = {
206 { "SST25WF512", 1, 0x1000, 16, },
207 { "SST25VF512", 0x48, 0x1000, 16, },
208 { "SST25WF010", 2, 0x1000, 32, },
209 @@ -45,7 +58,7 @@ static struct ssb_sflash_tbl_e ssb_sflas
210 { 0 },
211 };
212
213 -static struct ssb_sflash_tbl_e ssb_sflash_at_tbl[] = {
214 +static const struct ssb_sflash_tbl_e ssb_sflash_at_tbl[] = {
215 { "AT45DB011", 0xc, 256, 512, },
216 { "AT45DB021", 0x14, 256, 1024, },
217 { "AT45DB041", 0x1c, 256, 2048, },
218 @@ -73,7 +86,8 @@ static void ssb_sflash_cmd(struct ssb_ch
219 /* Initialize serial flash access */
220 int ssb_sflash_init(struct ssb_chipcommon *cc)
221 {
222 - struct ssb_sflash_tbl_e *e;
223 + struct ssb_sflash *sflash = &cc->dev->bus->mipscore.sflash;
224 + const struct ssb_sflash_tbl_e *e;
225 u32 id, id2;
226
227 switch (cc->capabilities & SSB_CHIPCO_CAP_FLASHT) {
228 @@ -131,10 +145,20 @@ int ssb_sflash_init(struct ssb_chipcommo
229 return -ENOTSUPP;
230 }
231
232 - pr_info("Found %s serial flash (blocksize: 0x%X, blocks: %d)\n",
233 - e->name, e->blocksize, e->numblocks);
234 -
235 - pr_err("Serial flash support is not implemented yet!\n");
236 + sflash->window = SSB_FLASH2;
237 + sflash->blocksize = e->blocksize;
238 + sflash->numblocks = e->numblocks;
239 + sflash->size = sflash->blocksize * sflash->numblocks;
240 + sflash->present = true;
241 +
242 + pr_info("Found %s serial flash (size: %dKiB, blocksize: 0x%X, blocks: %d)\n",
243 + e->name, sflash->size / 1024, e->blocksize, e->numblocks);
244 +
245 + /* Prepare platform device, but don't register it yet. It's too early,
246 + * malloc (required by device_private_init) is not available yet. */
247 + ssb_sflash_dev.resource[0].end = ssb_sflash_dev.resource[0].start +
248 + sflash->size;
249 + ssb_sflash_dev.dev.platform_data = sflash;
250
251 - return -ENOTSUPP;
252 + return 0;
253 }
254 --- a/drivers/ssb/driver_mipscore.c
255 +++ b/drivers/ssb/driver_mipscore.c
256 @@ -167,21 +167,22 @@ static void set_irq(struct ssb_device *d
257 irqflag |= (ipsflag & ~ipsflag_irq_mask[irq]);
258 ssb_write32(mdev, SSB_IPSFLAG, irqflag);
259 }
260 - ssb_dprintk(KERN_INFO PFX
261 - "set_irq: core 0x%04x, irq %d => %d\n",
262 - dev->id.coreid, oldirq+2, irq+2);
263 + ssb_dbg("set_irq: core 0x%04x, irq %d => %d\n",
264 + dev->id.coreid, oldirq+2, irq+2);
265 }
266
267 static void print_irq(struct ssb_device *dev, unsigned int irq)
268 {
269 - int i;
270 static const char *irq_name[] = {"2(S)", "3", "4", "5", "6", "D", "I"};
271 - ssb_dprintk(KERN_INFO PFX
272 - "core 0x%04x, irq :", dev->id.coreid);
273 - for (i = 0; i <= 6; i++) {
274 - ssb_dprintk(" %s%s", irq_name[i], i==irq?"*":" ");
275 - }
276 - ssb_dprintk("\n");
277 + ssb_dbg("core 0x%04x, irq : %s%s %s%s %s%s %s%s %s%s %s%s %s%s\n",
278 + dev->id.coreid,
279 + irq_name[0], irq == 0 ? "*" : " ",
280 + irq_name[1], irq == 1 ? "*" : " ",
281 + irq_name[2], irq == 2 ? "*" : " ",
282 + irq_name[3], irq == 3 ? "*" : " ",
283 + irq_name[4], irq == 4 ? "*" : " ",
284 + irq_name[5], irq == 5 ? "*" : " ",
285 + irq_name[6], irq == 6 ? "*" : " ");
286 }
287
288 static void dump_irq(struct ssb_bus *bus)
289 @@ -286,7 +287,7 @@ void ssb_mipscore_init(struct ssb_mipsco
290 if (!mcore->dev)
291 return; /* We don't have a MIPS core */
292
293 - ssb_dprintk(KERN_INFO PFX "Initializing MIPS core...\n");
294 + ssb_dbg("Initializing MIPS core...\n");
295
296 bus = mcore->dev->bus;
297 hz = ssb_clockspeed(bus);
298 @@ -334,7 +335,7 @@ void ssb_mipscore_init(struct ssb_mipsco
299 break;
300 }
301 }
302 - ssb_dprintk(KERN_INFO PFX "after irq reconfiguration\n");
303 + ssb_dbg("after irq reconfiguration\n");
304 dump_irq(bus);
305
306 ssb_mips_serial_init(mcore);
307 --- a/drivers/ssb/driver_pcicore.c
308 +++ b/drivers/ssb/driver_pcicore.c
309 @@ -263,8 +263,7 @@ int ssb_pcicore_plat_dev_init(struct pci
310 return -ENODEV;
311 }
312
313 - ssb_printk(KERN_INFO "PCI: Fixing up device %s\n",
314 - pci_name(d));
315 + ssb_info("PCI: Fixing up device %s\n", pci_name(d));
316
317 /* Fix up interrupt lines */
318 d->irq = ssb_mips_irq(extpci_core->dev) + 2;
319 @@ -285,12 +284,12 @@ static void ssb_pcicore_fixup_pcibridge(
320 if (dev->bus->number != 0 || PCI_SLOT(dev->devfn) != 0)
321 return;
322
323 - ssb_printk(KERN_INFO "PCI: Fixing up bridge %s\n", pci_name(dev));
324 + ssb_info("PCI: Fixing up bridge %s\n", pci_name(dev));
325
326 /* Enable PCI bridge bus mastering and memory space */
327 pci_set_master(dev);
328 if (pcibios_enable_device(dev, ~0) < 0) {
329 - ssb_printk(KERN_ERR "PCI: SSB bridge enable failed\n");
330 + ssb_err("PCI: SSB bridge enable failed\n");
331 return;
332 }
333
334 @@ -299,8 +298,8 @@ static void ssb_pcicore_fixup_pcibridge(
335
336 /* Make sure our latency is high enough to handle the devices behind us */
337 lat = 168;
338 - ssb_printk(KERN_INFO "PCI: Fixing latency timer of device %s to %u\n",
339 - pci_name(dev), lat);
340 + ssb_info("PCI: Fixing latency timer of device %s to %u\n",
341 + pci_name(dev), lat);
342 pci_write_config_byte(dev, PCI_LATENCY_TIMER, lat);
343 }
344 DECLARE_PCI_FIXUP_EARLY(PCI_ANY_ID, PCI_ANY_ID, ssb_pcicore_fixup_pcibridge);
345 @@ -323,7 +322,7 @@ static void ssb_pcicore_init_hostmode(st
346 return;
347 extpci_core = pc;
348
349 - ssb_dprintk(KERN_INFO PFX "PCIcore in host mode found\n");
350 + ssb_dbg("PCIcore in host mode found\n");
351 /* Reset devices on the external PCI bus */
352 val = SSB_PCICORE_CTL_RST_OE;
353 val |= SSB_PCICORE_CTL_CLK_OE;
354 @@ -338,7 +337,7 @@ static void ssb_pcicore_init_hostmode(st
355 udelay(1); /* Assertion time demanded by the PCI standard */
356
357 if (pc->dev->bus->has_cardbus_slot) {
358 - ssb_dprintk(KERN_INFO PFX "CardBus slot detected\n");
359 + ssb_dbg("CardBus slot detected\n");
360 pc->cardbusmode = 1;
361 /* GPIO 1 resets the bridge */
362 ssb_gpio_out(pc->dev->bus, 1, 1);
363 --- a/drivers/ssb/embedded.c
364 +++ b/drivers/ssb/embedded.c
365 @@ -57,9 +57,8 @@ int ssb_watchdog_register(struct ssb_bus
366 bus->busnumber, &wdt,
367 sizeof(wdt));
368 if (IS_ERR(pdev)) {
369 - ssb_dprintk(KERN_INFO PFX
370 - "can not register watchdog device, err: %li\n",
371 - PTR_ERR(pdev));
372 + ssb_dbg("can not register watchdog device, err: %li\n",
373 + PTR_ERR(pdev));
374 return PTR_ERR(pdev);
375 }
376
377 --- a/drivers/ssb/main.c
378 +++ b/drivers/ssb/main.c
379 @@ -275,8 +275,8 @@ int ssb_devices_thaw(struct ssb_freeze_c
380
381 err = sdrv->probe(sdev, &sdev->id);
382 if (err) {
383 - ssb_printk(KERN_ERR PFX "Failed to thaw device %s\n",
384 - dev_name(sdev->dev));
385 + ssb_err("Failed to thaw device %s\n",
386 + dev_name(sdev->dev));
387 result = err;
388 }
389 ssb_device_put(sdev);
390 @@ -447,10 +447,9 @@ void ssb_bus_unregister(struct ssb_bus *
391
392 err = ssb_gpio_unregister(bus);
393 if (err == -EBUSY)
394 - ssb_dprintk(KERN_ERR PFX "Some GPIOs are still in use.\n");
395 + ssb_dbg("Some GPIOs are still in use\n");
396 else if (err)
397 - ssb_dprintk(KERN_ERR PFX
398 - "Can not unregister GPIO driver: %i\n", err);
399 + ssb_dbg("Can not unregister GPIO driver: %i\n", err);
400
401 ssb_buses_lock();
402 ssb_devices_unregister(bus);
403 @@ -497,8 +496,7 @@ static int ssb_devices_register(struct s
404
405 devwrap = kzalloc(sizeof(*devwrap), GFP_KERNEL);
406 if (!devwrap) {
407 - ssb_printk(KERN_ERR PFX
408 - "Could not allocate device\n");
409 + ssb_err("Could not allocate device\n");
410 err = -ENOMEM;
411 goto error;
412 }
413 @@ -537,9 +535,7 @@ static int ssb_devices_register(struct s
414 sdev->dev = dev;
415 err = device_register(dev);
416 if (err) {
417 - ssb_printk(KERN_ERR PFX
418 - "Could not register %s\n",
419 - dev_name(dev));
420 + ssb_err("Could not register %s\n", dev_name(dev));
421 /* Set dev to NULL to not unregister
422 * dev on error unwinding. */
423 sdev->dev = NULL;
424 @@ -557,6 +553,14 @@ static int ssb_devices_register(struct s
425 }
426 #endif
427
428 +#ifdef CONFIG_SSB_SFLASH
429 + if (bus->mipscore.sflash.present) {
430 + err = platform_device_register(&ssb_sflash_dev);
431 + if (err)
432 + pr_err("Error registering serial flash\n");
433 + }
434 +#endif
435 +
436 return 0;
437 error:
438 /* Unwind the already registered devices. */
439 @@ -825,10 +829,9 @@ static int ssb_bus_register(struct ssb_b
440 ssb_mipscore_init(&bus->mipscore);
441 err = ssb_gpio_init(bus);
442 if (err == -ENOTSUPP)
443 - ssb_dprintk(KERN_DEBUG PFX "GPIO driver not activated\n");
444 + ssb_dbg("GPIO driver not activated\n");
445 else if (err)
446 - ssb_dprintk(KERN_ERR PFX
447 - "Error registering GPIO driver: %i\n", err);
448 + ssb_dbg("Error registering GPIO driver: %i\n", err);
449 err = ssb_fetch_invariants(bus, get_invariants);
450 if (err) {
451 ssb_bus_may_powerdown(bus);
452 @@ -878,11 +881,11 @@ int ssb_bus_pcibus_register(struct ssb_b
453
454 err = ssb_bus_register(bus, ssb_pci_get_invariants, 0);
455 if (!err) {
456 - ssb_printk(KERN_INFO PFX "Sonics Silicon Backplane found on "
457 - "PCI device %s\n", dev_name(&host_pci->dev));
458 + ssb_info("Sonics Silicon Backplane found on PCI device %s\n",
459 + dev_name(&host_pci->dev));
460 } else {
461 - ssb_printk(KERN_ERR PFX "Failed to register PCI version"
462 - " of SSB with error %d\n", err);
463 + ssb_err("Failed to register PCI version of SSB with error %d\n",
464 + err);
465 }
466
467 return err;
468 @@ -903,8 +906,8 @@ int ssb_bus_pcmciabus_register(struct ss
469
470 err = ssb_bus_register(bus, ssb_pcmcia_get_invariants, baseaddr);
471 if (!err) {
472 - ssb_printk(KERN_INFO PFX "Sonics Silicon Backplane found on "
473 - "PCMCIA device %s\n", pcmcia_dev->devname);
474 + ssb_info("Sonics Silicon Backplane found on PCMCIA device %s\n",
475 + pcmcia_dev->devname);
476 }
477
478 return err;
479 @@ -925,8 +928,8 @@ int ssb_bus_sdiobus_register(struct ssb_
480
481 err = ssb_bus_register(bus, ssb_sdio_get_invariants, ~0);
482 if (!err) {
483 - ssb_printk(KERN_INFO PFX "Sonics Silicon Backplane found on "
484 - "SDIO device %s\n", sdio_func_id(func));
485 + ssb_info("Sonics Silicon Backplane found on SDIO device %s\n",
486 + sdio_func_id(func));
487 }
488
489 return err;
490 @@ -944,8 +947,8 @@ int ssb_bus_ssbbus_register(struct ssb_b
491
492 err = ssb_bus_register(bus, get_invariants, baseaddr);
493 if (!err) {
494 - ssb_printk(KERN_INFO PFX "Sonics Silicon Backplane found at "
495 - "address 0x%08lX\n", baseaddr);
496 + ssb_info("Sonics Silicon Backplane found at address 0x%08lX\n",
497 + baseaddr);
498 }
499
500 return err;
501 @@ -1339,7 +1342,7 @@ out:
502 #endif
503 return err;
504 error:
505 - ssb_printk(KERN_ERR PFX "Bus powerdown failed\n");
506 + ssb_err("Bus powerdown failed\n");
507 goto out;
508 }
509 EXPORT_SYMBOL(ssb_bus_may_powerdown);
510 @@ -1362,7 +1365,7 @@ int ssb_bus_powerup(struct ssb_bus *bus,
511
512 return 0;
513 error:
514 - ssb_printk(KERN_ERR PFX "Bus powerup failed\n");
515 + ssb_err("Bus powerup failed\n");
516 return err;
517 }
518 EXPORT_SYMBOL(ssb_bus_powerup);
519 @@ -1470,15 +1473,13 @@ static int __init ssb_modinit(void)
520
521 err = b43_pci_ssb_bridge_init();
522 if (err) {
523 - ssb_printk(KERN_ERR "Broadcom 43xx PCI-SSB-bridge "
524 - "initialization failed\n");
525 + ssb_err("Broadcom 43xx PCI-SSB-bridge initialization failed\n");
526 /* don't fail SSB init because of this */
527 err = 0;
528 }
529 err = ssb_gige_init();
530 if (err) {
531 - ssb_printk(KERN_ERR "SSB Broadcom Gigabit Ethernet "
532 - "driver initialization failed\n");
533 + ssb_err("SSB Broadcom Gigabit Ethernet driver initialization failed\n");
534 /* don't fail SSB init because of this */
535 err = 0;
536 }
537 --- a/drivers/ssb/pci.c
538 +++ b/drivers/ssb/pci.c
539 @@ -56,7 +56,7 @@ int ssb_pci_switch_coreidx(struct ssb_bu
540 }
541 return 0;
542 error:
543 - ssb_printk(KERN_ERR PFX "Failed to switch to core %u\n", coreidx);
544 + ssb_err("Failed to switch to core %u\n", coreidx);
545 return -ENODEV;
546 }
547
548 @@ -67,10 +67,9 @@ int ssb_pci_switch_core(struct ssb_bus *
549 unsigned long flags;
550
551 #if SSB_VERBOSE_PCICORESWITCH_DEBUG
552 - ssb_printk(KERN_INFO PFX
553 - "Switching to %s core, index %d\n",
554 - ssb_core_name(dev->id.coreid),
555 - dev->core_index);
556 + ssb_info("Switching to %s core, index %d\n",
557 + ssb_core_name(dev->id.coreid),
558 + dev->core_index);
559 #endif
560
561 spin_lock_irqsave(&bus->bar_lock, flags);
562 @@ -231,6 +230,15 @@ static inline u8 ssb_crc8(u8 crc, u8 dat
563 return t[crc ^ data];
564 }
565
566 +static void sprom_get_mac(char *mac, const u16 *in)
567 +{
568 + int i;
569 + for (i = 0; i < 3; i++) {
570 + *mac++ = in[i] >> 8;
571 + *mac++ = in[i];
572 + }
573 +}
574 +
575 static u8 ssb_sprom_crc(const u16 *sprom, u16 size)
576 {
577 int word;
578 @@ -278,7 +286,7 @@ static int sprom_do_write(struct ssb_bus
579 u32 spromctl;
580 u16 size = bus->sprom_size;
581
582 - ssb_printk(KERN_NOTICE PFX "Writing SPROM. Do NOT turn off the power! Please stand by...\n");
583 + ssb_notice("Writing SPROM. Do NOT turn off the power! Please stand by...\n");
584 err = pci_read_config_dword(pdev, SSB_SPROMCTL, &spromctl);
585 if (err)
586 goto err_ctlreg;
587 @@ -286,17 +294,17 @@ static int sprom_do_write(struct ssb_bus
588 err = pci_write_config_dword(pdev, SSB_SPROMCTL, spromctl);
589 if (err)
590 goto err_ctlreg;
591 - ssb_printk(KERN_NOTICE PFX "[ 0%%");
592 + ssb_notice("[ 0%%");
593 msleep(500);
594 for (i = 0; i < size; i++) {
595 if (i == size / 4)
596 - ssb_printk("25%%");
597 + ssb_cont("25%%");
598 else if (i == size / 2)
599 - ssb_printk("50%%");
600 + ssb_cont("50%%");
601 else if (i == (size * 3) / 4)
602 - ssb_printk("75%%");
603 + ssb_cont("75%%");
604 else if (i % 2)
605 - ssb_printk(".");
606 + ssb_cont(".");
607 writew(sprom[i], bus->mmio + bus->sprom_offset + (i * 2));
608 mmiowb();
609 msleep(20);
610 @@ -309,12 +317,12 @@ static int sprom_do_write(struct ssb_bus
611 if (err)
612 goto err_ctlreg;
613 msleep(500);
614 - ssb_printk("100%% ]\n");
615 - ssb_printk(KERN_NOTICE PFX "SPROM written.\n");
616 + ssb_cont("100%% ]\n");
617 + ssb_notice("SPROM written\n");
618
619 return 0;
620 err_ctlreg:
621 - ssb_printk(KERN_ERR PFX "Could not access SPROM control register.\n");
622 + ssb_err("Could not access SPROM control register.\n");
623 return err;
624 }
625
626 @@ -339,10 +347,23 @@ static s8 r123_extract_antgain(u8 sprom_
627 return (s8)gain;
628 }
629
630 +static void sprom_extract_r23(struct ssb_sprom *out, const u16 *in)
631 +{
632 + SPEX(boardflags_hi, SSB_SPROM2_BFLHI, 0xFFFF, 0);
633 + SPEX(opo, SSB_SPROM2_OPO, SSB_SPROM2_OPO_VALUE, 0);
634 + SPEX(pa1lob0, SSB_SPROM2_PA1LOB0, 0xFFFF, 0);
635 + SPEX(pa1lob1, SSB_SPROM2_PA1LOB1, 0xFFFF, 0);
636 + SPEX(pa1lob2, SSB_SPROM2_PA1LOB2, 0xFFFF, 0);
637 + SPEX(pa1hib0, SSB_SPROM2_PA1HIB0, 0xFFFF, 0);
638 + SPEX(pa1hib1, SSB_SPROM2_PA1HIB1, 0xFFFF, 0);
639 + SPEX(pa1hib2, SSB_SPROM2_PA1HIB2, 0xFFFF, 0);
640 + SPEX(maxpwr_ah, SSB_SPROM2_MAXP_A, SSB_SPROM2_MAXP_A_HI, 0);
641 + SPEX(maxpwr_al, SSB_SPROM2_MAXP_A, SSB_SPROM2_MAXP_A_LO,
642 + SSB_SPROM2_MAXP_A_LO_SHIFT);
643 +}
644 +
645 static void sprom_extract_r123(struct ssb_sprom *out, const u16 *in)
646 {
647 - int i;
648 - u16 v;
649 u16 loc[3];
650
651 if (out->revision == 3) /* rev 3 moved MAC */
652 @@ -352,19 +373,10 @@ static void sprom_extract_r123(struct ss
653 loc[1] = SSB_SPROM1_ET0MAC;
654 loc[2] = SSB_SPROM1_ET1MAC;
655 }
656 - for (i = 0; i < 3; i++) {
657 - v = in[SPOFF(loc[0]) + i];
658 - *(((__be16 *)out->il0mac) + i) = cpu_to_be16(v);
659 - }
660 + sprom_get_mac(out->il0mac, &in[SPOFF(loc[0])]);
661 if (out->revision < 3) { /* only rev 1-2 have et0, et1 */
662 - for (i = 0; i < 3; i++) {
663 - v = in[SPOFF(loc[1]) + i];
664 - *(((__be16 *)out->et0mac) + i) = cpu_to_be16(v);
665 - }
666 - for (i = 0; i < 3; i++) {
667 - v = in[SPOFF(loc[2]) + i];
668 - *(((__be16 *)out->et1mac) + i) = cpu_to_be16(v);
669 - }
670 + sprom_get_mac(out->et0mac, &in[SPOFF(loc[1])]);
671 + sprom_get_mac(out->et1mac, &in[SPOFF(loc[2])]);
672 }
673 SPEX(et0phyaddr, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET0A, 0);
674 SPEX(et1phyaddr, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET1A,
675 @@ -372,6 +384,7 @@ static void sprom_extract_r123(struct ss
676 SPEX(et0mdcport, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET0M, 14);
677 SPEX(et1mdcport, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET1M, 15);
678 SPEX(board_rev, SSB_SPROM1_BINF, SSB_SPROM1_BINF_BREV, 0);
679 + SPEX(board_type, SSB_SPROM1_SPID, 0xFFFF, 0);
680 if (out->revision == 1)
681 SPEX(country_code, SSB_SPROM1_BINF, SSB_SPROM1_BINF_CCODE,
682 SSB_SPROM1_BINF_CCODE_SHIFT);
683 @@ -398,8 +411,7 @@ static void sprom_extract_r123(struct ss
684 SSB_SPROM1_ITSSI_A_SHIFT);
685 SPEX(itssi_bg, SSB_SPROM1_ITSSI, SSB_SPROM1_ITSSI_BG, 0);
686 SPEX(boardflags_lo, SSB_SPROM1_BFLLO, 0xFFFF, 0);
687 - if (out->revision >= 2)
688 - SPEX(boardflags_hi, SSB_SPROM2_BFLHI, 0xFFFF, 0);
689 +
690 SPEX(alpha2[0], SSB_SPROM1_CCODE, 0xff00, 8);
691 SPEX(alpha2[1], SSB_SPROM1_CCODE, 0x00ff, 0);
692
693 @@ -410,6 +422,8 @@ static void sprom_extract_r123(struct ss
694 out->antenna_gain.a1 = r123_extract_antgain(out->revision, in,
695 SSB_SPROM1_AGAIN_A,
696 SSB_SPROM1_AGAIN_A_SHIFT);
697 + if (out->revision >= 2)
698 + sprom_extract_r23(out, in);
699 }
700
701 /* Revs 4 5 and 8 have partially shared layout */
702 @@ -454,23 +468,20 @@ static void sprom_extract_r458(struct ss
703
704 static void sprom_extract_r45(struct ssb_sprom *out, const u16 *in)
705 {
706 - int i;
707 - u16 v;
708 u16 il0mac_offset;
709
710 if (out->revision == 4)
711 il0mac_offset = SSB_SPROM4_IL0MAC;
712 else
713 il0mac_offset = SSB_SPROM5_IL0MAC;
714 - /* extract the MAC address */
715 - for (i = 0; i < 3; i++) {
716 - v = in[SPOFF(il0mac_offset) + i];
717 - *(((__be16 *)out->il0mac) + i) = cpu_to_be16(v);
718 - }
719 +
720 + sprom_get_mac(out->il0mac, &in[SPOFF(il0mac_offset)]);
721 +
722 SPEX(et0phyaddr, SSB_SPROM4_ETHPHY, SSB_SPROM4_ETHPHY_ET0A, 0);
723 SPEX(et1phyaddr, SSB_SPROM4_ETHPHY, SSB_SPROM4_ETHPHY_ET1A,
724 SSB_SPROM4_ETHPHY_ET1A_SHIFT);
725 SPEX(board_rev, SSB_SPROM4_BOARDREV, 0xFFFF, 0);
726 + SPEX(board_type, SSB_SPROM1_SPID, 0xFFFF, 0);
727 if (out->revision == 4) {
728 SPEX(alpha2[0], SSB_SPROM4_CCODE, 0xff00, 8);
729 SPEX(alpha2[1], SSB_SPROM4_CCODE, 0x00ff, 0);
730 @@ -530,7 +541,7 @@ static void sprom_extract_r45(struct ssb
731 static void sprom_extract_r8(struct ssb_sprom *out, const u16 *in)
732 {
733 int i;
734 - u16 v, o;
735 + u16 o;
736 u16 pwr_info_offset[] = {
737 SSB_SROM8_PWR_INFO_CORE0, SSB_SROM8_PWR_INFO_CORE1,
738 SSB_SROM8_PWR_INFO_CORE2, SSB_SROM8_PWR_INFO_CORE3
739 @@ -539,11 +550,10 @@ static void sprom_extract_r8(struct ssb_
740 ARRAY_SIZE(out->core_pwr_info));
741
742 /* extract the MAC address */
743 - for (i = 0; i < 3; i++) {
744 - v = in[SPOFF(SSB_SPROM8_IL0MAC) + i];
745 - *(((__be16 *)out->il0mac) + i) = cpu_to_be16(v);
746 - }
747 + sprom_get_mac(out->il0mac, &in[SPOFF(SSB_SPROM8_IL0MAC)]);
748 +
749 SPEX(board_rev, SSB_SPROM8_BOARDREV, 0xFFFF, 0);
750 + SPEX(board_type, SSB_SPROM1_SPID, 0xFFFF, 0);
751 SPEX(alpha2[0], SSB_SPROM8_CCODE, 0xff00, 8);
752 SPEX(alpha2[1], SSB_SPROM8_CCODE, 0x00ff, 0);
753 SPEX(boardflags_lo, SSB_SPROM8_BFLLO, 0xFFFF, 0);
754 @@ -743,7 +753,7 @@ static int sprom_extract(struct ssb_bus
755 memset(out, 0, sizeof(*out));
756
757 out->revision = in[size - 1] & 0x00FF;
758 - ssb_dprintk(KERN_DEBUG PFX "SPROM revision %d detected.\n", out->revision);
759 + ssb_dbg("SPROM revision %d detected\n", out->revision);
760 memset(out->et0mac, 0xFF, 6); /* preset et0 and et1 mac */
761 memset(out->et1mac, 0xFF, 6);
762
763 @@ -752,7 +762,7 @@ static int sprom_extract(struct ssb_bus
764 * number stored in the SPROM.
765 * Always extract r1. */
766 out->revision = 1;
767 - ssb_dprintk(KERN_DEBUG PFX "SPROM treated as revision %d\n", out->revision);
768 + ssb_dbg("SPROM treated as revision %d\n", out->revision);
769 }
770
771 switch (out->revision) {
772 @@ -769,9 +779,8 @@ static int sprom_extract(struct ssb_bus
773 sprom_extract_r8(out, in);
774 break;
775 default:
776 - ssb_printk(KERN_WARNING PFX "Unsupported SPROM"
777 - " revision %d detected. Will extract"
778 - " v1\n", out->revision);
779 + ssb_warn("Unsupported SPROM revision %d detected. Will extract v1\n",
780 + out->revision);
781 out->revision = 1;
782 sprom_extract_r123(out, in);
783 }
784 @@ -791,7 +800,7 @@ static int ssb_pci_sprom_get(struct ssb_
785 u16 *buf;
786
787 if (!ssb_is_sprom_available(bus)) {
788 - ssb_printk(KERN_ERR PFX "No SPROM available!\n");
789 + ssb_err("No SPROM available!\n");
790 return -ENODEV;
791 }
792 if (bus->chipco.dev) { /* can be unavailable! */
793 @@ -810,7 +819,7 @@ static int ssb_pci_sprom_get(struct ssb_
794 } else {
795 bus->sprom_offset = SSB_SPROM_BASE1;
796 }
797 - ssb_dprintk(KERN_INFO PFX "SPROM offset is 0x%x\n", bus->sprom_offset);
798 + ssb_dbg("SPROM offset is 0x%x\n", bus->sprom_offset);
799
800 buf = kcalloc(SSB_SPROMSIZE_WORDS_R123, sizeof(u16), GFP_KERNEL);
801 if (!buf)
802 @@ -835,18 +844,15 @@ static int ssb_pci_sprom_get(struct ssb_
803 * available for this device in some other storage */
804 err = ssb_fill_sprom_with_fallback(bus, sprom);
805 if (err) {
806 - ssb_printk(KERN_WARNING PFX "WARNING: Using"
807 - " fallback SPROM failed (err %d)\n",
808 - err);
809 + ssb_warn("WARNING: Using fallback SPROM failed (err %d)\n",
810 + err);
811 } else {
812 - ssb_dprintk(KERN_DEBUG PFX "Using SPROM"
813 - " revision %d provided by"
814 - " platform.\n", sprom->revision);
815 + ssb_dbg("Using SPROM revision %d provided by platform\n",
816 + sprom->revision);
817 err = 0;
818 goto out_free;
819 }
820 - ssb_printk(KERN_WARNING PFX "WARNING: Invalid"
821 - " SPROM CRC (corrupt SPROM)\n");
822 + ssb_warn("WARNING: Invalid SPROM CRC (corrupt SPROM)\n");
823 }
824 }
825 err = sprom_extract(bus, sprom, buf, bus->sprom_size);
826 --- a/drivers/ssb/pcihost_wrapper.c
827 +++ b/drivers/ssb/pcihost_wrapper.c
828 @@ -38,7 +38,7 @@ static int ssb_pcihost_resume(struct pci
829 struct ssb_bus *ssb = pci_get_drvdata(dev);
830 int err;
831
832 - pci_set_power_state(dev, 0);
833 + pci_set_power_state(dev, PCI_D0);
834 err = pci_enable_device(dev);
835 if (err)
836 return err;
837 --- a/drivers/ssb/pcmcia.c
838 +++ b/drivers/ssb/pcmcia.c
839 @@ -143,7 +143,7 @@ int ssb_pcmcia_switch_coreidx(struct ssb
840
841 return 0;
842 error:
843 - ssb_printk(KERN_ERR PFX "Failed to switch to core %u\n", coreidx);
844 + ssb_err("Failed to switch to core %u\n", coreidx);
845 return err;
846 }
847
848 @@ -153,10 +153,9 @@ int ssb_pcmcia_switch_core(struct ssb_bu
849 int err;
850
851 #if SSB_VERBOSE_PCMCIACORESWITCH_DEBUG
852 - ssb_printk(KERN_INFO PFX
853 - "Switching to %s core, index %d\n",
854 - ssb_core_name(dev->id.coreid),
855 - dev->core_index);
856 + ssb_info("Switching to %s core, index %d\n",
857 + ssb_core_name(dev->id.coreid),
858 + dev->core_index);
859 #endif
860
861 err = ssb_pcmcia_switch_coreidx(bus, dev->core_index);
862 @@ -192,7 +191,7 @@ int ssb_pcmcia_switch_segment(struct ssb
863
864 return 0;
865 error:
866 - ssb_printk(KERN_ERR PFX "Failed to switch pcmcia segment\n");
867 + ssb_err("Failed to switch pcmcia segment\n");
868 return err;
869 }
870
871 @@ -549,44 +548,39 @@ static int ssb_pcmcia_sprom_write_all(st
872 bool failed = 0;
873 size_t size = SSB_PCMCIA_SPROM_SIZE;
874
875 - ssb_printk(KERN_NOTICE PFX
876 - "Writing SPROM. Do NOT turn off the power! "
877 - "Please stand by...\n");
878 + ssb_notice("Writing SPROM. Do NOT turn off the power! Please stand by...\n");
879 err = ssb_pcmcia_sprom_command(bus, SSB_PCMCIA_SPROMCTL_WRITEEN);
880 if (err) {
881 - ssb_printk(KERN_NOTICE PFX
882 - "Could not enable SPROM write access.\n");
883 + ssb_notice("Could not enable SPROM write access\n");
884 return -EBUSY;
885 }
886 - ssb_printk(KERN_NOTICE PFX "[ 0%%");
887 + ssb_notice("[ 0%%");
888 msleep(500);
889 for (i = 0; i < size; i++) {
890 if (i == size / 4)
891 - ssb_printk("25%%");
892 + ssb_cont("25%%");
893 else if (i == size / 2)
894 - ssb_printk("50%%");
895 + ssb_cont("50%%");
896 else if (i == (size * 3) / 4)
897 - ssb_printk("75%%");
898 + ssb_cont("75%%");
899 else if (i % 2)
900 - ssb_printk(".");
901 + ssb_cont(".");
902 err = ssb_pcmcia_sprom_write(bus, i, sprom[i]);
903 if (err) {
904 - ssb_printk(KERN_NOTICE PFX
905 - "Failed to write to SPROM.\n");
906 + ssb_notice("Failed to write to SPROM\n");
907 failed = 1;
908 break;
909 }
910 }
911 err = ssb_pcmcia_sprom_command(bus, SSB_PCMCIA_SPROMCTL_WRITEDIS);
912 if (err) {
913 - ssb_printk(KERN_NOTICE PFX
914 - "Could not disable SPROM write access.\n");
915 + ssb_notice("Could not disable SPROM write access\n");
916 failed = 1;
917 }
918 msleep(500);
919 if (!failed) {
920 - ssb_printk("100%% ]\n");
921 - ssb_printk(KERN_NOTICE PFX "SPROM written.\n");
922 + ssb_cont("100%% ]\n");
923 + ssb_notice("SPROM written\n");
924 }
925
926 return failed ? -EBUSY : 0;
927 @@ -700,7 +694,7 @@ static int ssb_pcmcia_do_get_invariants(
928 return -ENOSPC; /* continue with next entry */
929
930 error:
931 - ssb_printk(KERN_ERR PFX
932 + ssb_err(
933 "PCMCIA: Failed to fetch device invariants: %s\n",
934 error_description);
935 return -ENODEV;
936 @@ -722,7 +716,7 @@ int ssb_pcmcia_get_invariants(struct ssb
937 res = pcmcia_loop_tuple(bus->host_pcmcia, CISTPL_FUNCE,
938 ssb_pcmcia_get_mac, sprom);
939 if (res != 0) {
940 - ssb_printk(KERN_ERR PFX
941 + ssb_err(
942 "PCMCIA: Failed to fetch MAC address\n");
943 return -ENODEV;
944 }
945 @@ -733,7 +727,7 @@ int ssb_pcmcia_get_invariants(struct ssb
946 if ((res == 0) || (res == -ENOSPC))
947 return 0;
948
949 - ssb_printk(KERN_ERR PFX
950 + ssb_err(
951 "PCMCIA: Failed to fetch device invariants\n");
952 return -ENODEV;
953 }
954 @@ -843,6 +837,6 @@ int ssb_pcmcia_init(struct ssb_bus *bus)
955
956 return 0;
957 error:
958 - ssb_printk(KERN_ERR PFX "Failed to initialize PCMCIA host device\n");
959 + ssb_err("Failed to initialize PCMCIA host device\n");
960 return err;
961 }
962 --- a/drivers/ssb/scan.c
963 +++ b/drivers/ssb/scan.c
964 @@ -125,8 +125,7 @@ static u16 pcidev_to_chipid(struct pci_d
965 chipid_fallback = 0x4401;
966 break;
967 default:
968 - ssb_printk(KERN_ERR PFX
969 - "PCI-ID not in fallback list\n");
970 + ssb_err("PCI-ID not in fallback list\n");
971 }
972
973 return chipid_fallback;
974 @@ -152,8 +151,7 @@ static u8 chipid_to_nrcores(u16 chipid)
975 case 0x4704:
976 return 9;
977 default:
978 - ssb_printk(KERN_ERR PFX
979 - "CHIPID not in nrcores fallback list\n");
980 + ssb_err("CHIPID not in nrcores fallback list\n");
981 }
982
983 return 1;
984 @@ -320,15 +318,13 @@ int ssb_bus_scan(struct ssb_bus *bus,
985 bus->chip_package = 0;
986 }
987 }
988 - ssb_printk(KERN_INFO PFX "Found chip with id 0x%04X, rev 0x%02X and "
989 - "package 0x%02X\n", bus->chip_id, bus->chip_rev,
990 - bus->chip_package);
991 + ssb_info("Found chip with id 0x%04X, rev 0x%02X and package 0x%02X\n",
992 + bus->chip_id, bus->chip_rev, bus->chip_package);
993 if (!bus->nr_devices)
994 bus->nr_devices = chipid_to_nrcores(bus->chip_id);
995 if (bus->nr_devices > ARRAY_SIZE(bus->devices)) {
996 - ssb_printk(KERN_ERR PFX
997 - "More than %d ssb cores found (%d)\n",
998 - SSB_MAX_NR_CORES, bus->nr_devices);
999 + ssb_err("More than %d ssb cores found (%d)\n",
1000 + SSB_MAX_NR_CORES, bus->nr_devices);
1001 goto err_unmap;
1002 }
1003 if (bus->bustype == SSB_BUSTYPE_SSB) {
1004 @@ -370,8 +366,7 @@ int ssb_bus_scan(struct ssb_bus *bus,
1005 nr_80211_cores++;
1006 if (nr_80211_cores > 1) {
1007 if (!we_support_multiple_80211_cores(bus)) {
1008 - ssb_dprintk(KERN_INFO PFX "Ignoring additional "
1009 - "802.11 core\n");
1010 + ssb_dbg("Ignoring additional 802.11 core\n");
1011 continue;
1012 }
1013 }
1014 @@ -379,8 +374,7 @@ int ssb_bus_scan(struct ssb_bus *bus,
1015 case SSB_DEV_EXTIF:
1016 #ifdef CONFIG_SSB_DRIVER_EXTIF
1017 if (bus->extif.dev) {
1018 - ssb_printk(KERN_WARNING PFX
1019 - "WARNING: Multiple EXTIFs found\n");
1020 + ssb_warn("WARNING: Multiple EXTIFs found\n");
1021 break;
1022 }
1023 bus->extif.dev = dev;
1024 @@ -388,8 +382,7 @@ int ssb_bus_scan(struct ssb_bus *bus,
1025 break;
1026 case SSB_DEV_CHIPCOMMON:
1027 if (bus->chipco.dev) {
1028 - ssb_printk(KERN_WARNING PFX
1029 - "WARNING: Multiple ChipCommon found\n");
1030 + ssb_warn("WARNING: Multiple ChipCommon found\n");
1031 break;
1032 }
1033 bus->chipco.dev = dev;
1034 @@ -398,8 +391,7 @@ int ssb_bus_scan(struct ssb_bus *bus,
1035 case SSB_DEV_MIPS_3302:
1036 #ifdef CONFIG_SSB_DRIVER_MIPS
1037 if (bus->mipscore.dev) {
1038 - ssb_printk(KERN_WARNING PFX
1039 - "WARNING: Multiple MIPS cores found\n");
1040 + ssb_warn("WARNING: Multiple MIPS cores found\n");
1041 break;
1042 }
1043 bus->mipscore.dev = dev;
1044 @@ -420,8 +412,7 @@ int ssb_bus_scan(struct ssb_bus *bus,
1045 }
1046 }
1047 if (bus->pcicore.dev) {
1048 - ssb_printk(KERN_WARNING PFX
1049 - "WARNING: Multiple PCI(E) cores found\n");
1050 + ssb_warn("WARNING: Multiple PCI(E) cores found\n");
1051 break;
1052 }
1053 bus->pcicore.dev = dev;
1054 --- a/drivers/ssb/sprom.c
1055 +++ b/drivers/ssb/sprom.c
1056 @@ -54,7 +54,7 @@ static int hex2sprom(u16 *sprom, const c
1057 while (cnt < sprom_size_words) {
1058 memcpy(tmp, dump, 4);
1059 dump += 4;
1060 - err = strict_strtoul(tmp, 16, &parsed);
1061 + err = kstrtoul(tmp, 16, &parsed);
1062 if (err)
1063 return err;
1064 sprom[cnt++] = swab16((u16)parsed);
1065 @@ -127,13 +127,13 @@ ssize_t ssb_attr_sprom_store(struct ssb_
1066 goto out_kfree;
1067 err = ssb_devices_freeze(bus, &freeze);
1068 if (err) {
1069 - ssb_printk(KERN_ERR PFX "SPROM write: Could not freeze all devices\n");
1070 + ssb_err("SPROM write: Could not freeze all devices\n");
1071 goto out_unlock;
1072 }
1073 res = sprom_write(bus, sprom);
1074 err = ssb_devices_thaw(&freeze);
1075 if (err)
1076 - ssb_printk(KERN_ERR PFX "SPROM write: Could not thaw all devices\n");
1077 + ssb_err("SPROM write: Could not thaw all devices\n");
1078 out_unlock:
1079 mutex_unlock(&bus->sprom_mutex);
1080 out_kfree:
1081 --- a/drivers/ssb/ssb_private.h
1082 +++ b/drivers/ssb/ssb_private.h
1083 @@ -9,16 +9,27 @@
1084 #define PFX "ssb: "
1085
1086 #ifdef CONFIG_SSB_SILENT
1087 -# define ssb_printk(fmt, x...) do { /* nothing */ } while (0)
1088 +# define ssb_printk(fmt, ...) \
1089 + do { if (0) printk(fmt, ##__VA_ARGS__); } while (0)
1090 #else
1091 -# define ssb_printk printk
1092 +# define ssb_printk(fmt, ...) \
1093 + printk(fmt, ##__VA_ARGS__)
1094 #endif /* CONFIG_SSB_SILENT */
1095
1096 +#define ssb_emerg(fmt, ...) ssb_printk(KERN_EMERG PFX fmt, ##__VA_ARGS__)
1097 +#define ssb_err(fmt, ...) ssb_printk(KERN_ERR PFX fmt, ##__VA_ARGS__)
1098 +#define ssb_warn(fmt, ...) ssb_printk(KERN_WARNING PFX fmt, ##__VA_ARGS__)
1099 +#define ssb_notice(fmt, ...) ssb_printk(KERN_NOTICE PFX fmt, ##__VA_ARGS__)
1100 +#define ssb_info(fmt, ...) ssb_printk(KERN_INFO PFX fmt, ##__VA_ARGS__)
1101 +#define ssb_cont(fmt, ...) ssb_printk(KERN_CONT fmt, ##__VA_ARGS__)
1102 +
1103 /* dprintk: Debugging printk; vanishes for non-debug compilation */
1104 #ifdef CONFIG_SSB_DEBUG
1105 -# define ssb_dprintk(fmt, x...) ssb_printk(fmt , ##x)
1106 +# define ssb_dbg(fmt, ...) \
1107 + ssb_printk(KERN_DEBUG PFX fmt, ##__VA_ARGS__)
1108 #else
1109 -# define ssb_dprintk(fmt, x...) do { /* nothing */ } while (0)
1110 +# define ssb_dbg(fmt, ...) \
1111 + do { if (0) printk(KERN_DEBUG PFX fmt, ##__VA_ARGS__); } while (0)
1112 #endif
1113
1114 #ifdef CONFIG_SSB_DEBUG
1115 @@ -232,6 +243,10 @@ static inline int ssb_sflash_init(struct
1116 extern struct platform_device ssb_pflash_dev;
1117 #endif
1118
1119 +#ifdef CONFIG_SSB_SFLASH
1120 +extern struct platform_device ssb_sflash_dev;
1121 +#endif
1122 +
1123 #ifdef CONFIG_SSB_DRIVER_EXTIF
1124 extern u32 ssb_extif_watchdog_timer_set_wdt(struct bcm47xx_wdt *wdt, u32 ticks);
1125 extern u32 ssb_extif_watchdog_timer_set_ms(struct bcm47xx_wdt *wdt, u32 ms);
1126 --- a/include/linux/ssb/ssb.h
1127 +++ b/include/linux/ssb/ssb.h
1128 @@ -26,13 +26,14 @@ struct ssb_sprom_core_pwr_info {
1129
1130 struct ssb_sprom {
1131 u8 revision;
1132 - u8 il0mac[6]; /* MAC address for 802.11b/g */
1133 - u8 et0mac[6]; /* MAC address for Ethernet */
1134 - u8 et1mac[6]; /* MAC address for 802.11a */
1135 + u8 il0mac[6] __aligned(sizeof(u16)); /* MAC address for 802.11b/g */
1136 + u8 et0mac[6] __aligned(sizeof(u16)); /* MAC address for Ethernet */
1137 + u8 et1mac[6] __aligned(sizeof(u16)); /* MAC address for 802.11a */
1138 u8 et0phyaddr; /* MII address for enet0 */
1139 u8 et1phyaddr; /* MII address for enet1 */
1140 u8 et0mdcport; /* MDIO for enet0 */
1141 u8 et1mdcport; /* MDIO for enet1 */
1142 + u16 dev_id; /* Device ID overriding e.g. PCI ID */
1143 u16 board_rev; /* Board revision number from SPROM. */
1144 u16 board_num; /* Board number from SPROM. */
1145 u16 board_type; /* Board type from SPROM. */
1146 @@ -340,13 +341,61 @@ enum ssb_bustype {
1147 #define SSB_BOARDVENDOR_DELL 0x1028 /* Dell */
1148 #define SSB_BOARDVENDOR_HP 0x0E11 /* HP */
1149 /* board_type */
1150 +#define SSB_BOARD_BCM94301CB 0x0406
1151 +#define SSB_BOARD_BCM94301MP 0x0407
1152 +#define SSB_BOARD_BU4309 0x040A
1153 +#define SSB_BOARD_BCM94309CB 0x040B
1154 +#define SSB_BOARD_BCM4309MP 0x040C
1155 +#define SSB_BOARD_BU4306 0x0416
1156 #define SSB_BOARD_BCM94306MP 0x0418
1157 #define SSB_BOARD_BCM4309G 0x0421
1158 #define SSB_BOARD_BCM4306CB 0x0417
1159 -#define SSB_BOARD_BCM4309MP 0x040C
1160 +#define SSB_BOARD_BCM94306PC 0x0425 /* pcmcia 3.3v 4306 card */
1161 +#define SSB_BOARD_BCM94306CBSG 0x042B /* with SiGe PA */
1162 +#define SSB_BOARD_PCSG94306 0x042D /* with SiGe PA */
1163 +#define SSB_BOARD_BU4704SD 0x042E /* with sdram */
1164 +#define SSB_BOARD_BCM94704AGR 0x042F /* dual 11a/11g Router */
1165 +#define SSB_BOARD_BCM94308MP 0x0430 /* 11a-only minipci */
1166 +#define SSB_BOARD_BU4318 0x0447
1167 +#define SSB_BOARD_CB4318 0x0448
1168 +#define SSB_BOARD_MPG4318 0x0449
1169 #define SSB_BOARD_MP4318 0x044A
1170 -#define SSB_BOARD_BU4306 0x0416
1171 -#define SSB_BOARD_BU4309 0x040A
1172 +#define SSB_BOARD_SD4318 0x044B
1173 +#define SSB_BOARD_BCM94306P 0x044C /* with SiGe */
1174 +#define SSB_BOARD_BCM94303MP 0x044E
1175 +#define SSB_BOARD_BCM94306MPM 0x0450
1176 +#define SSB_BOARD_BCM94306MPL 0x0453
1177 +#define SSB_BOARD_PC4303 0x0454 /* pcmcia */
1178 +#define SSB_BOARD_BCM94306MPLNA 0x0457
1179 +#define SSB_BOARD_BCM94306MPH 0x045B
1180 +#define SSB_BOARD_BCM94306PCIV 0x045C
1181 +#define SSB_BOARD_BCM94318MPGH 0x0463
1182 +#define SSB_BOARD_BU4311 0x0464
1183 +#define SSB_BOARD_BCM94311MC 0x0465
1184 +#define SSB_BOARD_BCM94311MCAG 0x0466
1185 +/* 4321 boards */
1186 +#define SSB_BOARD_BU4321 0x046B
1187 +#define SSB_BOARD_BU4321E 0x047C
1188 +#define SSB_BOARD_MP4321 0x046C
1189 +#define SSB_BOARD_CB2_4321 0x046D
1190 +#define SSB_BOARD_CB2_4321_AG 0x0066
1191 +#define SSB_BOARD_MC4321 0x046E
1192 +/* 4325 boards */
1193 +#define SSB_BOARD_BCM94325DEVBU 0x0490
1194 +#define SSB_BOARD_BCM94325BGABU 0x0491
1195 +#define SSB_BOARD_BCM94325SDGWB 0x0492
1196 +#define SSB_BOARD_BCM94325SDGMDL 0x04AA
1197 +#define SSB_BOARD_BCM94325SDGMDL2 0x04C6
1198 +#define SSB_BOARD_BCM94325SDGMDL3 0x04C9
1199 +#define SSB_BOARD_BCM94325SDABGWBA 0x04E1
1200 +/* 4322 boards */
1201 +#define SSB_BOARD_BCM94322MC 0x04A4
1202 +#define SSB_BOARD_BCM94322USB 0x04A8 /* dualband */
1203 +#define SSB_BOARD_BCM94322HM 0x04B0
1204 +#define SSB_BOARD_BCM94322USB2D 0x04Bf /* single band discrete front end */
1205 +/* 4312 boards */
1206 +#define SSB_BOARD_BU4312 0x048A
1207 +#define SSB_BOARD_BCM4312MCGSG 0x04B5
1208 /* chip_package */
1209 #define SSB_CHIPPACK_BCM4712S 1 /* Small 200pin 4712 */
1210 #define SSB_CHIPPACK_BCM4712M 2 /* Medium 225pin 4712 */
1211 --- a/include/linux/ssb/ssb_driver_mips.h
1212 +++ b/include/linux/ssb/ssb_driver_mips.h
1213 @@ -20,6 +20,18 @@ struct ssb_pflash {
1214 u32 window_size;
1215 };
1216
1217 +#ifdef CONFIG_SSB_SFLASH
1218 +struct ssb_sflash {
1219 + bool present;
1220 + u32 window;
1221 + u32 blocksize;
1222 + u16 numblocks;
1223 + u32 size;
1224 +
1225 + void *priv;
1226 +};
1227 +#endif
1228 +
1229 struct ssb_mipscore {
1230 struct ssb_device *dev;
1231
1232 @@ -27,6 +39,9 @@ struct ssb_mipscore {
1233 struct ssb_serial_port serial_ports[4];
1234
1235 struct ssb_pflash pflash;
1236 +#ifdef CONFIG_SSB_SFLASH
1237 + struct ssb_sflash sflash;
1238 +#endif
1239 };
1240
1241 extern void ssb_mipscore_init(struct ssb_mipscore *mcore);
1242 --- a/include/linux/ssb/ssb_regs.h
1243 +++ b/include/linux/ssb/ssb_regs.h
1244 @@ -172,6 +172,7 @@
1245 #define SSB_SPROMSIZE_WORDS_R4 220
1246 #define SSB_SPROMSIZE_BYTES_R123 (SSB_SPROMSIZE_WORDS_R123 * sizeof(u16))
1247 #define SSB_SPROMSIZE_BYTES_R4 (SSB_SPROMSIZE_WORDS_R4 * sizeof(u16))
1248 +#define SSB_SPROMSIZE_WORDS_R10 230
1249 #define SSB_SPROM_BASE1 0x1000
1250 #define SSB_SPROM_BASE31 0x0800
1251 #define SSB_SPROM_REVISION 0x007E
1252 @@ -289,11 +290,11 @@
1253 #define SSB_SPROM4_ETHPHY_ET1A_SHIFT 5
1254 #define SSB_SPROM4_ETHPHY_ET0M (1<<14) /* MDIO for enet0 */
1255 #define SSB_SPROM4_ETHPHY_ET1M (1<<15) /* MDIO for enet1 */
1256 -#define SSB_SPROM4_ANTAVAIL 0x005D /* Antenna available bitfields */
1257 -#define SSB_SPROM4_ANTAVAIL_A 0x00FF /* A-PHY bitfield */
1258 -#define SSB_SPROM4_ANTAVAIL_A_SHIFT 0
1259 -#define SSB_SPROM4_ANTAVAIL_BG 0xFF00 /* B-PHY and G-PHY bitfield */
1260 -#define SSB_SPROM4_ANTAVAIL_BG_SHIFT 8
1261 +#define SSB_SPROM4_ANTAVAIL 0x005C /* Antenna available bitfields */
1262 +#define SSB_SPROM4_ANTAVAIL_BG 0x00FF /* B-PHY and G-PHY bitfield */
1263 +#define SSB_SPROM4_ANTAVAIL_BG_SHIFT 0
1264 +#define SSB_SPROM4_ANTAVAIL_A 0xFF00 /* A-PHY bitfield */
1265 +#define SSB_SPROM4_ANTAVAIL_A_SHIFT 8
1266 #define SSB_SPROM4_AGAIN01 0x005E /* Antenna Gain (in dBm Q5.2) */
1267 #define SSB_SPROM4_AGAIN0 0x00FF /* Antenna 0 */
1268 #define SSB_SPROM4_AGAIN0_SHIFT 0
1269 --- a/arch/mips/bcm47xx/sprom.c
1270 +++ b/arch/mips/bcm47xx/sprom.c
1271 @@ -168,6 +168,7 @@ static void nvram_read_alpha2(const char
1272 static void bcm47xx_fill_sprom_r1234589(struct ssb_sprom *sprom,
1273 const char *prefix, bool fallback)
1274 {
1275 + nvram_read_u16(prefix, NULL, "devid", &sprom->dev_id, 0, fallback);
1276 nvram_read_u8(prefix, NULL, "ledbh0", &sprom->gpio0, 0xff, fallback);
1277 nvram_read_u8(prefix, NULL, "ledbh1", &sprom->gpio1, 0xff, fallback);
1278 nvram_read_u8(prefix, NULL, "ledbh2", &sprom->gpio2, 0xff, fallback);
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