mac80211: update brcmfmac backporting brcmf_err cleanups
[openwrt/openwrt.git] / target / linux / generic / patches-4.9 / 734-net-phy-at803x-allow-to-configure-via-pdata.patch
1 --- a/drivers/net/phy/at803x.c
2 +++ b/drivers/net/phy/at803x.c
3 @@ -12,12 +12,14 @@
4 */
5
6 #include <linux/phy.h>
7 +#include <linux/mdio.h>
8 #include <linux/module.h>
9 #include <linux/string.h>
10 #include <linux/netdevice.h>
11 #include <linux/etherdevice.h>
12 #include <linux/of_gpio.h>
13 #include <linux/gpio/consumer.h>
14 +#include <linux/platform_data/phy-at803x.h>
15
16 #define AT803X_INTR_ENABLE 0x12
17 #define AT803X_INTR_ENABLE_AUTONEG_ERR BIT(15)
18 @@ -45,6 +47,11 @@
19 #define AT803X_REG_CHIP_CONFIG 0x1f
20 #define AT803X_BT_BX_REG_SEL 0x8000
21
22 +#define AT803X_PCS_SMART_EEE_CTRL3 0x805D
23 +#define AT803X_SMART_EEE_CTRL3_LPI_TX_DELAY_SEL_MASK 0x3
24 +#define AT803X_SMART_EEE_CTRL3_LPI_TX_DELAY_SEL_SHIFT 12
25 +#define AT803X_SMART_EEE_CTRL3_LPI_EN BIT(8)
26 +
27 #define AT803X_DEBUG_ADDR 0x1D
28 #define AT803X_DEBUG_DATA 0x1E
29
30 @@ -72,6 +79,7 @@ MODULE_LICENSE("GPL");
31 struct at803x_priv {
32 bool phy_reset:1;
33 struct gpio_desc *gpiod_reset;
34 + int prev_speed;
35 };
36
37 struct at803x_context {
38 @@ -276,8 +284,16 @@ does_not_require_reset_workaround:
39 return 0;
40 }
41
42 +static void at803x_disable_smarteee(struct phy_device *phydev)
43 +{
44 + phy_write_mmd(phydev, MDIO_MMD_PCS, AT803X_PCS_SMART_EEE_CTRL3,
45 + 1 << AT803X_SMART_EEE_CTRL3_LPI_TX_DELAY_SEL_SHIFT);
46 + phy_write_mmd(phydev, MDIO_MMD_AN, MDIO_AN_EEE_ADV, 0);
47 +}
48 +
49 static int at803x_config_init(struct phy_device *phydev)
50 {
51 + struct at803x_platform_data *pdata;
52 int ret;
53
54 ret = genphy_config_init(phydev);
55 @@ -298,6 +314,26 @@ static int at803x_config_init(struct phy
56 return ret;
57 }
58
59 + pdata = dev_get_platdata(&phydev->mdio.dev);
60 + if (pdata) {
61 + if (pdata->disable_smarteee)
62 + at803x_disable_smarteee(phydev);
63 +
64 + if (pdata->enable_rgmii_rx_delay)
65 + at803x_debug_reg_mask(phydev, AT803X_DEBUG_REG_0, 0,
66 + AT803X_DEBUG_RX_CLK_DLY_EN);
67 + else
68 + at803x_debug_reg_mask(phydev, AT803X_DEBUG_REG_0,
69 + AT803X_DEBUG_RX_CLK_DLY_EN, 0);
70 +
71 + if (pdata->enable_rgmii_tx_delay)
72 + at803x_debug_reg_mask(phydev, AT803X_DEBUG_REG_5, 0,
73 + AT803X_DEBUG_TX_CLK_DLY_EN);
74 + else
75 + at803x_debug_reg_mask(phydev, AT803X_DEBUG_REG_5,
76 + AT803X_DEBUG_TX_CLK_DLY_EN, 0);
77 + }
78 +
79 return 0;
80 }
81
82 @@ -335,6 +371,8 @@ static int at803x_config_intr(struct phy
83 static void at803x_link_change_notify(struct phy_device *phydev)
84 {
85 struct at803x_priv *priv = phydev->priv;
86 + struct at803x_platform_data *pdata;
87 + pdata = dev_get_platdata(&phydev->mdio.dev);
88
89 /*
90 * Conduct a hardware reset for AT8030/2 every time a link loss is
91 @@ -363,6 +401,24 @@ static void at803x_link_change_notify(st
92 } else {
93 priv->phy_reset = false;
94 }
95 + if (pdata && pdata->fixup_rgmii_tx_delay &&
96 + phydev->speed != priv->prev_speed) {
97 + switch (phydev->speed) {
98 + case SPEED_10:
99 + case SPEED_100:
100 + at803x_debug_reg_mask(phydev, AT803X_DEBUG_REG_5, 0,
101 + AT803X_DEBUG_TX_CLK_DLY_EN);
102 + break;
103 + case SPEED_1000:
104 + at803x_debug_reg_mask(phydev, AT803X_DEBUG_REG_5,
105 + AT803X_DEBUG_TX_CLK_DLY_EN, 0);
106 + break;
107 + default:
108 + break;
109 + }
110 +
111 + priv->prev_speed = phydev->speed;
112 + }
113 }
114
115 static int at803x_aneg_done(struct phy_device *phydev)
116 --- /dev/null
117 +++ b/include/linux/platform_data/phy-at803x.h
118 @@ -0,0 +1,11 @@
119 +#ifndef _PHY_AT803X_PDATA_H
120 +#define _PHY_AT803X_PDATA_H
121 +
122 +struct at803x_platform_data {
123 + int disable_smarteee:1;
124 + int enable_rgmii_tx_delay:1;
125 + int enable_rgmii_rx_delay:1;
126 + int fixup_rgmii_tx_delay:1;
127 +};
128 +
129 +#endif /* _PHY_AT803X_PDATA_H */