target/linux/generic/pending-5.4/446-mtd-spinand-gigadevice-Add-QE-Bit.patch

   1 From f72e99ada020a81e3e4ef79c0a83ede7e9d6c7b1 Mon Sep 17 00:00:00 2001
   2 From: Hauke Mehrtens <hauke@hauke-m.de>
   3 Date: Sun, 16 Aug 2020 14:42:17 +0200
   4 Subject: [PATCH v2 446/447] mtd: spinand: gigadevice: Add QE Bit
   5
   6 The following GigaDevice chips have the QE BIT in the feature flags, I
   7 checked the datasheets, but did not try this.
   8 * GD5F1GQ4xExxG
   9 * GD5F1GQ4xFxxG
  10 * GD5F1GQ4UAYIG
  11 * GD5F4GQ4UAYIG
  12
  13 The Quad operations like 0xEB mention that the QE bit has to be set.
  14
  15 Fixes: c93c613214ac ("mtd: spinand: add support for GigaDevice GD5FxGQ4xA")
  16 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
  17 ---
  18  drivers/mtd/nand/spi/gigadevice.c | 10 +++++-----
  19  1 file changed, 5 insertions(+), 5 deletions(-)
  20
  21 --- a/drivers/mtd/nand/spi/gigadevice.c
  22 +++ b/drivers/mtd/nand/spi/gigadevice.c
  23 @@ -201,7 +201,7 @@ static const struct spinand_info gigadev
  24                      SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
  25                                               &write_cache_variants,
  26                                               &update_cache_variants),
  27 -                    0,
  28 +                    SPINAND_HAS_QE_BIT,
  29                      SPINAND_ECCINFO(&gd5fxgq4xa_ooblayout,
  30                                      gd5fxgq4xa_ecc_get_status)),
  31         SPINAND_INFO("GD5F2GQ4xA", 0xF2,
  32 @@ -210,7 +210,7 @@ static const struct spinand_info gigadev
  33                      SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
  34                                               &write_cache_variants,
  35                                               &update_cache_variants),
  36 -                    0,
  37 +                    SPINAND_HAS_QE_BIT,
  38                      SPINAND_ECCINFO(&gd5fxgq4xa_ooblayout,
  39                                      gd5fxgq4xa_ecc_get_status)),
  40         SPINAND_INFO("GD5F4GQ4xA", 0xF4,
  41 @@ -219,7 +219,7 @@ static const struct spinand_info gigadev
  42                      SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
  43                                               &write_cache_variants,
  44                                               &update_cache_variants),
  45 -                    0,
  46 +                    SPINAND_HAS_QE_BIT,
  47                      SPINAND_ECCINFO(&gd5fxgq4xa_ooblayout,
  48                                      gd5fxgq4xa_ecc_get_status)),
  49         SPINAND_INFO("GD5F1GQ4UExxG", 0xd1,
  50 @@ -228,7 +228,7 @@ static const struct spinand_info gigadev
  51                      SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
  52                                               &write_cache_variants,
  53                                               &update_cache_variants),
  54 -                    0,
  55 +                    SPINAND_HAS_QE_BIT,
  56                      SPINAND_ECCINFO(&gd5fxgq4_variant2_ooblayout,
  57                                      gd5fxgq4uexxg_ecc_get_status)),
  58         SPINAND_INFO("GD5F1GQ4UFxxG", 0xb148,
  59 @@ -237,7 +237,7 @@ static const struct spinand_info gigadev
  60                      SPINAND_INFO_OP_VARIANTS(&read_cache_variants_f,
  61                                               &write_cache_variants,
  62                                               &update_cache_variants),
  63 -                    0,
  64 +                    SPINAND_HAS_QE_BIT,
  65                      SPINAND_ECCINFO(&gd5fxgq4_variant2_ooblayout,
  66                                      gd5fxgq4ufxxg_ecc_get_status)),
  67  };