target/linux/ifxmips/files/drivers/net/ifxmips_mii0.c

   1 /*
   2  *   This program is free software; you can redistribute it and/or modify
   3  *   it under the terms of the GNU General Public License as published by
   4  *   the Free Software Foundation; either version 2 of the License, or
   5  *   (at your option) any later version.
   6  *
   7  *   This program is distributed in the hope that it will be useful,
   8  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
   9  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  10  *   GNU General Public License for more details.
  11  *
  12  *   You should have received a copy of the GNU General Public License
  13  *   along with this program; if not, write to the Free Software
  14  *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA.
  15  *
  16  *   Copyright (C) 2005 Wu Qi Ming <Qi-Ming.Wu@infineon.com>
  17  *   Copyright (C) 2008 John Crispin <blogic@openwrt.org>
  18  */
  19
  20 #include <linux/kernel.h>
  21 #include <linux/slab.h>
  22 #include <linux/errno.h>
  23 #include <linux/types.h>
  24 #include <linux/interrupt.h>
  25 #include <asm/uaccess.h>
  26 #include <linux/in.h>
  27 #include <linux/netdevice.h>
  28 #include <linux/etherdevice.h>
  29 #include <linux/ip.h>
  30 #include <linux/tcp.h>
  31 #include <linux/skbuff.h>
  32 #include <linux/mm.h>
  33 #include <linux/platform_device.h>
  34 #include <linux/ethtool.h>
  35 #include <asm/checksum.h>
  36 #include <linux/init.h>
  37 #include <asm/delay.h>
  38 #include <asm/ifxmips/ifxmips.h>
  39 #include <asm/ifxmips/ifxmips_mii0.h>
  40 #include <asm/ifxmips/ifxmips_dma.h>
  41 #include <asm/ifxmips/ifxmips_pmu.h>
  42
  43 static struct net_device *ifxmips_mii0_dev;
  44 static unsigned char mac_addr[MAX_ADDR_LEN];
  45
  46 void
  47 ifxmips_write_mdio(u32 phy_addr, u32 phy_reg, u16 phy_data)
  48 {
  49         u32 val = MDIO_ACC_REQUEST |
  50                 ((phy_addr & MDIO_ACC_ADDR_MASK) << MDIO_ACC_ADDR_OFFSET) |
  51                 ((phy_reg & MDIO_ACC_REG_MASK) << MDIO_ACC_REG_OFFSET) |
  52                 phy_data;
  53
  54         while(ifxmips_r32(IFXMIPS_PPE32_MDIO_ACC) & MDIO_ACC_REQUEST);
  55         ifxmips_w32(val, IFXMIPS_PPE32_MDIO_ACC);
  56 }
  57 EXPORT_SYMBOL(ifxmips_write_mdio);
  58
  59 unsigned short
  60 ifxmips_read_mdio(u32 phy_addr, u32 phy_reg)
  61 {
  62         u32 val = MDIO_ACC_REQUEST | MDIO_ACC_READ |
  63                 ((phy_addr & MDIO_ACC_ADDR_MASK) << MDIO_ACC_ADDR_OFFSET) |
  64                 ((phy_reg & MDIO_ACC_REG_MASK) << MDIO_ACC_REG_OFFSET);
  65
  66         ifxmips_w32(val, IFXMIPS_PPE32_MDIO_ACC);
  67         while(ifxmips_r32(IFXMIPS_PPE32_MDIO_ACC) & MDIO_ACC_REQUEST){};
  68         val = ifxmips_r32(IFXMIPS_PPE32_MDIO_ACC) & MDIO_ACC_VAL_MASK;
  69         return val;
  70 }
  71 EXPORT_SYMBOL(ifxmips_read_mdio);
  72
  73 int
  74 ifxmips_ifxmips_mii_open(struct net_device *dev)
  75 {
  76         struct ifxmips_mii_priv* priv = (struct ifxmips_mii_priv*)dev->priv;
  77         struct dma_device_info* dma_dev = priv->dma_device;
  78         int i;
  79
  80         for(i = 0; i < dma_dev->max_rx_chan_num; i++)
  81         {
  82                 if((dma_dev->rx_chan[i])->control == IFXMIPS_DMA_CH_ON)
  83                         (dma_dev->rx_chan[i])->open(dma_dev->rx_chan[i]);
  84         }
  85         netif_start_queue(dev);
  86         return 0;
  87 }
  88
  89 int
  90 ifxmips_mii_release(struct net_device *dev){
  91         struct ifxmips_mii_priv* priv = (struct ifxmips_mii_priv*)dev->priv;
  92         struct dma_device_info* dma_dev = priv->dma_device;
  93         int i;
  94
  95         for(i = 0; i < dma_dev->max_rx_chan_num; i++)
  96                 dma_dev->rx_chan[i]->close(dma_dev->rx_chan[i]);
  97         netif_stop_queue(dev);
  98         return 0;
  99 }
 100
 101 int
 102 ifxmips_mii_hw_receive(struct net_device* dev,struct dma_device_info* dma_dev)
 103 {
 104         struct ifxmips_mii_priv *priv = (struct ifxmips_mii_priv*)dev->priv;
 105         unsigned char* buf = NULL;
 106         struct sk_buff *skb = NULL;
 107         int len = 0;
 108
 109         len = dma_device_read(dma_dev, &buf, (void**)&skb);
 110
 111         if(len >= ETHERNET_PACKET_DMA_BUFFER_SIZE)
 112         {
 113                 printk(KERN_INFO "ifxmips_mii0: packet too large %d\n",len);
 114                 goto ifxmips_mii_hw_receive_err_exit;
 115         }
 116
 117         /* remove CRC */
 118         len -= 4;
 119         if(skb == NULL)
 120         {
 121                 printk(KERN_INFO "ifxmips_mii0: cannot restore pointer\n");
 122                 goto ifxmips_mii_hw_receive_err_exit;
 123         }
 124
 125         if(len > (skb->end - skb->tail))
 126         {
 127                 printk(KERN_INFO "ifxmips_mii0: BUG, len:%d end:%p tail:%p\n",
 128                         (len+4), skb->end, skb->tail);
 129                 goto ifxmips_mii_hw_receive_err_exit;
 130         }
 131
 132         skb_put(skb, len);
 133         skb->dev = dev;
 134         skb->protocol = eth_type_trans(skb, dev);
 135         netif_rx(skb);
 136
 137         priv->stats.rx_packets++;
 138         priv->stats.rx_bytes += len;
 139         return 0;
 140
 141 ifxmips_mii_hw_receive_err_exit:
 142         if(len == 0)
 143         {
 144                 if(skb)
 145                         dev_kfree_skb_any(skb);
 146                 priv->stats.rx_errors++;
 147                 priv->stats.rx_dropped++;
 148                 return -EIO;
 149         } else {
 150                 return len;
 151         }
 152 }
 153
 154 int
 155 ifxmips_mii_hw_tx(char *buf, int len, struct net_device *dev)
 156 {
 157         int ret = 0;
 158         struct ifxmips_mii_priv *priv = dev->priv;
 159         struct dma_device_info* dma_dev = priv->dma_device;
 160         ret = dma_device_write(dma_dev, buf, len, priv->skb);
 161         return ret;
 162 }
 163
 164 int
 165 ifxmips_mii_tx(struct sk_buff *skb, struct net_device *dev)
 166 {
 167         int len;
 168         char *data;
 169         struct ifxmips_mii_priv *priv = dev->priv;
 170         struct dma_device_info* dma_dev = priv->dma_device;
 171
 172         len = skb->len < ETH_ZLEN ? ETH_ZLEN : skb->len;
 173         data = skb->data;
 174         priv->skb = skb;
 175         dev->trans_start = jiffies;
 176         // TODO we got more than 1 dma channel, so we should do something intelligent
 177         // here to select one
 178         dma_dev->current_tx_chan = 0;
 179
 180         wmb();
 181
 182         if(ifxmips_mii_hw_tx(data, len, dev) != len)
 183         {
 184                 dev_kfree_skb_any(skb);
 185                 priv->stats.tx_errors++;
 186                 priv->stats.tx_dropped++;
 187         } else {
 188                 priv->stats.tx_packets++;
 189                 priv->stats.tx_bytes+=len;
 190         }
 191
 192         return 0;
 193 }
 194
 195 void
 196 ifxmips_mii_tx_timeout(struct net_device *dev)
 197 {
 198         int i;
 199         struct ifxmips_mii_priv* priv = (struct ifxmips_mii_priv*)dev->priv;
 200
 201         priv->stats.tx_errors++;
 202         for(i = 0; i < priv->dma_device->max_tx_chan_num; i++)
 203                 priv->dma_device->tx_chan[i]->disable_irq(priv->dma_device->tx_chan[i]);
 204         netif_wake_queue(dev);
 205         return;
 206 }
 207
 208 int
 209 dma_intr_handler(struct dma_device_info* dma_dev, int status)
 210 {
 211         int i;
 212
 213         switch(status)
 214         {
 215         case RCV_INT:
 216                 ifxmips_mii_hw_receive(ifxmips_mii0_dev, dma_dev);
 217                 break;
 218
 219         case TX_BUF_FULL_INT:
 220                 printk(KERN_INFO "ifxmips_mii0: tx buffer full\n");
 221                 netif_stop_queue(ifxmips_mii0_dev);
 222                 for (i = 0; i < dma_dev->max_tx_chan_num; i++)
 223                 {
 224                         if ((dma_dev->tx_chan[i])->control==IFXMIPS_DMA_CH_ON)
 225                                 dma_dev->tx_chan[i]->enable_irq(dma_dev->tx_chan[i]);
 226                 }
 227                 break;
 228
 229         case TRANSMIT_CPT_INT:
 230                 for(i = 0; i < dma_dev->max_tx_chan_num; i++)
 231                         dma_dev->tx_chan[i]->disable_irq(dma_dev->tx_chan[i]);
 232
 233                 netif_wake_queue(ifxmips_mii0_dev);
 234                 break;
 235         }
 236
 237         return 0;
 238 }
 239
 240 unsigned char*
 241 ifxmips_etop_dma_buffer_alloc(int len, int *byte_offset, void **opt)
 242 {
 243         unsigned char *buffer = NULL;
 244         struct sk_buff *skb = NULL;
 245
 246         skb = dev_alloc_skb(ETHERNET_PACKET_DMA_BUFFER_SIZE);
 247         if(skb == NULL)
 248                 return NULL;
 249
 250         buffer = (unsigned char*)(skb->data);
 251         skb_reserve(skb, 2);
 252         *(int*)opt = (int)skb;
 253         *byte_offset = 2;
 254
 255         return buffer;
 256 }
 257
 258 void
 259 ifxmips_etop_dma_buffer_free(unsigned char *dataptr, void *opt)
 260 {
 261         struct sk_buff *skb = NULL;
 262
 263         if(opt == NULL)
 264         {
 265                 kfree(dataptr);
 266         } else {
 267                 skb = (struct sk_buff*)opt;
 268                 dev_kfree_skb_any(skb);
 269         }
 270 }
 271
 272 static struct net_device_stats*
 273 ifxmips_get_stats(struct net_device *dev)
 274 {
 275         return (struct net_device_stats *)dev->priv;
 276 }
 277
 278 static int
 279 ifxmips_mii_dev_init(struct net_device *dev)
 280 {
 281         int i;
 282         struct ifxmips_mii_priv *priv;
 283
 284         ether_setup(dev);
 285         printk(KERN_INFO "ifxmips_mii0: %s is up\n", dev->name);
 286         dev->open = ifxmips_ifxmips_mii_open;
 287         dev->stop = ifxmips_mii_release;
 288         dev->hard_start_xmit = ifxmips_mii_tx;
 289         dev->get_stats = ifxmips_get_stats;
 290         dev->tx_timeout = ifxmips_mii_tx_timeout;
 291         dev->watchdog_timeo = 10 * HZ;
 292         memset(dev->priv, 0, sizeof(struct ifxmips_mii_priv));
 293         priv = dev->priv;
 294         priv->dma_device = dma_device_reserve("PPE");
 295         if(!priv->dma_device){
 296                 BUG();
 297                 return -ENODEV;
 298         }
 299         priv->dma_device->buffer_alloc = &ifxmips_etop_dma_buffer_alloc;
 300         priv->dma_device->buffer_free = &ifxmips_etop_dma_buffer_free;
 301         priv->dma_device->intr_handler = &dma_intr_handler;
 302         priv->dma_device->max_rx_chan_num = 4;
 303
 304         for(i = 0; i < priv->dma_device->max_rx_chan_num; i++)
 305         {
 306                 priv->dma_device->rx_chan[i]->packet_size = ETHERNET_PACKET_DMA_BUFFER_SIZE;
 307                 priv->dma_device->rx_chan[i]->control = IFXMIPS_DMA_CH_ON;
 308         }
 309
 310         for(i = 0; i < priv->dma_device->max_tx_chan_num; i++)
 311                 if(i == 0)
 312                         priv->dma_device->tx_chan[i]->control = IFXMIPS_DMA_CH_ON;
 313                 else
 314                         priv->dma_device->tx_chan[i]->control = IFXMIPS_DMA_CH_OFF;
 315
 316         dma_device_register(priv->dma_device);
 317
 318         printk(KERN_INFO "ifxmips_mii0: using mac=");
 319         for(i = 0; i < 6; i++)
 320         {
 321                 dev->dev_addr[i] = mac_addr[i];
 322                 printk("%02X%c", dev->dev_addr[i], (i == 5)?('\n'):(':'));
 323         }
 324         return 0;
 325 }
 326
 327 static void
 328 ifxmips_mii_chip_init(int mode)
 329 {
 330         ifxmips_pmu_enable(IFXMIPS_PMU_PWDCR_DMA);
 331         ifxmips_pmu_enable(IFXMIPS_PMU_PWDCR_PPE);
 332
 333         if(mode == REV_MII_MODE)
 334                 ifxmips_w32_mask(PPE32_MII_MASK, PPE32_MII_REVERSE, IFXMIPS_PPE32_CFG);
 335         else if(mode == MII_MODE)
 336                 ifxmips_w32_mask(PPE32_MII_MASK, PPE32_MII_NORMAL, IFXMIPS_PPE32_CFG);
 337         ifxmips_w32(PPE32_PLEN_UNDER | PPE32_PLEN_OVER, IFXMIPS_PPE32_IG_PLEN_CTRL);
 338         ifxmips_w32(PPE32_CGEN, IFXMIPS_PPE32_ENET_MAC_CFG);
 339         wmb();
 340 }
 341
 342 static int
 343 ifxmips_mii_probe(struct platform_device *dev)
 344 {
 345         int result = 0;
 346         struct ifxmips_mac *mac = (struct ifxmips_mac*)dev->dev.platform_data;
 347         ifxmips_mii0_dev = alloc_etherdev(sizeof(struct ifxmips_mii_priv));
 348         ifxmips_mii0_dev->init = ifxmips_mii_dev_init;
 349         memcpy(mac_addr, mac->mac, 6);
 350         strcpy(ifxmips_mii0_dev->name, "eth%d");
 351         ifxmips_mii_chip_init(REV_MII_MODE);
 352         result = register_netdev(ifxmips_mii0_dev);
 353         if (result)
 354         {
 355                 printk(KERN_INFO "ifxmips_mii0: error %i registering device \"%s\"\n", result, ifxmips_mii0_dev->name);
 356                 goto out;
 357         }
 358
 359         printk(KERN_INFO "ifxmips_mii0: driver loaded!\n");
 360
 361 out:
 362         return result;
 363 }
 364
 365 static int
 366 ifxmips_mii_remove(struct platform_device *dev)
 367 {
 368         struct ifxmips_mii_priv *priv = (struct ifxmips_mii_priv*)ifxmips_mii0_dev->priv;
 369
 370         printk(KERN_INFO "ifxmips_mii0: ifxmips_mii0 cleanup\n");
 371
 372         dma_device_unregister(priv->dma_device);
 373         dma_device_release(priv->dma_device);
 374         kfree(priv->dma_device);
 375         kfree(ifxmips_mii0_dev->priv);
 376         unregister_netdev(ifxmips_mii0_dev);
 377         return 0;
 378 }
 379
 380 static struct
 381 platform_driver ifxmips_mii_driver = {
 382         .probe = ifxmips_mii_probe,
 383         .remove = ifxmips_mii_remove,
 384         .driver = {
 385                 .name = "ifxmips_mii0",
 386                 .owner = THIS_MODULE,
 387         },
 388 };
 389
 390 int __init
 391 ifxmips_mii_init(void)
 392 {
 393         int ret = platform_driver_register(&ifxmips_mii_driver);
 394         if (ret)
 395                 printk(KERN_INFO "ifxmips_mii0: Error registering platfom driver!");
 396         return ret;
 397 }
 398
 399 static void __exit
 400 ifxmips_mii_cleanup(void)
 401 {
 402         platform_driver_unregister(&ifxmips_mii_driver);
 403 }
 404
 405 module_init(ifxmips_mii_init);
 406 module_exit(ifxmips_mii_cleanup);
 407
 408 MODULE_LICENSE("GPL");
 409 MODULE_AUTHOR("John Crispin <blogic@openwrt.org>");
 410 MODULE_DESCRIPTION("ethernet map driver for IFXMIPS boards");