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imx6: drop 4.3 support
[openwrt/openwrt.git] / target / linux / imx6 / files-4.1 / drivers / net / phy / gw16083.c
1 /*
2 * drivers/net/phy/gw16083.c
3 *
4 * Driver for GW16083 Ventana Ethernet Expansion Mezzanine
5 *
6 * Author: Tim Harvey
7 *
8 * Copyright (c) 2014 Tim Harvey <tharvey@gateworks.com>
9 *
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the
12 * Free Software Foundation; either version 2 of the License, or (at your
13 * option) any later version.
14 *
15 */
16
17 /*
18 * The GW16083 interfaces with a Ventana baseboard via the PCIe bus, an i2c
19 * bus (i2c2), and a couple of GPIO's. On the PCIe bus is an i210 GigE with
20 * its MAC connected to Port4 of a Marvell MV88E6176 7-port GigE switch via
21 * MDIO and RGMII. Ports 0-3 are standard copper RJ45 but Ports 5 and 6
22 * connect to Marvell MV88E1111 dual-mode Copper/Fiber PHY's over SGMII and
23 * MDIO. The PHY's have both an RG45 for copper and an SFP module.
24 */
25
26 #include <linux/kernel.h>
27 #include <linux/string.h>
28 #include <linux/errno.h>
29 #include <linux/unistd.h>
30 #include <linux/i2c.h>
31 #include <linux/interrupt.h>
32 #include <linux/init.h>
33 #include <linux/delay.h>
34 #include <linux/device.h>
35 #include <linux/netdevice.h>
36 #include <linux/etherdevice.h>
37 #include <linux/skbuff.h>
38 #include <linux/spinlock.h>
39 #include <linux/mm.h>
40 #include <linux/module.h>
41 #include <linux/mii.h>
42 #include <linux/ethtool.h>
43 #include <linux/phy.h>
44 #include <linux/marvell_phy.h>
45 #include <linux/of_platform.h>
46
47 #include <linux/io.h>
48 #include <asm/irq.h>
49 #include <linux/uaccess.h>
50
51 #include "gw16083.h"
52
53 #undef FAIL_ON_CHECKSUM_ERR /* fail to configure SFP if checksum bad */
54 #define PORT_POWER_CONTROL /* ports can be enabled/disabled via sysfs */
55 #define PORT_MODE_CONTROL /* ports 5/6 can have SFP/RJ45 mode forced */
56
57 MODULE_DESCRIPTION("GW16083 driver");
58 MODULE_AUTHOR("Tim Harvey");
59 MODULE_LICENSE("GPL");
60
61 struct mv88e1111_port_state {
62 int port;
63 bool present;
64 bool serdes;
65 bool sfp_signal;
66 bool sfp_present;
67 bool sfp_compat;
68 bool sfp_enabled;
69 char sfp_id[64];
70 };
71
72 struct mv88e1111_priv {
73 struct phy_device *phydev;
74 struct i2c_client *client;
75 struct mv88e1111_port_state port5;
76 struct mv88e1111_port_state port6;
77 struct kobject *sysfs_kobj;
78 };
79
80 enum {
81 mode_copper = 0,
82 mode_serdes = 1,
83 };
84
85 static struct i2c_client *gw16083_client = NULL;
86
87 static int gw16083_read_port_sfp(struct i2c_client *client,
88 struct mv88e1111_port_state *state);
89
90 /* read switch port register from port0-6 */
91 u16 read_switch_port(struct phy_device *pdev, int port, u8 regaddr)
92 {
93 return pdev->bus->read(pdev->bus, MV_BASE + port, regaddr);
94 }
95
96 /* write switch port register to port0-6 */
97 int write_switch_port(struct phy_device *pdev, int port, u8 regaddr, u16 val)
98 {
99 return pdev->bus->write(pdev->bus, MV_BASE + port, regaddr, val);
100 }
101
102 /*
103 * read_switch_port_phy - write a register for a specific port on 88E6176
104 * The 88E6176 PHY registers must be accessed thorugh the Global2 address
105 * using the SMI_PHY_COMMAND_REG and SMI_PHY_DATA_REG.
106 */
107 int read_switch_port_phy(struct phy_device *pdev, int port, u8 regaddr)
108 {
109 u16 reg;
110 int i;
111
112 dev_dbg(&pdev->dev, "read_phy: port%d reg=0x%02x\n", port, regaddr);
113 reg = SMIBUSY | SMIMODE22 | SMIOP_READ;
114 reg |= port << DEVADDR;
115 reg |= regaddr << REGADDR;
116 pdev->bus->write(pdev->bus, MV_GLOBAL2, MV_SMI_PHY_COMMAND, reg);
117 for (i = 0; i < 10; i++) {
118 reg = pdev->bus->read(pdev->bus, MV_GLOBAL2,
119 MV_SMI_PHY_COMMAND);
120 if (!(reg & (1<<15)))
121 break;
122 mdelay(1);
123 }
124 /* timeout */
125 if (i == 10)
126 return 0xffff;
127 reg = pdev->bus->read(pdev->bus, MV_GLOBAL2, MV_SMI_PHY_DATA);
128 return reg;
129 }
130
131 /*
132 * write_switch_port_phy - write a register for a specific port on 88E6176
133 * The 88E6176 PHY registers must be accessed thorugh the Global2 address
134 * using the SMI_PHY_COMMAND_REG and SMI_PHY_DATA_REG.
135 */
136 int write_switch_port_phy(struct phy_device *pdev, int port, u8 addr, u16 reg)
137 {
138 int i;
139
140 dev_dbg(&pdev->dev, "write_phy: port%d reg=0x%02x val=0x%04x\n", port,
141 addr, reg);
142 pdev->bus->write(pdev->bus, MV_GLOBAL2, MV_SMI_PHY_DATA, reg);
143 reg = SMIBUSY | SMIMODE22 | SMIOP_WRITE;
144 reg |= port << DEVADDR;
145 reg |= addr << REGADDR;
146 pdev->bus->write(pdev->bus, MV_GLOBAL2, MV_SMI_PHY_COMMAND, reg);
147 for (i = 0; i < 10; i++) {
148 reg = pdev->bus->read(pdev->bus, MV_GLOBAL2,
149 MV_SMI_PHY_COMMAND);
150 if (!(reg & (1<<15)))
151 break;
152 mdelay(1);
153 }
154 /* timeout */
155 if (i == 10)
156 return -ETIMEDOUT;
157
158 return 0;
159 }
160
161 /* read a scratch register from switch */
162 inline u8 read_switch_scratch(struct phy_device *pdev, u8 reg)
163 {
164 pdev->bus->write(pdev->bus, MV_GLOBAL2, MV_SCRATCH_MISC, (reg << 8));
165 return pdev->bus->read(pdev->bus, MV_GLOBAL2, MV_SCRATCH_MISC) & 0xff;
166 }
167
168 /* write a scratch register to switch */
169 inline void write_switch_scratch(struct phy_device *pdev, u8 reg, u8 val)
170 {
171 pdev->bus->write(pdev->bus, MV_GLOBAL2, MV_SCRATCH_MISC,
172 (1 << 15) | (reg << 8) | val);
173 }
174
175 /* enable or disable an SFP's TXEN signal */
176 static int enable_sfp_txen(struct phy_device *pdev, int port, bool enable)
177 {
178 u8 gpio;
179 int bit;
180
181 if (port != 5 && port != 6)
182 return -EINVAL;
183
184 /* GPIO[2:1] output low to enable TXEN */
185 bit = (port == 5) ? 1 : 2;
186 gpio = read_switch_scratch(pdev, MV_GPIO_DATA);
187 if (enable)
188 gpio |= (1 << bit);
189 else
190 gpio &= (1 << bit);
191 write_switch_scratch(pdev, MV_GPIO_DATA, gpio);
192 dev_info(&pdev->dev, "Port%d: SFP TX %s\n", port, enable ?
193 "enabled" : "disabled");
194 return 0;
195 }
196
197 /* configure mv88e1111 port for copper or serdes
198 * For Copper we set auto link/duplex/speed detection
199 * For SerDes/Fiber we force 1000mbps link up and auto-neg duplex
200 */
201 static int config_mv88e1111_port_sfp(struct phy_device *pdev, int port,
202 bool sfp)
203 {
204 u16 reg;
205
206 if (port != 5 && port != 6)
207 return -EINVAL;
208
209 dev_dbg(&pdev->dev, "%s: Port%d %s\n", __func__, port,
210 sfp ? "SFP" : "copper");
211 if (sfp) {
212 enable_sfp_txen(pdev, port, 1);
213
214 /* configure MV88E6176 Physical Control Port Register */
215 dev_info(&pdev->dev,
216 "Port%d: SFP: force 1000mbps link up "
217 "(auto-negotiate duplex)\n",
218 port);
219 reg = read_switch_port(pdev, port, MV_PORT_PHYS_CONTROL);
220 reg &= ~0x3f; /* clear 5-0 */
221 reg |= (1 << 4) | (1 << 5); /* force link up */
222 reg |= 2; /* force 1000mbps */
223 write_switch_port(pdev, port, MV_PORT_PHYS_CONTROL, reg);
224 reg = read_switch_port(pdev, port, MV_PORT_PHYS_CONTROL);
225 }
226
227 /* copper */
228 else {
229 enable_sfp_txen(pdev, port, 0);
230
231 /* configure MV88E6176 Physical Control Port Register */
232 dev_info(&pdev->dev,
233 "Port%d: Copper: set auto-neg link/duplex/speed\n",
234 port);
235 reg = read_switch_port(pdev, port, MV_PORT_PHYS_CONTROL);
236 reg &= ~0x3f; /* clear 5-0 */
237 reg |= 3; /* speed not forced */
238 write_switch_port(pdev, port, MV_PORT_PHYS_CONTROL, reg);
239 reg = read_switch_port(pdev, port, MV_PORT_PHYS_CONTROL);
240 }
241 dev_dbg(&pdev->dev, "%s: Port%d %s PORT_PHYS_CONTROL=0x%04x\n",
242 __func__, port, sfp ? "SFP" : "copper",
243 read_switch_port(pdev, port, MV_PORT_PHYS_CONTROL));
244
245 return 0;
246 }
247
248 #if defined(PORT_POWER_CONTROL)
249 static int enable_switch_port(struct phy_device *pdev, int port, bool enable)
250 {
251 struct mv88e1111_priv *priv = dev_get_drvdata(&pdev->dev);
252 u16 reg;
253
254 /* power up port */
255 dev_info(&priv->client->dev, "Port%d: %s\n", port,
256 enable ? "normal operation" : "power down");
257 reg = read_switch_port_phy(pdev, port, MV_PHY_CONTROL);
258 if (enable)
259 reg &= ~(1 << 11); /* Normal Operation */
260 else
261 reg |= (1 << 11); /* power down */
262 write_switch_port_phy(pdev, port, MV_PHY_CONTROL, reg);
263
264 reg = read_switch_port_phy(pdev, port, MV_PHY_CONTROL1);
265 if (enable)
266 reg &= ~(1 << 2); /* Normal Operation */
267 else
268 reg |= (1 << 2); /* power down */
269 write_switch_port_phy(pdev, port, MV_PHY_CONTROL1, reg);
270
271 return 0;
272 }
273 #endif
274
275 /*
276 * Sysfs API
277 */
278
279 struct mv88e1111_port_state *get_port_state(struct mv88e1111_priv *priv,
280 int port)
281 {
282 if (port == 5)
283 return &priv->port5;
284 if (port == 6)
285 return &priv->port6;
286 return NULL;
287 }
288
289 /*
290 * get MV88E6176 port number for a specific GW16083 port name
291 * The GW16083 ports as shown on the silkscreen are not mapped according to
292 * the MV88E6176 ports numbers.
293 */
294 static int gw16083_get_port(const char* name)
295 {
296 int i;
297 int map[] = { 3, 2, 1, 0, 5, 6 };
298
299 if (strncasecmp(name, "ETHERNET", 8) != 0 || strlen(name) != 9)
300 return -1;
301 i = name[8] - '0';
302 if (i < 1 || i > 6)
303 return -1;
304 return map[i-1];
305 }
306
307 static ssize_t port_show(struct device *dev, struct device_attribute *attr,
308 char *buf)
309 {
310 struct mv88e1111_priv *priv = dev_get_drvdata(dev);
311 int port = -1;
312 u16 reg;
313
314 if (sscanf(attr->attr.name, "port%d", &port) != 1)
315 return 0;
316 if (port < 0 || port > 6)
317 return 0;
318 reg = read_switch_port_phy(priv->phydev, port, MV_PHY_CONTROL);
319 return sprintf(buf, "%s\n", (reg & (1 << 11)) ? "disabled" : "enabled");
320 }
321
322 #if defined(PORT_POWER_CONTROL)
323 static ssize_t port_store(struct device *dev, struct device_attribute *attr,
324 const char *buf, size_t count)
325 {
326 struct mv88e1111_priv *priv = dev_get_drvdata(dev);
327 int port = -1;
328 int val;
329
330 port = gw16083_get_port(attr->attr.name);
331 if (port < 0)
332 return 0;
333 if (sscanf(buf, "%d", &val) != 1)
334 return 0;
335 enable_switch_port(priv->phydev, port, val ? 1 : 0);
336 return count;
337 }
338
339 static DEVICE_ATTR(ethernet1, S_IWUSR | S_IRUGO, port_show, port_store);
340 static DEVICE_ATTR(ethernet2, S_IWUSR | S_IRUGO, port_show, port_store);
341 static DEVICE_ATTR(ethernet3, S_IWUSR | S_IRUGO, port_show, port_store);
342 static DEVICE_ATTR(ethernet4, S_IWUSR | S_IRUGO, port_show, port_store);
343 static DEVICE_ATTR(ethernet5, S_IWUSR | S_IRUGO, port_show, port_store);
344 static DEVICE_ATTR(ethernet6, S_IWUSR | S_IRUGO, port_show, port_store);
345 #else
346 static DEVICE_ATTR(ethernet1, S_IRUGO, port_show, NULL);
347 static DEVICE_ATTR(ethernet2, S_IRUGO, port_show, NULL);
348 static DEVICE_ATTR(ethernet3, S_IRUGO, port_show, NULL);
349 static DEVICE_ATTR(ethernet4, S_IRUGO, port_show, NULL);
350 static DEVICE_ATTR(ethernet5, S_IRUGO, port_show, NULL);
351 static DEVICE_ATTR(ethernet6, S_IRUGO, port_show, NULL);
352 #endif
353
354 static ssize_t portsfp_show(struct device *dev, struct device_attribute *attr,
355 char *buf)
356 {
357 struct mv88e1111_priv *priv = dev_get_drvdata(dev);
358 struct mv88e1111_port_state *state;
359
360 state = get_port_state(priv, gw16083_get_port(attr->attr.name));
361 if (!state)
362 return 0;
363
364 if (!state->sfp_present)
365 return 0;
366
367 return sprintf(buf, "%s\n", state->sfp_id);
368 }
369
370 static ssize_t portmode_show(struct device *dev, struct device_attribute *attr,
371 char *buf)
372 {
373 struct mv88e1111_priv *priv = dev_get_drvdata(dev);
374 struct mv88e1111_port_state *state;
375
376 state = get_port_state(priv, gw16083_get_port(attr->attr.name));
377 if (!state)
378 return 0;
379
380 return sprintf(buf, "%s\n", state->serdes ? "SFP" : "RJ45");
381 }
382 static DEVICE_ATTR(ethernet5_sfp, S_IRUGO, portsfp_show, NULL);
383 static DEVICE_ATTR(ethernet6_sfp, S_IRUGO, portsfp_show, NULL);
384
385 #ifdef PORT_MODE_CONTROL
386 static ssize_t portmode_store(struct device *dev, struct device_attribute *attr,
387 const char *buf, size_t count)
388 {
389 struct mv88e1111_priv *priv = dev_get_drvdata(dev);
390 struct mv88e1111_port_state *state;
391 u16 reg;
392 int port;
393
394 port = gw16083_get_port(attr->attr.name);
395 state = get_port_state(priv, port);
396 if (!state)
397 return 0;
398
399 reg = read_switch_port_phy(priv->phydev, port, MII_M1111_PHY_EXT_SR);
400 if (strcasecmp(buf, "auto") == 0) {
401 reg &= ~(1<<15); /* enable auto-selection */
402 dev_info(&priv->client->dev, "Port%d: enable auto-selection\n",
403 port);
404 } else if (strcasecmp(buf, "RJ45") == 0) {
405 reg |= (1<<15); /* disable auto-selection */
406 reg |= 0xb; /* RGMII to Copper */
407 config_mv88e1111_port_sfp(priv->phydev, port, 0);
408 dev_info(&priv->client->dev, "Port%d: select RJ45\n", port);
409 } else if (strcasecmp(buf, "SFP") == 0) {
410 reg |= (1<<15); /* disable auto-selection */
411 reg |= 0x3; /* RGMII to Fiber */
412 config_mv88e1111_port_sfp(priv->phydev, port, 1);
413 dev_info(&priv->client->dev, "Port%d: select SFP\n", port);
414 }
415 write_switch_port_phy(priv->phydev, port, MII_M1111_PHY_EXT_SR, reg);
416
417 return count;
418 }
419
420 static DEVICE_ATTR(ethernet5_mode, S_IWUSR | S_IRUGO, portmode_show,
421 portmode_store);
422 static DEVICE_ATTR(ethernet6_mode, S_IWUSR | S_IRUGO, portmode_show,
423 portmode_store);
424 #else
425 static DEVICE_ATTR(ethernet5_mode, S_IRUGO, portmode_show, NULL);
426 static DEVICE_ATTR(ethernet6_mode, S_IRUGO, portmode_show, NULL);
427 #endif
428
429
430 /*
431 * PHY driver
432 */
433
434 static int
435 mv88e6176_config_init(struct phy_device *pdev)
436 {
437 dev_dbg(&pdev->dev, "%s\n", __func__);
438 pdev->state = PHY_RUNNING;
439
440 return 0;
441 }
442
443 /* check MV88E1111 PHY status and MV88E6176 GPIO */
444 static int
445 mv88e6176_read_status(struct phy_device *pdev)
446 {
447 struct mv88e1111_priv *priv = dev_get_drvdata(&pdev->dev);
448 struct mv88e1111_port_state *state;
449 bool serdes, sfp_present, sfp_signal;
450 int port;
451 int ret = 0;
452 u16 gpio;
453
454 dev_dbg(&pdev->dev, "%s", __func__);
455 gpio = read_switch_scratch(pdev, MV_GPIO_DATA);
456 for (port = 5; port < 7; port++) {
457 serdes = (read_switch_port_phy(pdev, port, MII_M1111_PHY_EXT_SR)
458 & (1<<13)) ? 1 : 0;
459 dev_dbg(&pdev->dev, "%s: Port%d GPIO:0x%02x SerDes:%d\n",
460 __func__, port, gpio, serdes);
461 switch(port) {
462 case 5:
463 state = &priv->port5;
464 sfp_present = !((gpio >> 5) & 1);
465 sfp_signal = !((gpio >> 6) & 1);
466 break;
467 case 6:
468 state = &priv->port6;
469 sfp_present = !((gpio >> 3) & 1);
470 sfp_signal = !((gpio >> 4) & 1);
471 break;
472 }
473
474 /*
475 * on sfp_detect read/verify SFP MSA and set sfp_compat
476 * on sfp_signal issue link down?
477 * on serdes auto-select
478 */
479 if (state->sfp_present != sfp_present) {
480 state->sfp_present = sfp_present;
481 dev_info(&pdev->dev, "Port%d: SFP %s\n",
482 port, sfp_present ? "inserted" : "removed");
483 if (state->sfp_present) {
484 if (gw16083_read_port_sfp(priv->client, state))
485 state->sfp_compat = false;
486 else
487 state->sfp_compat = true;
488 /* trigger a re-select/enable below */
489 state->serdes = !serdes;
490 pdev->state = PHY_RUNNING;
491 } else {
492 state->sfp_compat = false;
493 state->sfp_enabled = false;
494 pdev->state = PHY_NOLINK;
495 }
496 }
497 if (state->sfp_signal != sfp_signal) {
498 state->sfp_signal = sfp_signal;
499 dev_info(&pdev->dev, "Port%d: SFP signal %s\n",
500 port, sfp_signal ? "detected" : "lost");
501 }
502 if (state->serdes != serdes) {
503 state->serdes = serdes;
504 dev_info(&pdev->dev, "Port%d: %s auto-selected\n",
505 port, serdes ? "SERDES" : "copper");
506
507 /*
508 * if auto-selection has switched to copper
509 * disable serdes
510 */
511 if (!serdes) {
512 config_mv88e1111_port_sfp(pdev, port, 0);
513 state->sfp_enabled = false;
514 }
515 }
516
517 /* if compatible SFP module and not yet enabled then enable */
518 if (state->sfp_compat && state->sfp_signal &&
519 !state->sfp_enabled)
520 {
521 if (!config_mv88e1111_port_sfp(pdev, port, 1))
522 state->sfp_enabled = true;
523 }
524 }
525
526 return ret;
527 }
528
529 static int
530 mv88e6176_config_aneg(struct phy_device *pdev)
531 {
532 dev_dbg(&pdev->dev, "%s", __func__);
533 return 0;
534 }
535
536 static void
537 mv88e6176_remove(struct phy_device *pdev)
538 {
539 dev_dbg(&pdev->dev, "%s", __func__);
540
541 device_remove_file(&pdev->dev, &dev_attr_ethernet1);
542 device_remove_file(&pdev->dev, &dev_attr_ethernet2);
543 device_remove_file(&pdev->dev, &dev_attr_ethernet3);
544 device_remove_file(&pdev->dev, &dev_attr_ethernet4);
545 device_remove_file(&pdev->dev, &dev_attr_ethernet5);
546 device_remove_file(&pdev->dev, &dev_attr_ethernet6);
547 device_remove_file(&pdev->dev, &dev_attr_ethernet5_sfp);
548 device_remove_file(&pdev->dev, &dev_attr_ethernet6_sfp);
549 device_remove_file(&pdev->dev, &dev_attr_ethernet5_mode);
550 device_remove_file(&pdev->dev, &dev_attr_ethernet6_mode);
551 sysfs_remove_link(kernel_kobj, "gw16083");
552 }
553
554 static int
555 mv88e6176_probe(struct phy_device *pdev)
556 {
557 int port;
558 int ret = 0;
559 u32 id, reg;
560 struct mv88e1111_priv *priv;
561
562 dev_dbg(&pdev->dev, "%s: addr=0x%02x bus=%s:%s gw16083_client=%p\n",
563 __func__, pdev->addr, pdev->bus->name, pdev->bus->id,
564 gw16083_client);
565
566 /* In single-chip addressing mode the MV88E6176 shows up on 0x10-0x16 */
567 if (pdev->addr != MV_BASE)
568 return 0;
569
570 /* i2c driver needs to be loaded first */
571 if (!gw16083_client)
572 return 0;
573
574 /* gw16083 has MV88E1676 hanging off of i210 mdio bus */
575 if (strcmp(pdev->bus->name, "igb_enet_mii_bus") != 0)
576 return 0;
577
578 //dev_info(&pdev->dev, "Detected");
579 dev_info(&gw16083_client->dev, "%s: MV88E6176 7-port switch detected",
580 pdev->bus->id);
581
582 /*
583 * port5/6 config: MV88E1111 PHY
584 * Register 20: PHY Control Register
585 * R20_7: add delay to RX_CLK for RXD
586 * R20_1: add delay to TX_CLK for TXD
587 * Register 24: LED Control Register
588 * 0x4111:
589 * Pulse stretch 170 to 340 ms
590 * Register 0: Control Register
591 * R0_15: phy reset
592 */
593 for (port = 5; port < 7; port++) {
594 #ifndef RGMII_DELAY_ON_PHY
595 write_switch_port(pdev, port, MV_PORT_PHYS_CONTROL, 0xC003);
596 #endif
597
598 id = read_switch_port_phy(pdev, port,
599 MII_M1111_PHY_IDENT0) << 16;
600 id |= read_switch_port_phy(pdev, port, MII_M1111_PHY_IDENT1);
601 if ((id & MII_M1111_PHY_ID_MASK) != MII_M1111_PHY_ID) {
602 dev_err(&gw16083_client->dev,
603 "Port%d: No MV88E1111 PHY detected", port);
604 return 0;
605 //continue;
606 }
607
608 #ifdef RGMII_DELAY_ON_PHY
609 /* phy rx/tx delay */
610 reg = read_switch_port_phy(pdev, port, MII_M1111_PHY_EXT_CR);
611 reg |= (1<<1) | (1<<7);
612 write_switch_port_phy(pdev, port, MII_M1111_PHY_EXT_CR, reg);
613 #endif
614 /* led config */
615 write_switch_port_phy(pdev, port, MII_M1111_PHY_LED_CONTROL,
616 MII_M1111_PHY_LED_PULSE_STR);
617 /* reset phy */
618 reg = read_switch_port_phy(pdev, port, MII_M1111_PHY_CONTROL);
619 reg |= MII_M1111_PHY_CONTROL_RESET;
620 write_switch_port_phy(pdev, port, MII_M1111_PHY_CONTROL, reg);
621 dev_info(&gw16083_client->dev,
622 "Port%d MV88E111 PHY configured\n", port);
623 }
624
625 /*
626 * GPIO Configuration:
627 * GPIO1: FIB5_TXEN# (output)
628 * GPIO2: FIB6_TXEN# (output)
629 * GPIO3: FIB6_PRES# (input)
630 * GPIO4: FIB6_LOS (input)
631 * GPIO5: FIB5_PRES# (input)
632 * GPIO6: FIB5_LOS (input)
633 */
634 write_switch_scratch(pdev, MV_GPIO_DATA, 0x06); /* GPIO[2:1] out hi */
635 write_switch_scratch(pdev, MV_GPIO_DIR, 0x78); /* GPIO[6:3] inp */
636
637 pdev->irq = PHY_POLL;
638
639 priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
640 if (!priv)
641 return -ENOMEM;
642 memset(priv, 0, sizeof(*priv));
643 priv->phydev = pdev;
644 priv->client = gw16083_client;
645 priv->port5.port = 5;
646 priv->port6.port = 6;
647 dev_set_drvdata(&pdev->dev, priv);
648
649 ret |= device_create_file(&pdev->dev, &dev_attr_ethernet1);
650 ret |= device_create_file(&pdev->dev, &dev_attr_ethernet2);
651 ret |= device_create_file(&pdev->dev, &dev_attr_ethernet3);
652 ret |= device_create_file(&pdev->dev, &dev_attr_ethernet4);
653 ret |= device_create_file(&pdev->dev, &dev_attr_ethernet5);
654 ret |= device_create_file(&pdev->dev, &dev_attr_ethernet6);
655 ret |= device_create_file(&pdev->dev, &dev_attr_ethernet5_sfp);
656 ret |= device_create_file(&pdev->dev, &dev_attr_ethernet6_sfp);
657 ret |= device_create_file(&pdev->dev, &dev_attr_ethernet5_mode);
658 ret |= device_create_file(&pdev->dev, &dev_attr_ethernet6_mode);
659
660 if (unlikely(ret))
661 dev_err(&pdev->dev, "Failed creating attrs\n");
662
663 /* Add a nice symlink to the real device */
664 ret = sysfs_create_link(kernel_kobj, &pdev->dev.kobj, "gw16083");
665
666 dev_dbg(&pdev->dev, "initial state: GPIO=0x%02x "
667 "Port5_serdes=%d Port6_serdes=%d\n",
668 read_switch_scratch(pdev, MV_GPIO_DATA),
669 (read_switch_port_phy(pdev, 5, MII_M1111_PHY_EXT_SR)
670 & (1<<13) ? 1:0),
671 (read_switch_port_phy(pdev, 6, MII_M1111_PHY_EXT_SR)
672 & (1<<13) ? 1:0));
673
674 return ret;
675 }
676
677 static struct phy_driver mv88e6176_phy_driver = {
678 .name = "MV88E6176",
679 .phy_id = MV_IDENT_VALUE,
680 .phy_id_mask = MV_IDENT_MASK,
681 .features = PHY_BASIC_FEATURES,
682 .probe = &mv88e6176_probe,
683 .remove = &mv88e6176_remove,
684 .config_init = &mv88e6176_config_init,
685 .config_aneg = &mv88e6176_config_aneg,
686 .read_status = &mv88e6176_read_status,
687 .driver = { .owner = THIS_MODULE },
688 };
689
690 /*
691 * I2C driver
692 */
693
694 /* See SFF-8472 */
695 struct sfp_msa {
696 /* Basic ID fields */
697 u8 identifier;
698 u8 ext_identifier;
699 u8 connector;
700 u8 transceiver[8];
701 u8 encoding;
702 u8 br_nominal;
703 u8 rate_identifier;
704 u8 length_smf_km;
705 u8 length_smf;
706 u8 length_om2;
707 u8 length_om1;
708 u8 length_om4;
709 u8 length_om3;
710 u8 vendor_name[16];
711 u8 transceiver2;
712 u8 vendor_oui[3];
713 u8 vendor_pn[16];
714 u8 vendor_rev[4];
715 u8 wavelength[2];
716 u8 resv1;
717 u8 cc_base;
718
719 /* extended id fields */
720 u8 options[2];
721 u8 br_max;
722 u8 br_min;
723 u8 vendor_sn[16];
724 u8 date_code[8];
725 u8 diags_type;
726 u8 enhanced_options;
727 u8 sff8472_compliance;
728 u8 cc_ext;
729
730 /* Vendor specific ID fields */
731 u8 vendor_data[32];
732 u8 sff8079[128];
733 };
734
735 enum identifier {
736 UNKNOWN,
737 GBIC,
738 SFF,
739 SFP,
740 XBI,
741 XENPACK,
742 XFP,
743 XFF,
744 XFP_E,
745 XPAK,
746 X2,
747 DWDM_SFP,
748 QSFP,
749 MAX_ID,
750 };
751
752 const char* id_names[] = {
753 "UNKONWN",
754 "GBIC",
755 "SFF",
756 "SFP",
757 NULL,
758 };
759
760 /* Flags for SFP modules compatible with ETH up to 1Gb */
761 struct sfp_flags {
762 u8 e1000_base_sx:1;
763 u8 e1000_base_lx:1;
764 u8 e1000_base_cx:1;
765 u8 e1000_base_t:1;
766 u8 e100_base_lx:1;
767 u8 e100_base_fx:1;
768 u8 e10_base_bx10:1;
769 u8 e10_base_px:1;
770 };
771
772 #define STRING_APPEND(str, src) \
773 strncat(str, src, sizeof(src)); \
774 for (i = 1; i < sizeof(str); i++) \
775 if (str[i-1] == ' ' && str[i] == ' ') \
776 str[i] = 0;
777
778 static int gw16083_read_port_sfp(struct i2c_client *client,
779 struct mv88e1111_port_state *state)
780 {
781 int ret = 0;
782 u8 data[256];
783 struct sfp_flags *eth_flags;
784 u8 crc;
785 int i;
786 u8 *str;
787 struct sfp_msa *sfp_msa = (struct sfp_msa *)data;
788 int port = state->port;
789 union i2c_smbus_data d;
790
791 dev_dbg(&client->dev, "%s Port%d\n", __func__, port);
792 if (!i2c_check_functionality(client->adapter,
793 I2C_FUNC_SMBUS_READ_I2C_BLOCK))
794 return -ENODEV;
795 d.byte = (port == 5) ? 1 : 2;
796 if (i2c_smbus_xfer(client->adapter, GW16083_I2C_ADDR_PCA9543,
797 client->flags, I2C_SMBUS_WRITE, 0,
798 I2C_SMBUS_BYTE_DATA, &d) < 0)
799 {
800 dev_err(&client->dev,
801 "Port%d: failed writing PCA9543 register\n", port);
802 return ret;
803 }
804
805 /* read all 256 bytes of SFP EEPROM */
806 for (i = 0; i < sizeof(data); i += I2C_SMBUS_BLOCK_MAX) {
807 d.block[0] = I2C_SMBUS_BLOCK_MAX;
808 if (i2c_smbus_xfer(client->adapter, GW16083_I2C_ADDR_SFP1,
809 client->flags, I2C_SMBUS_READ, i,
810 I2C_SMBUS_I2C_BLOCK_DATA, &d) < 0)
811 {
812 dev_err(&client->dev,
813 "Port%d: failed reading SFP data\n", port);
814 return ret;
815 }
816 memcpy(data + i, d.block + 1, I2C_SMBUS_BLOCK_MAX);
817 }
818
819 /* Validate checksums */
820 for (crc = 0, i = 0; i < 63; i++)
821 crc += data[i];
822 if (crc != sfp_msa->cc_base) {
823 dev_err(&client->dev, "Port%d: "
824 "Checksum failure for Base ID fields: 0x%02x\n", port,
825 crc);
826 #ifdef FAIL_ON_CHECKSUM_ERR
827 return -EINVAL;
828 #endif
829 }
830 for (crc = 0, i = 64; i < 95; i++)
831 crc += data[i];
832 if (crc != sfp_msa->cc_ext) {
833 dev_err(&client->dev, "Port%d: "
834 "Checksum failure for Extended ID fields: 0x%02x\n",
835 port, crc);
836 #ifdef FAIL_ON_CHECKSUM_ERR
837 return -EINVAL;
838 #endif
839 }
840 state->sfp_id[0] = 0;
841 for (i = 0; id_names[i]; i++) {
842 if (sfp_msa->identifier == i) {
843 sprintf(state->sfp_id, "%s: ", id_names[i]);
844 break;
845 }
846 }
847 STRING_APPEND(state->sfp_id, sfp_msa->vendor_oui);
848 STRING_APPEND(state->sfp_id, sfp_msa->vendor_name);
849 STRING_APPEND(state->sfp_id, sfp_msa->vendor_pn);
850 STRING_APPEND(state->sfp_id, sfp_msa->vendor_rev);
851 STRING_APPEND(state->sfp_id, sfp_msa->vendor_sn);
852 dev_info(&client->dev, "Port%d: %s\n", port, state->sfp_id);
853
854 if ((sfp_msa->identifier != GBIC) &&
855 (sfp_msa->identifier != SFF) &&
856 (sfp_msa->identifier != SFP))
857 {
858 dev_err(&client->dev, "Port%d: Unknown module identifier: %d\n",
859 port, sfp_msa->identifier);
860 return -EINVAL;
861 }
862
863 str = "";
864 eth_flags = (struct sfp_flags *)(sfp_msa->transceiver + 3);
865 if (eth_flags->e1000_base_sx) {
866 str = "1000Base-SX (Fiber)";
867 } else if (eth_flags->e1000_base_lx) {
868 str = "1000Base-LX (Fiber)";
869 } else if (eth_flags->e1000_base_t) {
870 str = "1000Base-T (Copper)";
871 } else if (eth_flags->e100_base_fx) {
872 str = "100Base-FX (Fiber) - not supported";
873 ret = -EINVAL;
874 } else {
875 str = "Unknown/Unsupported media type";
876 ret = -EINVAL;
877 }
878 if (ret)
879 dev_err(&client->dev, "Port%d: %s (0x%02x)\n", port, str,
880 sfp_msa->transceiver[3]);
881 else
882 dev_info(&client->dev, "Port%d: %s (0x%02x)\n", port, str,
883 sfp_msa->transceiver[3]);
884
885 return ret;
886 }
887
888 static int gw16083_probe(struct i2c_client *client,
889 const struct i2c_device_id *id)
890 {
891 int ret;
892
893 dev_info(&client->dev, "GW16083 Ethernet Expansion Mezzanine\n");
894 if (gw16083_client) {
895 dev_err(&client->dev, "client already registered\n");
896 return -EINVAL;
897 }
898 gw16083_client = client;
899
900 ret = phy_driver_register(&mv88e6176_phy_driver);
901 if (ret)
902 dev_err(&client->dev,
903 "failed to register mv88e6176 phy driver: %d\n", ret);
904 return ret;
905 }
906
907 static int gw16083_remove(struct i2c_client *client)
908 {
909 dev_dbg(&client->dev, "%s\n", __func__);
910
911 phy_driver_unregister(&mv88e6176_phy_driver);
912 gw16083_client = NULL;
913 return 0;
914 }
915
916 static const struct of_device_id gw16083_dt_ids[] = {
917 { .compatible = "gateworks,gw16083", },
918 { }
919 };
920
921 MODULE_DEVICE_TABLE(of, gw16083_dt_ids);
922
923 static const struct i2c_device_id gw16083_id[] = {
924 { "gw16083", 0 },
925 { }
926 };
927 MODULE_DEVICE_TABLE(i2c, gw16083_id);
928
929 static struct i2c_driver gw16083_driver = {
930 .driver = {
931 .name = "gw16083",
932 .of_match_table = gw16083_dt_ids,
933 },
934 .probe = gw16083_probe,
935 .remove = gw16083_remove,
936 .id_table = gw16083_id,
937 };
938
939 static int __init mv88e6176_init(void)
940 {
941 return i2c_add_driver(&gw16083_driver);
942 }
943
944 static void __exit mv88e6176_exit(void)
945 {
946 i2c_del_driver(&gw16083_driver);
947 }
948
949 module_init(mv88e6176_init);
950 module_exit(mv88e6176_exit);
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