target/linux/imx6/files-4.9/arch/arm/boot/dts/imx6qdl-gw5904.dtsi

   1 /*
   2  * Copyright 2017 Gateworks Corporation
   3  *
   4  * The code contained herein is licensed under the GNU General Public
   5  * License. You may obtain a copy of the GNU General Public License
   6  * Version 2 or later at the following locations:
   7  *
   8  * http://www.opensource.org/licenses/gpl-license.html
   9  * http://www.gnu.org/copyleft/gpl.html
  10  */
  11
  12 #include <dt-bindings/gpio/gpio.h>
  13
  14 / {
  15         /* these are used by bootloader for disabling nodes */
  16         aliases {
  17                 led0 = &led0;
  18                 led1 = &led1;
  19                 led2 = &led2;
  20                 usb0 = &usbh1;
  21                 usb1 = &usbotg;
  22         };
  23
  24         chosen {
  25                 bootargs = "console=ttymxc1,115200";
  26         };
  27
  28         backlight {
  29                 compatible = "pwm-backlight";
  30                 pwms = <&pwm4 0 5000000>;
  31                 brightness-levels = <0 4 8 16 32 64 128 255>;
  32                 default-brightness-level = <7>;
  33         };
  34
  35         leds {
  36                 compatible = "gpio-leds";
  37                 pinctrl-names = "default";
  38                 pinctrl-0 = <&pinctrl_gpio_leds>;
  39
  40                 led0: user1 {
  41                         label = "user1";
  42                         gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
  43                         default-state = "on";
  44                         linux,default-trigger = "heartbeat";
  45                 };
  46
  47                 led1: user2 {
  48                         label = "user2";
  49                         gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
  50                         default-state = "off";
  51                 };
  52
  53                 led2: user3 {
  54                         label = "user3";
  55                         gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */
  56                         default-state = "off";
  57                 };
  58         };
  59
  60         gpio_keys {
  61                 compatible = "gpio-keys";
  62                 #address-cells = <1>;
  63                 #size-cells = <0>;
  64
  65                 user_pb {
  66                         label = "user_pb";
  67
  68                         gpios = <&gsc_gpio 0 GPIO_ACTIVE_LOW>;
  69                         linux,code = <256>;
  70                 };
  71         };
  72
  73         memory {
  74                 reg = <0x10000000 0x40000000>;
  75         };
  76
  77         pps {
  78                 compatible = "pps-gpio";
  79                 pinctrl-names = "default";
  80                 pinctrl-0 = <&pinctrl_pps>;
  81                 gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
  82                 status = "okay";
  83         };
  84
  85         reg_1p0v: regulator-1p0v {
  86                 compatible = "regulator-fixed";
  87                 regulator-name = "1P0V";
  88                 regulator-min-microvolt = <1000000>;
  89                 regulator-max-microvolt = <1000000>;
  90                 regulator-always-on;
  91         };
  92
  93         reg_3p3v: regulator-3p3v {
  94                 compatible = "regulator-fixed";
  95                 regulator-name = "3P3V";
  96                 regulator-min-microvolt = <3300000>;
  97                 regulator-max-microvolt = <3300000>;
  98                 regulator-always-on;
  99         };
 100
 101         reg_usb_h1_vbus: regulator-usb-h1-vbus {
 102                 compatible = "regulator-fixed";
 103                 regulator-name = "usb_h1_vbus";
 104                 regulator-min-microvolt = <5000000>;
 105                 regulator-max-microvolt = <5000000>;
 106                 regulator-always-on;
 107         };
 108
 109         reg_usb_otg_vbus: regulator-usb-otg-vbus {
 110                 compatible = "regulator-fixed";
 111                 regulator-name = "usb_otg_vbus";
 112                 regulator-min-microvolt = <5000000>;
 113                 regulator-max-microvolt = <5000000>;
 114                 gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
 115                 enable-active-high;
 116         };
 117
 118         dsa {
 119                 compatible = "marvell,dsa";
 120                 #address-cells = <2>;
 121                 #size-cells = <0>;
 122
 123                 dsa,ethernet = <&fec>;
 124                 dsa,mii-bus = <&mdio>;
 125
 126                 switch@0 {
 127                         #address-cells = <1>;
 128                         #size-cells = <0>;
 129                         reg = <0 0>; /* MDIO address 0, switch 0 in tree */
 130
 131                         port@0 {
 132                                 reg = <0>;
 133                                 label = "lan4";
 134                         };
 135
 136                         port@1 {
 137                                 reg = <1>;
 138                                 label = "lan3";
 139                         };
 140
 141                         port@2 {
 142                                 reg = <2>;
 143                                 label = "lan2";
 144                         };
 145
 146                         port@3 {
 147                                 reg = <3>;
 148                                 label = "lan1";
 149                         };
 150
 151                         port@5 {
 152                                 reg = <5>;
 153                                 label = "cpu";
 154                                 fixed-link {
 155                                         speed = <1000>;
 156                                         full-duplex;
 157                                 };
 158                         };
 159                 };
 160         };
 161 };
 162
 163 &clks {
 164         assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
 165                           <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
 166         assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
 167                                  <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
 168 };
 169
 170 &fec {
 171         pinctrl-names = "default";
 172         pinctrl-0 = <&pinctrl_enet>;
 173         phy-mode = "rgmii-id";
 174         status = "okay";
 175
 176         mdio: mdio {
 177                 #address-cells = <1>;
 178                 #size-cells = <0>;
 179         };
 180 };
 181
 182 &i2c1 {
 183         clock-frequency = <100000>;
 184         pinctrl-names = "default";
 185         pinctrl-0 = <&pinctrl_i2c1>;
 186         status = "okay";
 187
 188         eeprom1: eeprom@50 {
 189                 compatible = "atmel,24c02";
 190                 reg = <0x50>;
 191                 pagesize = <16>;
 192         };
 193
 194         eeprom2: eeprom@51 {
 195                 compatible = "atmel,24c02";
 196                 reg = <0x51>;
 197                 pagesize = <16>;
 198         };
 199
 200         eeprom3: eeprom@52 {
 201                 compatible = "atmel,24c02";
 202                 reg = <0x52>;
 203                 pagesize = <16>;
 204         };
 205
 206         eeprom4: eeprom@53 {
 207                 compatible = "atmel,24c02";
 208                 reg = <0x53>;
 209                 pagesize = <16>;
 210         };
 211
 212         gsc: gsc@20 {
 213                 compatible = "gw,gsc";
 214                 reg = <0x20>;
 215                 interrupt-parent = <&gpio1>;
 216                 interrupts = <4 1>;
 217                 interrupt-controller;
 218                 #interrupt-cells = <1>;
 219
 220                 /* GSC watchdog */
 221                 watchdog {
 222                         compatible = "gw,gsc_wdt";
 223                         status = "okay";
 224                 };
 225
 226                 /* Linux input events from GSC interrupt events */
 227                 input {
 228                         compatible = "gw,gsc_input";
 229                         interrupt-parent = <&gsc>;
 230                         interrupts = <0 1 2 5 7>;
 231                         interrupt-names = "button", "key-erased", "eeprom-wp", "tamper", "button-held";
 232                         status = "okay";
 233                 };
 234         };
 235
 236         gsc_gpio: pca9555@23 {
 237                 compatible = "nxp,pca9555";
 238                 reg = <0x23>;
 239                 gpio-controller;
 240                 #gpio-cells = <2>;
 241                 interrupt-parent = <&gsc>;
 242                 interrupts = <4>;
 243         };
 244
 245         gsc_hwmon: hwmon@29 {
 246                 compatible = "gw,gsc_hwmon";
 247                 reg = <0x29>;
 248         };
 249
 250         gsc_rtc: ds1672@68 {
 251                 compatible = "dallas,ds1672";
 252                 reg = <0x68>;
 253         };
 254 };
 255
 256 &i2c2 {
 257         clock-frequency = <100000>;
 258         pinctrl-names = "default";
 259         pinctrl-0 = <&pinctrl_i2c2>;
 260         status = "okay";
 261
 262         /* LSM9DS1 magnetic sensor */
 263         lsm9ds1-m@0x1c {
 264                 compatible = "st,lsm9ds1-mag";
 265                 reg = <0x1C>;
 266                 pinctrl-names = "default";
 267                 pinctrl-0 = <&pinctrl_imu_mag>;
 268                 gpios = <&gpio5 17 GPIO_ACTIVE_LOW>; /* IRQ */
 269                 rot-matrix = /bits/ 16 <(1) (0) (0)
 270                         (0) (1) (0)
 271                         (0) (0) (1)>;
 272                 poll-interval = <100>;
 273                 min-interval = <13>;
 274                 fs-range = <0>;
 275         };
 276
 277         /* LSM9DS1 accelerometer/gyroscope sensor */
 278         lsm9ds1-ag@0x6a {
 279                 compatible = "st,lsm9ds1-acc-gyr";
 280                 reg = <0x6A>;
 281                 pinctrl-names = "default";
 282                 pinctrl-0 = <&pinctrl_imu_acc>;
 283                 gpios = <&gpio4 18 GPIO_ACTIVE_LOW>, /* INT1 */
 284                         <&gpio4 19 GPIO_ACTIVE_LOW>; /* INT2 */
 285                 rot-matrix = /bits/ 16 <(1) (0) (0)
 286                         (0) (1) (0)
 287                         (0) (0) (1)>;
 288                 g-poll-interval = <100>;
 289                 g-min-interval = <2>;
 290                 g-fs-range = <0>;
 291                 x-poll-interval = <100>;
 292                 x-min-interval = <1>;
 293                 x-fs-range = <0>;
 294                 aa-filter-bw = <0>;
 295         };
 296 };
 297
 298 &i2c3 {
 299         clock-frequency = <100000>;
 300         pinctrl-names = "default";
 301         pinctrl-0 = <&pinctrl_i2c3>;
 302         status = "okay";
 303
 304         touchscreen: egalax_ts@04 {
 305                 compatible = "eeti,egalax_ts";
 306                 reg = <0x04>;
 307                 interrupt-parent = <&gpio1>;
 308                 interrupts = <11 IRQ_TYPE_EDGE_FALLING>;
 309                 wakeup-gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
 310         };
 311 };
 312
 313 &ldb {
 314         status = "okay";
 315
 316         lvds-channel@0 {
 317                 fsl,data-mapping = "spwg";
 318                 fsl,data-width = <18>;
 319                 status = "okay";
 320
 321                 display-timings {
 322                         native-mode = <&timing0>;
 323                         timing0: hsd100pxn1 {
 324                                 clock-frequency = <65000000>;
 325                                 hactive = <1024>;
 326                                 vactive = <768>;
 327                                 hback-porch = <220>;
 328                                 hfront-porch = <40>;
 329                                 vback-porch = <21>;
 330                                 vfront-porch = <7>;
 331                                 hsync-len = <60>;
 332                                 vsync-len = <10>;
 333                         };
 334                 };
 335         };
 336 };
 337
 338 &pcie {
 339         pinctrl-names = "default";
 340         pinctrl-0 = <&pinctrl_pcie>;
 341         reset-gpio = <&gpio1 0 GPIO_ACTIVE_LOW>;
 342         status = "okay";
 343 };
 344
 345 &pwm2 {
 346         pinctrl-names = "default";
 347         pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
 348         status = "disabled";
 349 };
 350
 351 &pwm3 {
 352         pinctrl-names = "default";
 353         pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
 354         status = "disabled";
 355 };
 356
 357 &pwm4 {
 358         pinctrl-names = "default";
 359         pinctrl-0 = <&pinctrl_pwm4>;
 360         status = "okay";
 361 };
 362
 363 &uart1 {
 364         pinctrl-names = "default";
 365         pinctrl-0 = <&pinctrl_uart1>;
 366         status = "okay";
 367 };
 368
 369 &uart2 {
 370         pinctrl-names = "default";
 371         pinctrl-0 = <&pinctrl_uart2>;
 372         status = "okay";
 373 };
 374
 375 &uart3 {
 376         pinctrl-names = "default";
 377         pinctrl-0 = <&pinctrl_uart3>;
 378         fsl,uart-has-rtscts;
 379         status = "okay";
 380 };
 381
 382 &uart4 {
 383         pinctrl-names = "default";
 384         pinctrl-0 = <&pinctrl_uart4>;
 385         fsl,uart-has-rtscts;
 386         status = "okay";
 387 };
 388
 389 &uart5 {
 390         pinctrl-names = "default";
 391         pinctrl-0 = <&pinctrl_uart5>;
 392         status = "okay";
 393 };
 394
 395 &usbotg {
 396         vbus-supply = <&reg_usb_otg_vbus>;
 397         pinctrl-names = "default";
 398         pinctrl-0 = <&pinctrl_usbotg>;
 399         disable-over-current;
 400         status = "okay";
 401 };
 402
 403 &usbh1 {
 404         vbus-supply = <&reg_usb_h1_vbus>;
 405         status = "okay";
 406 };
 407
 408 &usdhc3 {
 409         pinctrl-names = "default", "state_100mhz", "state_200mhz";
 410         pinctrl-0 = <&pinctrl_usdhc3>;
 411         pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
 412         pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
 413         non-removable;
 414         vmmc-supply = <&reg_3p3v>;
 415         keep-power-in-suspend;
 416         status = "okay";
 417 };
 418
 419 &wdog1 {
 420         pinctrl-names = "default";
 421         pinctrl-0 = <&pinctrl_wdog>;
 422         fsl,ext-reset-output;
 423 };
 424
 425 &iomuxc {
 426         imx6qdl-gw5904 {
 427                 pinctrl_enet: enetgrp {
 428                         fsl,pins = <
 429                                 MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b0b0
 430                                 MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b0b0
 431                                 MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b0b0
 432                                 MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b0b0
 433                                 MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b0b0
 434                                 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b0b0
 435                                 MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b0b0
 436                                 MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b0b0
 437                                 MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b0b0
 438                                 MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b0b0
 439                                 MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b0b0
 440                                 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b0b0
 441                                 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x1b0b0
 442                                 MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x1b0b0
 443                                 MX6QDL_PAD_ENET_MDC__ENET_MDC           0x1b0b0
 444                                 MX6QDL_PAD_GPIO_16__ENET_REF_CLK        0x4001b0a8
 445                                 MX6QDL_PAD_ENET_TXD0__GPIO1_IO30        0x4001b0b0 /* PHY_RST# */
 446                         >;
 447                 };
 448
 449                 pinctrl_gpio_leds: gpioledsgrp {
 450                         fsl,pins = <
 451                                 MX6QDL_PAD_KEY_COL0__GPIO4_IO06         0x1b0b0
 452                                 MX6QDL_PAD_KEY_ROW0__GPIO4_IO07         0x1b0b0
 453                                 MX6QDL_PAD_KEY_ROW4__GPIO4_IO15         0x1b0b0
 454                         >;
 455                 };
 456
 457                 pinctrl_i2c1: i2c1grp {
 458                         fsl,pins = <
 459                                 MX6QDL_PAD_EIM_D21__I2C1_SCL            0x4001b8b1
 460                                 MX6QDL_PAD_EIM_D28__I2C1_SDA            0x4001b8b1
 461                         >;
 462                 };
 463
 464                 pinctrl_i2c2: i2c2grp {
 465                         fsl,pins = <
 466                                 MX6QDL_PAD_KEY_COL3__I2C2_SCL           0x4001b8b1
 467                                 MX6QDL_PAD_KEY_ROW3__I2C2_SDA           0x4001b8b1
 468                         >;
 469                 };
 470
 471                 pinctrl_i2c3: i2c3grp {
 472                         fsl,pins = <
 473                                 MX6QDL_PAD_GPIO_3__I2C3_SCL             0x4001b8b1
 474                                 MX6QDL_PAD_GPIO_6__I2C3_SDA             0x4001b8b1
 475                         >;
 476                 };
 477
 478                 pinctrl_imu_acc: gpioimxaccgrp {
 479                         fsl,pins = <
 480                                 MX6QDL_PAD_DI0_PIN2__GPIO4_IO18 0x1b0b0 /* INT1 */
 481                                 MX6QDL_PAD_DI0_PIN3__GPIO4_IO19 0x1b0b0 /* INT2 */
 482                         >;
 483                 };
 484
 485                 pinctrl_imu_mag: gpioimxmaggrp {
 486                         fsl,pins = <
 487                                 MX6QDL_PAD_DISP0_DAT23__GPIO5_IO17 0x1b0b0 /* IRQ */
 488                                 MX6QDL_PAD_DI0_PIN4__GPIO4_IO20    0x1b0b0 /* data ready */
 489                         >;
 490                 };
 491
 492                 pinctrl_pcie: pciegrp {
 493                         fsl,pins = <
 494                                 MX6QDL_PAD_GPIO_0__GPIO1_IO00   0x1b0b0 /* PCIE RST */
 495                         >;
 496                 };
 497
 498                 pinctrl_pmic: pmicgrp {
 499                         fsl,pins = <
 500                                 MX6QDL_PAD_GPIO_8__GPIO1_IO08   0x1b0b0 /* PMIC_IRQ# */
 501                         >;
 502                 };
 503
 504                 pinctrl_pps: ppsgrp {
 505                         fsl,pins = <
 506                                 MX6QDL_PAD_ENET_RXD1__GPIO1_IO26        0x1b0b1
 507                         >;
 508                 };
 509
 510                 pinctrl_pwm2: pwm2grp {
 511                         fsl,pins = <
 512                                 MX6QDL_PAD_SD1_DAT2__PWM2_OUT           0x1b0b1
 513                         >;
 514                 };
 515
 516                 pinctrl_pwm3: pwm3grp {
 517                         fsl,pins = <
 518                                 MX6QDL_PAD_SD1_DAT1__PWM3_OUT           0x1b0b1
 519                         >;
 520                 };
 521
 522                 pinctrl_pwm4: pwm4grp {
 523                         fsl,pins = <
 524                                 MX6QDL_PAD_SD1_CMD__PWM4_OUT            0x1b0b1
 525                         >;
 526                 };
 527
 528                 pinctrl_uart1: uart1grp {
 529                         fsl,pins = <
 530                                 MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA    0x1b0b1
 531                                 MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA    0x1b0b1
 532                         >;
 533                 };
 534
 535                 pinctrl_uart2: uart2grp {
 536                         fsl,pins = <
 537                                 MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA      0x1b0b1
 538                                 MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA      0x1b0b1
 539                         >;
 540                 };
 541
 542                 pinctrl_uart3: uart3grp {
 543                         fsl,pins = <
 544                                 MX6QDL_PAD_EIM_D23__UART3_CTS_B         0x1b0b1
 545                                 MX6QDL_PAD_EIM_D24__UART3_TX_DATA       0x1b0b1
 546                                 MX6QDL_PAD_EIM_D25__UART3_RX_DATA       0x1b0b1
 547                                 MX6QDL_PAD_EIM_D31__UART3_RTS_B         0x1b0b1
 548                         >;
 549                 };
 550
 551                 pinctrl_uart4: uart4grp {
 552                         fsl,pins = <
 553                                 MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA    0x1b0b1
 554                                 MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA    0x1b0b1
 555                                 MX6QDL_PAD_CSI0_DAT16__UART4_RTS_B      0x1b0b1
 556                                 MX6QDL_PAD_CSI0_DAT17__UART4_CTS_B      0x1b0b1
 557                         >;
 558                 };
 559
 560                 pinctrl_uart5: uart5grp {
 561                         fsl,pins = <
 562                                 MX6QDL_PAD_KEY_COL1__UART5_TX_DATA      0x1b0b1
 563                                 MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA      0x1b0b1
 564                         >;
 565                 };
 566
 567                 pinctrl_usbotg: usbotggrp {
 568                         fsl,pins = <
 569                                 MX6QDL_PAD_GPIO_1__USB_OTG_ID           0x17059
 570                                 MX6QDL_PAD_EIM_D22__GPIO3_IO22          0x1b0b0 /* PWR_EN */
 571                                 MX6QDL_PAD_KEY_COL4__GPIO4_IO14         0x1b0b0 /* OC */
 572                         >;
 573                 };
 574
 575                 pinctrl_usdhc3: usdhc3grp {
 576                         fsl,pins = <
 577                                 MX6QDL_PAD_SD3_CMD__SD3_CMD             0x17059
 578                                 MX6QDL_PAD_SD3_CLK__SD3_CLK             0x10059
 579                                 MX6QDL_PAD_SD3_RST__SD3_RESET           0x10059
 580                                 MX6QDL_PAD_SD3_DAT0__SD3_DATA0          0x17059
 581                                 MX6QDL_PAD_SD3_DAT1__SD3_DATA1          0x17059
 582                                 MX6QDL_PAD_SD3_DAT2__SD3_DATA2          0x17059
 583                                 MX6QDL_PAD_SD3_DAT3__SD3_DATA3          0x17059
 584                                 MX6QDL_PAD_SD3_DAT4__SD3_DATA4          0x17059
 585                                 MX6QDL_PAD_SD3_DAT5__SD3_DATA5          0x17059
 586                                 MX6QDL_PAD_SD3_DAT6__SD3_DATA6          0x17059
 587                                 MX6QDL_PAD_SD3_DAT7__SD3_DATA7          0x17059
 588                         >;
 589                 };
 590
 591                 pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
 592                         fsl,pins = <
 593                                 MX6QDL_PAD_SD3_CMD__SD3_CMD             0x170b9
 594                                 MX6QDL_PAD_SD3_CLK__SD3_CLK             0x100b9
 595                                 MX6QDL_PAD_SD3_RST__SD3_RESET           0x100b9
 596                                 MX6QDL_PAD_SD3_DAT0__SD3_DATA0          0x170b9
 597                                 MX6QDL_PAD_SD3_DAT1__SD3_DATA1          0x170b9
 598                                 MX6QDL_PAD_SD3_DAT2__SD3_DATA2          0x170b9
 599                                 MX6QDL_PAD_SD3_DAT3__SD3_DATA3          0x170b9
 600                                 MX6QDL_PAD_SD3_DAT4__SD3_DATA4          0x170b9
 601                                 MX6QDL_PAD_SD3_DAT5__SD3_DATA5          0x170b9
 602                                 MX6QDL_PAD_SD3_DAT6__SD3_DATA6          0x170b9
 603                                 MX6QDL_PAD_SD3_DAT7__SD3_DATA7          0x170b9
 604                         >;
 605                 };
 606
 607                 pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
 608                         fsl,pins = <
 609                                 MX6QDL_PAD_SD3_CMD__SD3_CMD             0x170f9
 610                                 MX6QDL_PAD_SD3_CLK__SD3_CLK             0x100f9
 611                                 MX6QDL_PAD_SD3_RST__SD3_RESET           0x100f9
 612                                 MX6QDL_PAD_SD3_DAT0__SD3_DATA0          0x170f9
 613                                 MX6QDL_PAD_SD3_DAT1__SD3_DATA1          0x170f9
 614                                 MX6QDL_PAD_SD3_DAT2__SD3_DATA2          0x170f9
 615                                 MX6QDL_PAD_SD3_DAT3__SD3_DATA3          0x170f9
 616                                 MX6QDL_PAD_SD3_DAT4__SD3_DATA4          0x170f9
 617                                 MX6QDL_PAD_SD3_DAT5__SD3_DATA5          0x170f9
 618                                 MX6QDL_PAD_SD3_DAT6__SD3_DATA6          0x170f9
 619                                 MX6QDL_PAD_SD3_DAT7__SD3_DATA7          0x170f9
 620                         >;
 621                 };
 622
 623                 pinctrl_wdog: wdoggrp {
 624                         fsl,pins = <
 625                                 MX6QDL_PAD_DISP0_DAT8__WDOG1_B          0x1b0b0
 626                         >;
 627                 };
 628         };
 629 };