ipq40xx: Use detailed reserved memory for A42
[openwrt/openwrt.git] / target / linux / ipq40xx / files-4.14 / arch / arm / boot / dts / qcom-ipq4029-mr33.dts
1 /*
2 * Device Tree Source for Meraki MR33 (Stinkbug)
3 *
4 * Copyright (C) 2017 Chris Blake <chrisrblake93@gmail.com>
5 * Copyright (C) 2017 Christian Lamparter <chunkeey@googlemail.com>
6 *
7 * Based on Cisco Meraki DTS from GPL release r25-linux-3.14-20170427
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without
11 * any warranty of any kind, whether express or implied.
12 */
13
14 #include "qcom-ipq4019.dtsi"
15 #include "qcom-ipq4019-bus.dtsi"
16 #include <dt-bindings/gpio/gpio.h>
17 #include <dt-bindings/input/input.h>
18 #include <dt-bindings/soc/qcom,tcsr.h>
19
20 / {
21 model = "Meraki MR33 Access Point";
22 compatible = "meraki,mr33", "qcom,ipq4019";
23
24 aliases {
25 led-boot = &status_green;
26 led-failsafe = &status_red;
27 led-running = &status_green;
28 led-upgrade = &power_orange;
29 };
30
31 /* Do we really need this defined? */
32 memory {
33 device_type = "memory";
34 reg = <0x80000000 0x10000000>;
35 };
36
37 reserved-memory {
38 #address-cells = <0x1>;
39 #size-cells = <0x1>;
40 ranges;
41
42 tz_apps@87b80000 {
43 reg = <0x87b80000 0x280000>;
44 reusable;
45 };
46
47 smem@87e00000 {
48 reg = <0x87e00000 0x080000>;
49 no-map;
50 };
51
52 tz@87e80000 {
53 reg = <0x87e80000 0x180000>;
54 no-map;
55 };
56 };
57
58 soc {
59 mdio@90000 {
60 status = "okay";
61 pinctrl-0 = <&mdio_pins>;
62 pinctrl-names = "default";
63 /delete-node/ ethernet-phy@0;
64 /delete-node/ ethernet-phy@2;
65 /delete-node/ ethernet-phy@3;
66 /delete-node/ ethernet-phy@4;
67 };
68
69 /* It is a 56-bit counter that supplies the count to the ARM arch
70 timers and without upstream driver */
71 counter@4a1000 {
72 compatible = "qcom,qca-gcnt";
73 reg = <0x4a1000 0x4>;
74 };
75
76 ess_tcsr@1953000 {
77 compatible = "qcom,tcsr";
78 reg = <0x1953000 0x1000>;
79 qcom,ess-interface-select = <TCSR_ESS_PSGMII_RGMII5>;
80 };
81
82 tcsr@1949000 {
83 compatible = "qcom,tcsr";
84 reg = <0x1949000 0x100>;
85 qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
86 };
87
88 tcsr@1957000 {
89 compatible = "qcom,tcsr";
90 reg = <0x1957000 0x100>;
91 qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
92 };
93
94 serial@78af000 {
95 pinctrl-0 = <&serial_0_pins>;
96 pinctrl-names = "default";
97 status = "okay";
98 };
99
100 serial@78b0000 {
101 pinctrl-0 = <&serial_1_pins>;
102 pinctrl-names = "default";
103 status = "okay";
104
105 bluetooth {
106 compatible = "ti,cc2650";
107 enable-gpios = <&tlmm 12 GPIO_ACTIVE_LOW>;
108 };
109 };
110
111 crypto@8e3a000 {
112 status = "okay";
113 };
114
115 watchdog@b017000 {
116 status = "okay";
117 };
118
119 ess-switch@c000000 {
120 switch_mac_mode = <0x3>; /* mac mode for RGMII RMII */
121 switch_lan_bmp = <0x0>; /* lan port bitmap */
122 switch_wan_bmp = <0x10>; /* wan port bitmap */
123 };
124
125 edma@c080000 {
126 qcom,single-phy;
127 qcom,num_gmac = <1>;
128 phy-mode = "rgmii-rxid";
129 status = "okay";
130 };
131 };
132
133 gpio-keys {
134 compatible = "gpio-keys";
135
136 reset {
137 label = "reset";
138 gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
139 linux,code = <KEY_RESTART>;
140 };
141 };
142
143 gpio-leds {
144 compatible = "gpio-leds";
145
146 power_orange: power {
147 label = "mr33:orange:power";
148 gpios = <&tlmm 49 GPIO_ACTIVE_LOW>;
149 panic-indicator;
150 };
151 };
152 };
153
154 &blsp_dma {
155 status = "okay";
156 };
157
158 &cryptobam {
159 status = "okay";
160 };
161
162 &gmac0 {
163 qcom,phy_mdio_addr = <1>;
164 qcom,poll_required = <1>;
165 vlan_tag = <0 0x20>;
166 };
167
168 &i2c_0 {
169 pinctrl-0 = <&i2c_0_pins>;
170 pinctrl-names = "default";
171 status = "okay";
172 at24@50 {
173 compatible = "atmel,24c64";
174 pagesize = <32>;
175 reg = <0x50>;
176 read-only; /* This holds our MAC & Meraki board-data */
177 };
178 };
179
180 &i2c_1 {
181 pinctrl-0 = <&i2c_1_pins>;
182 pinctrl-names = "default";
183 status = "okay";
184
185 lp5562@30 {
186 enable-gpio = <&tlmm 48 GPIO_ACTIVE_HIGH>;
187 compatible = "ti,lp5562";
188 clock-mode = /bits/8 <2>;
189 reg = <0x30>;
190
191 /* RGB led */
192 status_red: chan0 {
193 chan-name = "mr33:red:status";
194 led-cur = /bits/ 8 <0x20>;
195 max-cur = /bits/ 8 <0x60>;
196 };
197
198 status_green: chan1 {
199 chan-name = "mr33:green:status";
200 led-cur = /bits/ 8 <0x20>;
201 max-cur = /bits/ 8 <0x60>;
202 };
203
204 chan2 {
205 chan-name = "mr33:blue:status";
206 led-cur = /bits/ 8 <0x20>;
207 max-cur = /bits/ 8 <0x60>;
208 };
209
210 chan3 {
211 chan-name = "mr33:white:status";
212 led-cur = /bits/ 8 <0x20>;
213 max-cur = /bits/ 8 <0x60>;
214 };
215 };
216 };
217
218 &nand {
219 pinctrl-0 = <&nand_pins>;
220 pinctrl-names = "default";
221 status = "okay";
222
223 nand@0 {
224 partitions {
225 compatible = "fixed-partitions";
226 #address-cells = <1>;
227 #size-cells = <1>;
228
229 partition@0 {
230 label = "sbl1";
231 reg = <0x000000000000 0x000000100000>;
232 read-only;
233 };
234 partition@1 {
235 label = "mibib";
236 reg = <0x000000100000 0x000000100000>;
237 read-only;
238 };
239 partition@2 {
240 label = "bootconfig";
241 reg = <0x000000200000 0x000000100000>;
242 read-only;
243 };
244 partition@3 {
245 label = "qsee";
246 reg = <0x000000300000 0x000000100000>;
247 read-only;
248 };
249 partition@4 {
250 label = "qsee_alt";
251 reg = <0x000000400000 0x000000100000>;
252 read-only;
253 };
254 partition@5 {
255 label = "cdt";
256 reg = <0x000000500000 0x000000080000>;
257 read-only;
258 };
259 partition@6 {
260 label = "cdt_alt";
261 reg = <0x000000580000 0x000000080000>;
262 read-only;
263 };
264 partition@7 {
265 label = "ddrparams";
266 reg = <0x000000600000 0x000000080000>;
267 read-only;
268 };
269 partition@8 {
270 label = "u-boot";
271 reg = <0x000000700000 0x000000200000>;
272 read-only;
273 };
274 partition@9 {
275 label = "u-boot-backup";
276 reg = <0x000000900000 0x000000200000>;
277 read-only;
278 };
279 partition@10 {
280 label = "ART";
281 reg = <0x000000b00000 0x000000080000>;
282 read-only;
283 };
284 partition@11 {
285 label = "ubi";
286 reg = <0x000000c00000 0x000007000000>;
287 };
288 };
289 };
290 };
291
292 &pcie0 {
293 status = "okay";
294 perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>;
295 wake-gpio = <&tlmm 50 GPIO_ACTIVE_LOW>;
296 };
297
298 &qpic_bam {
299 status = "okay";
300 };
301
302 &tlmm {
303 /*
304 * GPIO43 should be 0/1 whenever the unit is
305 * powered through PoE or AC-Adapter.
306 * That said, playing with this seems to
307 * reset the AP.
308 */
309
310 mdio_pins: mdio_pinmux {
311 mux_1 {
312 pins = "gpio6";
313 function = "mdio";
314 bias-pull-up;
315 };
316 mux_2 {
317 pins = "gpio7";
318 function = "mdc";
319 bias-pull-up;
320 };
321 };
322
323 serial_0_pins: serial_pinmux {
324 mux {
325 pins = "gpio16", "gpio17";
326 function = "blsp_uart0";
327 bias-disable;
328 };
329 };
330
331 serial_1_pins: serial1_pinmux {
332 mux {
333 /* We use the i2c-0 pins for serial_1 */
334 pins = "gpio8", "gpio9";
335 function = "blsp_uart1";
336 bias-disable;
337 };
338 };
339
340 i2c_0_pins: i2c_0_pinmux {
341 pinmux {
342 function = "blsp_i2c0";
343 pins = "gpio20", "gpio21";
344 };
345 pinconf {
346 pins = "gpio20", "gpio21";
347 drive-strength = <16>;
348 bias-disable;
349 };
350 };
351
352 i2c_1_pins: i2c_1_pinmux {
353 pinmux {
354 function = "blsp_i2c1";
355 pins = "gpio34", "gpio35";
356 };
357 pinconf {
358 pins = "gpio34", "gpio35";
359 drive-strength = <16>;
360 bias-disable;
361 };
362 };
363
364 nand_pins: nand_pins {
365 /*
366 * There are 18 pins. 15 pins are common between LCD and NAND.
367 * The QPIC controller arbitrates between LCD and NAND. Of the
368 * remaining 4, 2 are for NAND and 2 are for LCD exclusively.
369 *
370 * The meraki source hints that the bluetooth module claims
371 * pin 52 as well. But sadly, there's no data whenever this
372 * is a NAND or LCD exclusive pin or not.
373 */
374
375 pullups {
376 pins = "gpio52", "gpio53", "gpio58",
377 "gpio59";
378 function = "qpic";
379 bias-pull-up;
380 };
381
382 pulldowns {
383 pins = "gpio54", "gpio55", "gpio56",
384 "gpio57", "gpio60", "gpio61",
385 "gpio62", "gpio63", "gpio64",
386 "gpio65", "gpio66", "gpio67",
387 "gpio68", "gpio69";
388 function = "qpic";
389 bias-pull-down;
390 };
391 };
392 };
393
394 &wifi0 {
395 status = "okay";
396 /* qcom,ath10k-calibration-variant = "MERAKI-MR33"; */
397 };
398
399 &wifi1 {
400 status = "okay";
401 /* qcom,ath10k-calibration-variant = "MERAKI-MR33"; */
402 };