ipq40xx: Add patches for 4.19
[openwrt/openwrt.git] / target / linux / ipq40xx / patches-4.19 / 076-phy-qcom-ipq4019-usb-add-driver-for-QCOM-IPQ4019.patch
1 From 633f0e08498aebfdb932bd71319b4cb136709499 Mon Sep 17 00:00:00 2001
2 From: John Crispin <john@phrozen.org>
3 Date: Tue, 24 Jul 2018 14:45:49 +0200
4 Subject: [PATCH 2/3] phy: qcom-ipq4019-usb: add driver for QCOM/IPQ4019
5
6 Add a driver to setup the USB phy on Qualcom Dakota SoCs.
7 The driver sets up HS and SS phys. In case of HS some magic values need to
8 be written to magic offsets. These were taken from the SDK driver.
9
10 Signed-off-by: John Crispin <john@phrozen.org>
11 ---
12 drivers/phy/qualcomm/Kconfig | 7 ++
13 drivers/phy/qualcomm/Makefile | 1 +
14 drivers/phy/qualcomm/phy-qcom-ipq4019-usb.c | 188 ++++++++++++++++++++++++++++
15 3 files changed, 196 insertions(+)
16 create mode 100644 drivers/phy/qualcomm/phy-qcom-ipq4019-usb.c
17
18 --- a/drivers/phy/qualcomm/Kconfig
19 +++ b/drivers/phy/qualcomm/Kconfig
20 @@ -17,6 +17,13 @@ config PHY_QCOM_APQ8064_SATA
21 depends on OF
22 select GENERIC_PHY
23
24 +config PHY_QCOM_IPQ4019_USB
25 + tristate "Qualcomm IPQ4019 USB PHY module"
26 + depends on OF && ARCH_QCOM
27 + select GENERIC_PHY
28 + help
29 + Support for the USB PHY on QCOM IPQ4019/Dakota chipsets.
30 +
31 config PHY_QCOM_IPQ806X_SATA
32 tristate "Qualcomm IPQ806x SATA SerDes/PHY driver"
33 depends on ARCH_QCOM
34 --- /dev/null
35 +++ b/drivers/phy/qualcomm/phy-qcom-ipq4019-usb.c
36 @@ -0,0 +1,188 @@
37 +/*
38 + * Copyright (C) 2018 John Crispin <john@phrozen.org>
39 + *
40 + * Based on code from
41 + * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
42 + *
43 + * This program is free software; you can redistribute it and/or modify
44 + * it under the terms of the GNU General Public License as published by
45 + * the Free Software Foundation; either version 2 of the License, or
46 + * (at your option) any later version.
47 + *
48 + * This program is distributed in the hope that it will be useful,
49 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
50 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
51 + * GNU General Public License for more details.
52 + */
53 +
54 +#include <linux/delay.h>
55 +#include <linux/err.h>
56 +#include <linux/io.h>
57 +#include <linux/kernel.h>
58 +#include <linux/module.h>
59 +#include <linux/mutex.h>
60 +#include <linux/of_platform.h>
61 +#include <linux/phy/phy.h>
62 +#include <linux/platform_device.h>
63 +#include <linux/reset.h>
64 +
65 +/*
66 + * Magic registers copied from the SDK driver code
67 + */
68 +#define PHY_CTRL0_ADDR 0x000
69 +#define PHY_CTRL1_ADDR 0x004
70 +#define PHY_CTRL2_ADDR 0x008
71 +#define PHY_CTRL3_ADDR 0x00C
72 +#define PHY_CTRL4_ADDR 0x010
73 +#define PHY_MISC_ADDR 0x024
74 +#define PHY_IPG_ADDR 0x030
75 +
76 +#define PHY_CTRL0_VAL 0xA4600015
77 +#define PHY_CTRL1_VAL 0x09500000
78 +#define PHY_CTRL2_VAL 0x00058180
79 +#define PHY_CTRL3_VAL 0x6DB6DCD6
80 +#define PHY_CTRL4_VAL 0x836DB6DB
81 +#define PHY_MISC_VAL 0x3803FB0C
82 +#define PHY_IPG_VAL 0x47323232
83 +
84 +struct ipq4019_usb_phy {
85 + struct device *dev;
86 + struct phy *phy;
87 + void __iomem *base;
88 + struct reset_control *por_rst;
89 + struct reset_control *srif_rst;
90 +};
91 +
92 +static int ipq4019_ss_phy_power_off(struct phy *_phy)
93 +{
94 + struct ipq4019_usb_phy *phy = phy_get_drvdata(_phy);
95 +
96 + reset_control_assert(phy->por_rst);
97 + msleep(10);
98 +
99 + return 0;
100 +}
101 +
102 +static int ipq4019_ss_phy_power_on(struct phy *_phy)
103 +{
104 + struct ipq4019_usb_phy *phy = phy_get_drvdata(_phy);
105 +
106 + ipq4019_ss_phy_power_off(_phy);
107 +
108 + reset_control_deassert(phy->por_rst);
109 +
110 + return 0;
111 +}
112 +
113 +static struct phy_ops ipq4019_usb_ss_phy_ops = {
114 + .power_on = ipq4019_ss_phy_power_on,
115 + .power_off = ipq4019_ss_phy_power_off,
116 +};
117 +
118 +static int ipq4019_hs_phy_power_off(struct phy *_phy)
119 +{
120 + struct ipq4019_usb_phy *phy = phy_get_drvdata(_phy);
121 +
122 + reset_control_assert(phy->por_rst);
123 + msleep(10);
124 +
125 + reset_control_assert(phy->srif_rst);
126 + msleep(10);
127 +
128 + return 0;
129 +}
130 +
131 +static int ipq4019_hs_phy_power_on(struct phy *_phy)
132 +{
133 + struct ipq4019_usb_phy *phy = phy_get_drvdata(_phy);
134 +
135 + ipq4019_hs_phy_power_off(_phy);
136 +
137 + reset_control_deassert(phy->srif_rst);
138 + msleep(10);
139 +
140 + writel(PHY_CTRL0_VAL, phy->base + PHY_CTRL0_ADDR);
141 + writel(PHY_CTRL1_VAL, phy->base + PHY_CTRL1_ADDR);
142 + writel(PHY_CTRL2_VAL, phy->base + PHY_CTRL2_ADDR);
143 + writel(PHY_CTRL3_VAL, phy->base + PHY_CTRL3_ADDR);
144 + writel(PHY_CTRL4_VAL, phy->base + PHY_CTRL4_ADDR);
145 + writel(PHY_MISC_VAL, phy->base + PHY_MISC_ADDR);
146 + writel(PHY_IPG_VAL, phy->base + PHY_IPG_ADDR);
147 + msleep(10);
148 +
149 + reset_control_deassert(phy->por_rst);
150 +
151 + return 0;
152 +}
153 +
154 +static struct phy_ops ipq4019_usb_hs_phy_ops = {
155 + .power_on = ipq4019_hs_phy_power_on,
156 + .power_off = ipq4019_hs_phy_power_off,
157 +};
158 +
159 +static const struct of_device_id ipq4019_usb_phy_of_match[] = {
160 + { .compatible = "qcom,usb-hs-ipq4019-phy", .data = &ipq4019_usb_hs_phy_ops},
161 + { .compatible = "qcom,usb-ss-ipq4019-phy", .data = &ipq4019_usb_ss_phy_ops},
162 + { },
163 +};
164 +MODULE_DEVICE_TABLE(of, ipq4019_usb_phy_of_match);
165 +
166 +static int ipq4019_usb_phy_probe(struct platform_device *pdev)
167 +{
168 + struct device *dev = &pdev->dev;
169 + struct resource *res;
170 + struct phy_provider *phy_provider;
171 + struct ipq4019_usb_phy *phy;
172 + const struct of_device_id *match;
173 +
174 + match = of_match_device(ipq4019_usb_phy_of_match, &pdev->dev);
175 + if (!match)
176 + return -ENODEV;
177 +
178 + phy = devm_kzalloc(dev, sizeof(*phy), GFP_KERNEL);
179 + if (!phy)
180 + return -ENOMEM;
181 +
182 + phy->dev = &pdev->dev;
183 + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
184 + phy->base = devm_ioremap_resource(&pdev->dev, res);
185 + if (IS_ERR(phy->base)) {
186 + dev_err(dev, "failed to remap register memory\n");
187 + return PTR_ERR(phy->base);
188 + }
189 +
190 + phy->por_rst = devm_reset_control_get(phy->dev, "por_rst");
191 + if (IS_ERR(phy->por_rst)) {
192 + if (PTR_ERR(phy->por_rst) != -EPROBE_DEFER)
193 + dev_err(dev, "POR reset is missing\n");
194 + return PTR_ERR(phy->por_rst);
195 + }
196 +
197 + phy->srif_rst = devm_reset_control_get_optional(phy->dev, "srif_rst");
198 + if (IS_ERR(phy->srif_rst))
199 + return PTR_ERR(phy->srif_rst);
200 +
201 + phy->phy = devm_phy_create(dev, NULL, match->data);
202 + if (IS_ERR(phy->phy)) {
203 + dev_err(dev, "failed to create PHY\n");
204 + return PTR_ERR(phy->phy);
205 + }
206 + phy_set_drvdata(phy->phy, phy);
207 +
208 + phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
209 +
210 + return PTR_ERR_OR_ZERO(phy_provider);
211 +}
212 +
213 +static struct platform_driver ipq4019_usb_phy_driver = {
214 + .probe = ipq4019_usb_phy_probe,
215 + .driver = {
216 + .of_match_table = ipq4019_usb_phy_of_match,
217 + .name = "ipq4019-usb-phy",
218 + }
219 +};
220 +module_platform_driver(ipq4019_usb_phy_driver);
221 +
222 +MODULE_DESCRIPTION("QCOM/IPQ4019 USB phy driver");
223 +MODULE_AUTHOR("John Crispin <john@phrozen.org>");
224 +MODULE_LICENSE("GPL v2");
225 --- a/drivers/phy/qualcomm/Makefile
226 +++ b/drivers/phy/qualcomm/Makefile
227 @@ -1,6 +1,7 @@
228 # SPDX-License-Identifier: GPL-2.0
229 obj-$(CONFIG_PHY_ATH79_USB) += phy-ath79-usb.o
230 obj-$(CONFIG_PHY_QCOM_APQ8064_SATA) += phy-qcom-apq8064-sata.o
231 +obj-$(CONFIG_PHY_QCOM_IPQ4019_USB) += phy-qcom-ipq4019-usb.o
232 obj-$(CONFIG_PHY_QCOM_IPQ806X_SATA) += phy-qcom-ipq806x-sata.o
233 obj-$(CONFIG_PHY_QCOM_QMP) += phy-qcom-qmp.o
234 obj-$(CONFIG_PHY_QCOM_QUSB2) += phy-qcom-qusb2.o