fw-utils/tplink-safeloader.c: Add support for Archer C2600
[openwrt/openwrt.git] / target / linux / ipq806x / patches-3.18 / 031-hwspinlock-qcom-Add-support-for-Qualcomm-HW-Mutex-bl.patch
1 From 19a0f61224d2d91860fa8291ab63cb104ee86bdd Mon Sep 17 00:00:00 2001
2 From: Bjorn Andersson <bjorn.andersson@sonymobile.com>
3 Date: Tue, 24 Mar 2015 10:11:05 -0700
4 Subject: [PATCH] hwspinlock: qcom: Add support for Qualcomm HW Mutex block
5
6 Add driver for Qualcomm Hardware Mutex block found in many Qualcomm
7 SoCs.
8
9 Based on initial effort by Kumar Gala <galak@codeaurora.org>
10
11 Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
12 Reviewed-by: Andy Gross <agross@codeaurora.org>
13 Reviewed-by: Jeffrey Hugo <jhugo@codeaurora.org>
14 Signed-off-by: Ohad Ben-Cohen <ohad@wizery.com>
15 ---
16 drivers/hwspinlock/Kconfig | 12 +++
17 drivers/hwspinlock/Makefile | 1 +
18 drivers/hwspinlock/qcom_hwspinlock.c | 181 +++++++++++++++++++++++++++++++++++
19 3 files changed, 194 insertions(+)
20 create mode 100644 drivers/hwspinlock/qcom_hwspinlock.c
21
22 --- a/drivers/hwspinlock/Kconfig
23 +++ b/drivers/hwspinlock/Kconfig
24 @@ -18,6 +18,18 @@ config HWSPINLOCK_OMAP
25
26 If unsure, say N.
27
28 +config HWSPINLOCK_QCOM
29 + tristate "Qualcomm Hardware Spinlock device"
30 + depends on ARCH_QCOM
31 + select HWSPINLOCK
32 + select MFD_SYSCON
33 + help
34 + Say y here to support the Qualcomm Hardware Mutex functionality, which
35 + provides a synchronisation mechanism for the various processors on
36 + the SoC.
37 +
38 + If unsure, say N.
39 +
40 config HSEM_U8500
41 tristate "STE Hardware Semaphore functionality"
42 depends on ARCH_U8500
43 --- a/drivers/hwspinlock/Makefile
44 +++ b/drivers/hwspinlock/Makefile
45 @@ -4,4 +4,5 @@
46
47 obj-$(CONFIG_HWSPINLOCK) += hwspinlock_core.o
48 obj-$(CONFIG_HWSPINLOCK_OMAP) += omap_hwspinlock.o
49 +obj-$(CONFIG_HWSPINLOCK_QCOM) += qcom_hwspinlock.o
50 obj-$(CONFIG_HSEM_U8500) += u8500_hsem.o
51 --- /dev/null
52 +++ b/drivers/hwspinlock/qcom_hwspinlock.c
53 @@ -0,0 +1,181 @@
54 +/*
55 + * Copyright (c) 2013, The Linux Foundation. All rights reserved.
56 + * Copyright (c) 2015, Sony Mobile Communications AB
57 + *
58 + * This software is licensed under the terms of the GNU General Public
59 + * License version 2, as published by the Free Software Foundation, and
60 + * may be copied, distributed, and modified under those terms.
61 + *
62 + * This program is distributed in the hope that it will be useful,
63 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
64 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
65 + * GNU General Public License for more details.
66 + */
67 +
68 +#include <linux/hwspinlock.h>
69 +#include <linux/io.h>
70 +#include <linux/kernel.h>
71 +#include <linux/mfd/syscon.h>
72 +#include <linux/module.h>
73 +#include <linux/of.h>
74 +#include <linux/of_device.h>
75 +#include <linux/platform_device.h>
76 +#include <linux/pm_runtime.h>
77 +#include <linux/regmap.h>
78 +
79 +#include "hwspinlock_internal.h"
80 +
81 +#define QCOM_MUTEX_APPS_PROC_ID 1
82 +#define QCOM_MUTEX_NUM_LOCKS 32
83 +
84 +static int qcom_hwspinlock_trylock(struct hwspinlock *lock)
85 +{
86 + struct regmap_field *field = lock->priv;
87 + u32 lock_owner;
88 + int ret;
89 +
90 + ret = regmap_field_write(field, QCOM_MUTEX_APPS_PROC_ID);
91 + if (ret)
92 + return ret;
93 +
94 + ret = regmap_field_read(field, &lock_owner);
95 + if (ret)
96 + return ret;
97 +
98 + return lock_owner == QCOM_MUTEX_APPS_PROC_ID;
99 +}
100 +
101 +static void qcom_hwspinlock_unlock(struct hwspinlock *lock)
102 +{
103 + struct regmap_field *field = lock->priv;
104 + u32 lock_owner;
105 + int ret;
106 +
107 + ret = regmap_field_read(field, &lock_owner);
108 + if (ret) {
109 + pr_err("%s: unable to query spinlock owner\n", __func__);
110 + return;
111 + }
112 +
113 + if (lock_owner != QCOM_MUTEX_APPS_PROC_ID) {
114 + pr_err("%s: spinlock not owned by us (actual owner is %d)\n",
115 + __func__, lock_owner);
116 + }
117 +
118 + ret = regmap_field_write(field, 0);
119 + if (ret)
120 + pr_err("%s: failed to unlock spinlock\n", __func__);
121 +}
122 +
123 +static const struct hwspinlock_ops qcom_hwspinlock_ops = {
124 + .trylock = qcom_hwspinlock_trylock,
125 + .unlock = qcom_hwspinlock_unlock,
126 +};
127 +
128 +static const struct of_device_id qcom_hwspinlock_of_match[] = {
129 + { .compatible = "qcom,sfpb-mutex" },
130 + { .compatible = "qcom,tcsr-mutex" },
131 + { }
132 +};
133 +MODULE_DEVICE_TABLE(of, qcom_hwspinlock_of_match);
134 +
135 +static int qcom_hwspinlock_probe(struct platform_device *pdev)
136 +{
137 + struct hwspinlock_device *bank;
138 + struct device_node *syscon;
139 + struct reg_field field;
140 + struct regmap *regmap;
141 + size_t array_size;
142 + u32 stride;
143 + u32 base;
144 + int ret;
145 + int i;
146 +
147 + syscon = of_parse_phandle(pdev->dev.of_node, "syscon", 0);
148 + if (!syscon) {
149 + dev_err(&pdev->dev, "no syscon property\n");
150 + return -ENODEV;
151 + }
152 +
153 + regmap = syscon_node_to_regmap(syscon);
154 + if (IS_ERR(regmap))
155 + return PTR_ERR(regmap);
156 +
157 + ret = of_property_read_u32_index(pdev->dev.of_node, "syscon", 1, &base);
158 + if (ret < 0) {
159 + dev_err(&pdev->dev, "no offset in syscon\n");
160 + return -EINVAL;
161 + }
162 +
163 + ret = of_property_read_u32_index(pdev->dev.of_node, "syscon", 2, &stride);
164 + if (ret < 0) {
165 + dev_err(&pdev->dev, "no stride syscon\n");
166 + return -EINVAL;
167 + }
168 +
169 + array_size = QCOM_MUTEX_NUM_LOCKS * sizeof(struct hwspinlock);
170 + bank = devm_kzalloc(&pdev->dev, sizeof(*bank) + array_size, GFP_KERNEL);
171 + if (!bank)
172 + return -ENOMEM;
173 +
174 + platform_set_drvdata(pdev, bank);
175 +
176 + for (i = 0; i < QCOM_MUTEX_NUM_LOCKS; i++) {
177 + field.reg = base + i * stride;
178 + field.lsb = 0;
179 + field.msb = 32;
180 +
181 + bank->lock[i].priv = devm_regmap_field_alloc(&pdev->dev,
182 + regmap, field);
183 + }
184 +
185 + pm_runtime_enable(&pdev->dev);
186 +
187 + ret = hwspin_lock_register(bank, &pdev->dev, &qcom_hwspinlock_ops,
188 + 0, QCOM_MUTEX_NUM_LOCKS);
189 + if (ret)
190 + pm_runtime_disable(&pdev->dev);
191 +
192 + return ret;
193 +}
194 +
195 +static int qcom_hwspinlock_remove(struct platform_device *pdev)
196 +{
197 + struct hwspinlock_device *bank = platform_get_drvdata(pdev);
198 + int ret;
199 +
200 + ret = hwspin_lock_unregister(bank);
201 + if (ret) {
202 + dev_err(&pdev->dev, "%s failed: %d\n", __func__, ret);
203 + return ret;
204 + }
205 +
206 + pm_runtime_disable(&pdev->dev);
207 +
208 + return 0;
209 +}
210 +
211 +static struct platform_driver qcom_hwspinlock_driver = {
212 + .probe = qcom_hwspinlock_probe,
213 + .remove = qcom_hwspinlock_remove,
214 + .driver = {
215 + .name = "qcom_hwspinlock",
216 + .of_match_table = qcom_hwspinlock_of_match,
217 + },
218 +};
219 +
220 +static int __init qcom_hwspinlock_init(void)
221 +{
222 + return platform_driver_register(&qcom_hwspinlock_driver);
223 +}
224 +/* board init code might need to reserve hwspinlocks for predefined purposes */
225 +postcore_initcall(qcom_hwspinlock_init);
226 +
227 +static void __exit qcom_hwspinlock_exit(void)
228 +{
229 + platform_driver_unregister(&qcom_hwspinlock_driver);
230 +}
231 +module_exit(qcom_hwspinlock_exit);
232 +
233 +MODULE_LICENSE("GPL v2");
234 +MODULE_DESCRIPTION("Hardware spinlock driver for Qualcomm SoCs");