target/linux/ipq806x/patches-3.18/157-ARM-DT-ipq8064-Add-ADM-device-node.patch

   1 From 1fb18acab2d71e7e4efd9c10492edb1baf84dcc0 Mon Sep 17 00:00:00 2001
   2 From: Andy Gross <agross@codeaurora.org>
   3 Date: Wed, 20 May 2015 15:41:07 +0530
   4 Subject: [PATCH] ARM: DT: ipq8064: Add ADM device node
   5
   6 This patch adds support for the ADM DMA on the IPQ8064 SOC
   7
   8 Signed-off-by: Andy Gross <agross@codeaurora.org>
   9 ---
  10  arch/arm/boot/dts/qcom-ipq8064-ap148.dts |  4 ++++
  11  arch/arm/boot/dts/qcom-ipq8064.dtsi      | 21 +++++++++++++++++++++
  12  2 files changed, 25 insertions(+)
  13
  14 --- a/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
  15 +++ b/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
  16 @@ -90,6 +90,10 @@
  17
  18                                 cs-gpios = <&qcom_pinmux 20 0>;
  19
  20 +                               dmas = <&adm_dma 6>,
  21 +                                       <&adm_dma 5>;
  22 +                               dma-names = "rx", "tx";
  23 +
  24                                 flash: m25p80@0 {
  25                                         compatible = "s25fl256s1";
  26                                         #address-cells = <1>;
  27 --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
  28 +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
  29 @@ -657,5 +657,25 @@
  30                         };
  31                 };
  32
  33 +               adm_dma: dma@18300000 {
  34 +                       compatible = "qcom,adm";
  35 +                       reg = <0x18300000 0x100000>;
  36 +                       interrupts = <0 170 0>;
  37 +                       #dma-cells = <1>;
  38 +
  39 +                       clocks = <&gcc ADM0_CLK>, <&gcc ADM0_PBUS_CLK>;
  40 +                       clock-names = "core", "iface";
  41 +
  42 +                       resets = <&gcc ADM0_RESET>,
  43 +                                <&gcc ADM0_PBUS_RESET>,
  44 +                                <&gcc ADM0_C0_RESET>,
  45 +                                <&gcc ADM0_C1_RESET>,
  46 +                                <&gcc ADM0_C2_RESET>;
  47 +                       reset-names = "clk", "pbus", "c0", "c1", "c2";
  48 +                       qcom,ee = <0>;
  49 +
  50 +                       status = "disabled";
  51 +               };
  52 +
  53         };
  54  };