kernel: bump 4.14 to 4.14.48 for 18.06
[openwrt/openwrt.git] / target / linux / ipq806x / patches-4.14 / 0042-clk-qcom-Add-KPSS-ACC-GCC-driver.patch
1 From patchwork Fri Dec 8 09:42:26 2017
2 Content-Type: text/plain; charset="utf-8"
3 MIME-Version: 1.0
4 Content-Transfer-Encoding: 7bit
5 Subject: [v4,08/12] clk: qcom: Add KPSS ACC/GCC driver
6 From: Sricharan R <sricharan@codeaurora.org>
7 X-Patchwork-Id: 10102023
8 Message-Id: <1512726150-7204-9-git-send-email-sricharan@codeaurora.org>
9 To: mturquette@baylibre.com, sboyd@codeaurora.org,
10 devicetree@vger.kernel.org, linux-pm@vger.kernel.org,
11 linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org,
12 viresh.kumar@linaro.org, linux-arm-kernel@lists.infradead.org
13 Cc: sricharan@codeaurora.org
14 Date: Fri, 8 Dec 2017 15:12:26 +0530
15
16 From: Stephen Boyd <sboyd@codeaurora.org>
17
18 The ACC and GCC regions present in KPSSv1 contain registers to
19 control clocks and power to each Krait CPU and L2. For CPUfreq
20 purposes probe these devices and expose a mux clock that chooses
21 between PXO and PLL8.
22
23 Cc: <devicetree@vger.kernel.org>
24 Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
25 ---
26 .../devicetree/bindings/arm/msm/qcom,kpss-acc.txt | 7 ++
27 .../devicetree/bindings/arm/msm/qcom,kpss-gcc.txt | 28 +++++++
28 drivers/clk/qcom/Kconfig | 8 ++
29 drivers/clk/qcom/Makefile | 1 +
30 drivers/clk/qcom/kpss-xcc.c | 96 ++++++++++++++++++++++
31 5 files changed, 140 insertions(+)
32 create mode 100644 Documentation/devicetree/bindings/arm/msm/qcom,kpss-gcc.txt
33 create mode 100644 drivers/clk/qcom/kpss-xcc.c
34
35 --- a/Documentation/devicetree/bindings/arm/msm/qcom,kpss-acc.txt
36 +++ b/Documentation/devicetree/bindings/arm/msm/qcom,kpss-acc.txt
37 @@ -21,10 +21,17 @@ PROPERTIES
38 the register region. An optional second element specifies
39 the base address and size of the alias register region.
40
41 +- clock-output-names:
42 + Usage: optional
43 + Value type: <string>
44 + Definition: Name of the output clock. Typically acpuX_aux where X is a
45 + CPU number starting at 0.
46 +
47 Example:
48
49 clock-controller@2088000 {
50 compatible = "qcom,kpss-acc-v2";
51 reg = <0x02088000 0x1000>,
52 <0x02008000 0x1000>;
53 + clock-output-names = "acpu0_aux";
54 };
55 --- /dev/null
56 +++ b/Documentation/devicetree/bindings/arm/msm/qcom,kpss-gcc.txt
57 @@ -0,0 +1,28 @@
58 +Krait Processor Sub-system (KPSS) Global Clock Controller (GCC)
59 +
60 +PROPERTIES
61 +
62 +- compatible:
63 + Usage: required
64 + Value type: <string>
65 + Definition: should be one of:
66 + "qcom,kpss-gcc"
67 +
68 +- reg:
69 + Usage: required
70 + Value type: <prop-encoded-array>
71 + Definition: base address and size of the register region
72 +
73 +- clock-output-names:
74 + Usage: required
75 + Value type: <string>
76 + Definition: Name of the output clock. Typically acpu_l2_aux indicating
77 + an L2 cache auxiliary clock.
78 +
79 +Example:
80 +
81 + l2cc: clock-controller@2011000 {
82 + compatible = "qcom,kpss-gcc";
83 + reg = <0x2011000 0x1000>;
84 + clock-output-names = "acpu_l2_aux";
85 + };
86 --- a/drivers/clk/qcom/Kconfig
87 +++ b/drivers/clk/qcom/Kconfig
88 @@ -205,6 +205,14 @@ config QCOM_HFPLL
89 Say Y if you want to support CPU frequency scaling on devices
90 such as MSM8974, APQ8084, etc.
91
92 +config KPSS_XCC
93 + tristate "KPSS Clock Controller"
94 + depends on COMMON_CLK_QCOM
95 + help
96 + Support for the Krait ACC and GCC clock controllers. Say Y
97 + if you want to support CPU frequency scaling on devices such
98 + as MSM8960, APQ8064, etc.
99 +
100 config KRAIT_CLOCKS
101 bool
102 select KRAIT_L2_ACCESSORS
103 --- a/drivers/clk/qcom/Makefile
104 +++ b/drivers/clk/qcom/Makefile
105 @@ -36,4 +36,5 @@ obj-$(CONFIG_MSM_MMCC_8974) += mmcc-msm8
106 obj-$(CONFIG_MSM_MMCC_8996) += mmcc-msm8996.o
107 obj-$(CONFIG_QCOM_CLK_RPM) += clk-rpm.o
108 obj-$(CONFIG_QCOM_CLK_SMD_RPM) += clk-smd-rpm.o
109 +obj-$(CONFIG_KPSS_XCC) += kpss-xcc.o
110 obj-$(CONFIG_QCOM_HFPLL) += hfpll.o
111 --- /dev/null
112 +++ b/drivers/clk/qcom/kpss-xcc.c
113 @@ -0,0 +1,96 @@
114 +/* Copyright (c) 2014-2015, The Linux Foundation. All rights reserved.
115 + *
116 + * This program is free software; you can redistribute it and/or modify
117 + * it under the terms of the GNU General Public License version 2 and
118 + * only version 2 as published by the Free Software Foundation.
119 + *
120 + * This program is distributed in the hope that it will be useful,
121 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
122 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
123 + * GNU General Public License for more details.
124 + */
125 +
126 +#include <linux/kernel.h>
127 +#include <linux/init.h>
128 +#include <linux/module.h>
129 +#include <linux/platform_device.h>
130 +#include <linux/err.h>
131 +#include <linux/io.h>
132 +#include <linux/of.h>
133 +#include <linux/of_device.h>
134 +#include <linux/clk.h>
135 +#include <linux/clk-provider.h>
136 +
137 +static const char *aux_parents[] = {
138 + "pll8_vote",
139 + "pxo",
140 +};
141 +
142 +static unsigned int aux_parent_map[] = {
143 + 3,
144 + 0,
145 +};
146 +
147 +static const struct of_device_id kpss_xcc_match_table[] = {
148 + { .compatible = "qcom,kpss-acc-v1", .data = (void *)1UL },
149 + { .compatible = "qcom,kpss-gcc" },
150 + {}
151 +};
152 +MODULE_DEVICE_TABLE(of, kpss_xcc_match_table);
153 +
154 +static int kpss_xcc_driver_probe(struct platform_device *pdev)
155 +{
156 + const struct of_device_id *id;
157 + struct clk *clk;
158 + struct resource *res;
159 + void __iomem *base;
160 + const char *name;
161 +
162 + id = of_match_device(kpss_xcc_match_table, &pdev->dev);
163 + if (!id)
164 + return -ENODEV;
165 +
166 + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
167 + base = devm_ioremap_resource(&pdev->dev, res);
168 + if (IS_ERR(base))
169 + return PTR_ERR(base);
170 +
171 + if (id->data) {
172 + if (of_property_read_string_index(pdev->dev.of_node,
173 + "clock-output-names",
174 + 0, &name))
175 + return -ENODEV;
176 + base += 0x14;
177 + } else {
178 + name = "acpu_l2_aux";
179 + base += 0x28;
180 + }
181 +
182 + clk = clk_register_mux_table(&pdev->dev, name, aux_parents,
183 + ARRAY_SIZE(aux_parents), 0, base, 0, 0x3,
184 + 0, aux_parent_map, NULL);
185 +
186 + platform_set_drvdata(pdev, clk);
187 +
188 + return PTR_ERR_OR_ZERO(clk);
189 +}
190 +
191 +static int kpss_xcc_driver_remove(struct platform_device *pdev)
192 +{
193 + clk_unregister_mux(platform_get_drvdata(pdev));
194 + return 0;
195 +}
196 +
197 +static struct platform_driver kpss_xcc_driver = {
198 + .probe = kpss_xcc_driver_probe,
199 + .remove = kpss_xcc_driver_remove,
200 + .driver = {
201 + .name = "kpss-xcc",
202 + .of_match_table = kpss_xcc_match_table,
203 + },
204 +};
205 +module_platform_driver(kpss_xcc_driver);
206 +
207 +MODULE_DESCRIPTION("Krait Processor Sub System (KPSS) Clock Driver");
208 +MODULE_LICENSE("GPL v2");
209 +MODULE_ALIAS("platform:kpss-xcc");