target/linux/ipq806x/patches-4.9/859-msm-pinctrl-Add-support-to-configure-ipq40xx-GPIO_PU.patch

   1 From e77af7de404eb464f7da9e0daeb8b362cc66a7ba Mon Sep 17 00:00:00 2001
   2 From: Ram Chandra Jangir <rjangir@codeaurora.org>
   3 Date: Tue, 9 May 2017 11:45:00 +0530
   4 Subject: [PATCH] msm: pinctrl: Add support to configure ipq40xx GPIO_PULL bits
   5
   6 GPIO_PULL bits configurations in TLMM_GPIO_CFG register
   7 differs for IPQ40xx from rest of the other qcom SoC's.
   8 This change add support to configure the msm_gpio_pull
   9 bits for ipq40xx, It is required to fix the proper
  10 configurations of gpio-pull bits for nand pins mux.
  11
  12 IPQ40xx SoC:
  13 2'b10: Internal pull up enable.
  14 2'b11: Unsupport
  15
  16 For other SoC's:
  17 2'b10: Keeper
  18 2'b11: Pull-Up
  19
  20 Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
  21 ---
  22  drivers/pinctrl/qcom/pinctrl-apq8064.c |  1 +
  23  drivers/pinctrl/qcom/pinctrl-apq8084.c |  1 +
  24  drivers/pinctrl/qcom/pinctrl-ipq4019.c |  8 ++++++++
  25  drivers/pinctrl/qcom/pinctrl-ipq8064.c |  1 +
  26  drivers/pinctrl/qcom/pinctrl-mdm9615.c |  1 +
  27  drivers/pinctrl/qcom/pinctrl-msm.c     | 21 ++++++++-------------
  28  drivers/pinctrl/qcom/pinctrl-msm.h     | 19 +++++++++++++++++++
  29  drivers/pinctrl/qcom/pinctrl-msm8660.c |  1 +
  30  drivers/pinctrl/qcom/pinctrl-msm8916.c |  1 +
  31  drivers/pinctrl/qcom/pinctrl-msm8960.c |  1 +
  32  drivers/pinctrl/qcom/pinctrl-msm8x74.c |  1 +
  33  11 files changed, 43 insertions(+), 13 deletions(-)
  34
  35 diff --git a/drivers/pinctrl/qcom/pinctrl-apq8064.c b/drivers/pinctrl/qcom/pinctrl-apq8064.c
  36 index cd96699..63e9a7e 100644
  37 --- a/drivers/pinctrl/qcom/pinctrl-apq8064.c
  38 +++ b/drivers/pinctrl/qcom/pinctrl-apq8064.c
  39 @@ -597,6 +597,7 @@ static const struct msm_pinctrl_soc_data apq8064_pinctrl = {
  40         .groups = apq8064_groups,
  41         .ngroups = ARRAY_SIZE(apq8064_groups),
  42         .ngpios = NUM_GPIO_PINGROUPS,
  43 +       .gpio_pull = &msm_gpio_pull,
  44  };
  45
  46  static int apq8064_pinctrl_probe(struct platform_device *pdev)
  47 diff --git a/drivers/pinctrl/qcom/pinctrl-apq8084.c b/drivers/pinctrl/qcom/pinctrl-apq8084.c
  48 index d07e8df..892250e 100644
  49 --- a/drivers/pinctrl/qcom/pinctrl-apq8084.c
  50 +++ b/drivers/pinctrl/qcom/pinctrl-apq8084.c
  51 @@ -1206,6 +1206,7 @@ static const struct msm_pinctrl_soc_data apq8084_pinctrl = {
  52         .groups = apq8084_groups,
  53         .ngroups = ARRAY_SIZE(apq8084_groups),
  54         .ngpios = NUM_GPIO_PINGROUPS,
  55 +       .gpio_pull = &msm_gpio_pull,
  56  };
  57
  58  static int apq8084_pinctrl_probe(struct platform_device *pdev)
  59 diff --git a/drivers/pinctrl/qcom/pinctrl-ipq4019.c b/drivers/pinctrl/qcom/pinctrl-ipq4019.c
  60 index 571eb51..040e03c 100644
  61 --- a/drivers/pinctrl/qcom/pinctrl-ipq4019.c
  62 +++ b/drivers/pinctrl/qcom/pinctrl-ipq4019.c
  63 @@ -1531,6 +1531,13 @@ static const struct msm_pingroup ipq4019_groups[] = {
  64         PINGROUP(99, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
  65  };
  66
  67 +static const struct msm_pinctrl_gpio_pull ipq4019_gpio_pull = {
  68 +       .no_pull = 0,
  69 +       .pull_down = 1,
  70 +       .keeper = 0,
  71 +       .pull_up = 2,
  72 +};
  73 +
  74  static const struct msm_pinctrl_soc_data ipq4019_pinctrl = {
  75         .pins = ipq4019_pins,
  76         .npins = ARRAY_SIZE(ipq4019_pins),
  77 @@ -1539,6 +1546,7 @@ static const struct msm_pinctrl_soc_data ipq4019_pinctrl = {
  78         .groups = ipq4019_groups,
  79         .ngroups = ARRAY_SIZE(ipq4019_groups),
  80         .ngpios = 100,
  81 +       .gpio_pull = &ipq4019_gpio_pull,
  82  };
  83
  84  static int ipq4019_pinctrl_probe(struct platform_device *pdev)
  85 diff --git a/drivers/pinctrl/qcom/pinctrl-ipq8064.c b/drivers/pinctrl/qcom/pinctrl-ipq8064.c
  86 index bcb29c0..a927251 100644
  87 --- a/drivers/pinctrl/qcom/pinctrl-ipq8064.c
  88 +++ b/drivers/pinctrl/qcom/pinctrl-ipq8064.c
  89 @@ -630,6 +630,7 @@ static const struct msm_pinctrl_soc_data ipq8064_pinctrl = {
  90         .groups = ipq8064_groups,
  91         .ngroups = ARRAY_SIZE(ipq8064_groups),
  92         .ngpios = NUM_GPIO_PINGROUPS,
  93 +       .gpio_pull = &msm_gpio_pull,
  94  };
  95
  96  static int ipq8064_pinctrl_probe(struct platform_device *pdev)
  97 diff --git a/drivers/pinctrl/qcom/pinctrl-mdm9615.c b/drivers/pinctrl/qcom/pinctrl-mdm9615.c
  98 index 2b8f452..67e6b75 100644
  99 --- a/drivers/pinctrl/qcom/pinctrl-mdm9615.c
 100 +++ b/drivers/pinctrl/qcom/pinctrl-mdm9615.c
 101 @@ -444,6 +444,7 @@ static const struct msm_pinctrl_soc_data mdm9615_pinctrl = {
 102         .groups = mdm9615_groups,
 103         .ngroups = ARRAY_SIZE(mdm9615_groups),
 104         .ngpios = NUM_GPIO_PINGROUPS,
 105 +       .gpio_pull = &msm_gpio_pull,
 106  };
 107
 108  static int mdm9615_pinctrl_probe(struct platform_device *pdev)
 109 diff --git a/drivers/pinctrl/qcom/pinctrl-msm.c b/drivers/pinctrl/qcom/pinctrl-msm.c
 110 index c406b61..ae361a1 100644
 111 --- a/drivers/pinctrl/qcom/pinctrl-msm.c
 112 +++ b/drivers/pinctrl/qcom/pinctrl-msm.c
 113 @@ -203,11 +203,6 @@ static int msm_config_reg(struct msm_pinctrl *pctrl,
 114         return 0;
 115  }
 116
 117 -#define MSM_NO_PULL    0
 118 -#define MSM_PULL_DOWN  1
 119 -#define MSM_KEEPER     2
 120 -#define MSM_PULL_UP    3
 121 -
 122  static unsigned msm_regval_to_drive(u32 val)
 123  {
 124         return (val + 1) * 2;
 125 @@ -238,16 +233,16 @@ static int msm_config_group_get(struct pinctrl_dev *pctldev,
 126         /* Convert register value to pinconf value */
 127         switch (param) {
 128         case PIN_CONFIG_BIAS_DISABLE:
 129 -               arg = arg == MSM_NO_PULL;
 130 +               arg = arg == pctrl->soc->gpio_pull->no_pull;
 131                 break;
 132         case PIN_CONFIG_BIAS_PULL_DOWN:
 133 -               arg = arg == MSM_PULL_DOWN;
 134 +               arg = arg == pctrl->soc->gpio_pull->pull_down;
 135                 break;
 136         case PIN_CONFIG_BIAS_BUS_HOLD:
 137 -               arg = arg == MSM_KEEPER;
 138 +               arg = arg == pctrl->soc->gpio_pull->keeper;
 139                 break;
 140         case PIN_CONFIG_BIAS_PULL_UP:
 141 -               arg = arg == MSM_PULL_UP;
 142 +               arg = arg == pctrl->soc->gpio_pull->pull_up;
 143                 break;
 144         case PIN_CONFIG_DRIVE_STRENGTH:
 145                 arg = msm_regval_to_drive(arg);
 146 @@ -304,16 +299,16 @@ static int msm_config_group_set(struct pinctrl_dev *pctldev,
 147                 /* Convert pinconf values to register values */
 148                 switch (param) {
 149                 case PIN_CONFIG_BIAS_DISABLE:
 150 -                       arg = MSM_NO_PULL;
 151 +                       arg = pctrl->soc->gpio_pull->no_pull;
 152                         break;
 153                 case PIN_CONFIG_BIAS_PULL_DOWN:
 154 -                       arg = MSM_PULL_DOWN;
 155 +                       arg = pctrl->soc->gpio_pull->pull_down;
 156                         break;
 157                 case PIN_CONFIG_BIAS_BUS_HOLD:
 158 -                       arg = MSM_KEEPER;
 159 +                       arg = pctrl->soc->gpio_pull->keeper;
 160                         break;
 161                 case PIN_CONFIG_BIAS_PULL_UP:
 162 -                       arg = MSM_PULL_UP;
 163 +                       arg = pctrl->soc->gpio_pull->pull_up;
 164                         break;
 165                 case PIN_CONFIG_DRIVE_STRENGTH:
 166                         /* Check for invalid values */
 167 diff --git a/drivers/pinctrl/qcom/pinctrl-msm.h b/drivers/pinctrl/qcom/pinctrl-msm.h
 168 index 54fdd04..090aed9 100644
 169 --- a/drivers/pinctrl/qcom/pinctrl-msm.h
 170 +++ b/drivers/pinctrl/qcom/pinctrl-msm.h
 171 @@ -98,6 +98,16 @@ struct msm_pingroup {
 172  };
 173
 174  /**
 175 + * struct msm_pinctrl_gpio_pull - pinctrl pull value bit field descriptor
 176 + */
 177 +struct msm_pinctrl_gpio_pull {
 178 +       unsigned no_pull;
 179 +       unsigned pull_down;
 180 +       unsigned keeper;
 181 +       unsigned pull_up;
 182 +};
 183 +
 184 +/**
 185   * struct msm_pinctrl_soc_data - Qualcomm pin controller driver configuration
 186   * @pins:       An array describing all pins the pin controller affects.
 187   * @npins:      The number of entries in @pins.
 188 @@ -106,6 +116,7 @@ struct msm_pingroup {
 189   * @groups:     An array describing all pin groups the pin SoC supports.
 190   * @ngroups:    The numbmer of entries in @groups.
 191   * @ngpio:      The number of pingroups the driver should expose as GPIOs.
 192 + * @gpio_pull_val: The pull value bit field descriptor.
 193   */
 194  struct msm_pinctrl_soc_data {
 195         const struct pinctrl_pin_desc *pins;
 196 @@ -115,6 +126,14 @@ struct msm_pinctrl_soc_data {
 197         const struct msm_pingroup *groups;
 198         unsigned ngroups;
 199         unsigned ngpios;
 200 +       const struct msm_pinctrl_gpio_pull *gpio_pull;
 201 +};
 202 +
 203 +static const struct msm_pinctrl_gpio_pull msm_gpio_pull = {
 204 +       .no_pull = 0,
 205 +       .pull_down = 1,
 206 +       .keeper = 2,
 207 +       .pull_up = 3,
 208  };
 209
 210  int msm_pinctrl_probe(struct platform_device *pdev,
 211 diff --git a/drivers/pinctrl/qcom/pinctrl-msm8660.c b/drivers/pinctrl/qcom/pinctrl-msm8660.c
 212 index 5591d09..a8899d9 100644
 213 --- a/drivers/pinctrl/qcom/pinctrl-msm8660.c
 214 +++ b/drivers/pinctrl/qcom/pinctrl-msm8660.c
 215 @@ -979,6 +979,7 @@ static const struct msm_pinctrl_soc_data msm8660_pinctrl = {
 216         .groups = msm8660_groups,
 217         .ngroups = ARRAY_SIZE(msm8660_groups),
 218         .ngpios = NUM_GPIO_PINGROUPS,
 219 +       .gpio_pull = &msm_gpio_pull,
 220  };
 221
 222  static int msm8660_pinctrl_probe(struct platform_device *pdev)
 223 diff --git a/drivers/pinctrl/qcom/pinctrl-msm8916.c b/drivers/pinctrl/qcom/pinctrl-msm8916.c
 224 index 20ebf24..c45c2bb 100644
 225 --- a/drivers/pinctrl/qcom/pinctrl-msm8916.c
 226 +++ b/drivers/pinctrl/qcom/pinctrl-msm8916.c
 227 @@ -967,6 +967,7 @@ static const struct msm_pinctrl_soc_data msm8916_pinctrl = {
 228         .groups = msm8916_groups,
 229         .ngroups = ARRAY_SIZE(msm8916_groups),
 230         .ngpios = NUM_GPIO_PINGROUPS,
 231 +       .gpio_pull = &msm_gpio_pull,
 232  };
 233
 234  static int msm8916_pinctrl_probe(struct platform_device *pdev)
 235 diff --git a/drivers/pinctrl/qcom/pinctrl-msm8960.c b/drivers/pinctrl/qcom/pinctrl-msm8960.c
 236 index ed23e36..9411176 100644
 237 --- a/drivers/pinctrl/qcom/pinctrl-msm8960.c
 238 +++ b/drivers/pinctrl/qcom/pinctrl-msm8960.c
 239 @@ -1244,6 +1244,7 @@ static const struct msm_pinctrl_soc_data msm8960_pinctrl = {
 240         .groups = msm8960_groups,
 241         .ngroups = ARRAY_SIZE(msm8960_groups),
 242         .ngpios = NUM_GPIO_PINGROUPS,
 243 +       .gpio_pull = &msm_gpio_pull,
 244  };
 245
 246  static int msm8960_pinctrl_probe(struct platform_device *pdev)
 247 diff --git a/drivers/pinctrl/qcom/pinctrl-msm8x74.c b/drivers/pinctrl/qcom/pinctrl-msm8x74.c
 248 index 9eb63d3..7740875 100644
 249 --- a/drivers/pinctrl/qcom/pinctrl-msm8x74.c
 250 +++ b/drivers/pinctrl/qcom/pinctrl-msm8x74.c
 251 @@ -1069,6 +1069,7 @@ static const struct msm_pinctrl_soc_data msm8x74_pinctrl = {
 252         .groups = msm8x74_groups,
 253         .ngroups = ARRAY_SIZE(msm8x74_groups),
 254         .ngpios = NUM_GPIO_PINGROUPS,
 255 +       .gpio_pull = &msm_gpio_pull,
 256  };
 257
 258  static int msm8x74_pinctrl_probe(struct platform_device *pdev)
 259 --
 260 2.7.2