target/linux/ipq806x/patches-5.10/104-1-drivers-thermal-tsens-Add-VER_0-tsens-version.patch

   1 From 5c7d1181056feef0b58fb2f556f55e170ba5b479 Mon Sep 17 00:00:00 2001
   2 From: Ansuel Smith <ansuelsmth@gmail.com>
   3 Date: Sat, 25 Jul 2020 19:14:59 +0200
   4 Subject: [PATCH 01/10] drivers: thermal: tsens: Add VER_0 tsens version
   5
   6 VER_0 is used to describe device based on tsens version before v0.1.
   7 These device are devices based on msm8960 for example apq8064 or
   8 ipq806x.
   9
  10 Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
  11 Reviewed-by: Thara Gopinath <thara.gopinath@linaro.org>
  12 Reported-by: kernel test robot <lkp@intel.com>
  13 Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
  14 ---
  15  drivers/thermal/qcom/tsens.c | 150 ++++++++++++++++++++++++++++-------
  16  drivers/thermal/qcom/tsens.h |   4 +-
  17  2 files changed, 124 insertions(+), 30 deletions(-)
  18
  19 --- a/drivers/thermal/qcom/tsens.c
  20 +++ b/drivers/thermal/qcom/tsens.c
  21 @@ -12,6 +12,7 @@
  22  #include <linux/of.h>
  23  #include <linux/of_address.h>
  24  #include <linux/of_platform.h>
  25 +#include <linux/mfd/syscon.h>
  26  #include <linux/platform_device.h>
  27  #include <linux/pm.h>
  28  #include <linux/regmap.h>
  29 @@ -515,6 +516,15 @@ static irqreturn_t tsens_irq_thread(int
  30                         dev_dbg(priv->dev, "[%u] %s: no violation:  %d\n",
  31                                 hw_id, __func__, temp);
  32                 }
  33 +
  34 +               if (tsens_version(priv) < VER_0_1) {
  35 +                       /* Constraint: There is only 1 interrupt control register for all
  36 +                        * 11 temperature sensor. So monitoring more than 1 sensor based
  37 +                        * on interrupts will yield inconsistent result. To overcome this
  38 +                        * issue we will monitor only sensor 0 which is the master sensor.
  39 +                        */
  40 +                       break;
  41 +               }
  42         }
  43
  44         return IRQ_HANDLED;
  45 @@ -530,6 +540,13 @@ static int tsens_set_trips(void *_sensor
  46         int high_val, low_val, cl_high, cl_low;
  47         u32 hw_id = s->hw_id;
  48
  49 +       if (tsens_version(priv) < VER_0_1) {
  50 +               /* Pre v0.1 IP had a single register for each type of interrupt
  51 +                * and thresholds
  52 +                */
  53 +               hw_id = 0;
  54 +       }
  55 +
  56         dev_dbg(dev, "[%u] %s: proposed thresholds: (%d:%d)\n",
  57                 hw_id, __func__, low, high);
  58
  59 @@ -584,18 +601,21 @@ int get_temp_tsens_valid(const struct ts
  60         u32 valid;
  61         int ret;
  62
  63 -       ret = regmap_field_read(priv->rf[valid_idx], &valid);
  64 -       if (ret)
  65 -               return ret;
  66 -       while (!valid) {
  67 -               /* Valid bit is 0 for 6 AHB clock cycles.
  68 -                * At 19.2MHz, 1 AHB clock is ~60ns.
  69 -                * We should enter this loop very, very rarely.
  70 -                */
  71 -               ndelay(400);
  72 +       /* VER_0 doesn't have VALID bit */
  73 +       if (tsens_version(priv) >= VER_0_1) {
  74                 ret = regmap_field_read(priv->rf[valid_idx], &valid);
  75                 if (ret)
  76                         return ret;
  77 +               while (!valid) {
  78 +                       /* Valid bit is 0 for 6 AHB clock cycles.
  79 +                        * At 19.2MHz, 1 AHB clock is ~60ns.
  80 +                        * We should enter this loop very, very rarely.
  81 +                        */
  82 +                       ndelay(400);
  83 +                       ret = regmap_field_read(priv->rf[valid_idx], &valid);
  84 +                       if (ret)
  85 +                               return ret;
  86 +               }
  87         }
  88
  89         /* Valid bit is set, OK to read the temperature */
  90 @@ -608,15 +628,29 @@ int get_temp_common(const struct tsens_s
  91  {
  92         struct tsens_priv *priv = s->priv;
  93         int hw_id = s->hw_id;
  94 -       int last_temp = 0, ret;
  95 +       int last_temp = 0, ret, trdy;
  96 +       unsigned long timeout;
  97
  98 -       ret = regmap_field_read(priv->rf[LAST_TEMP_0 + hw_id], &last_temp);
  99 -       if (ret)
 100 -               return ret;
 101 +       timeout = jiffies + usecs_to_jiffies(TIMEOUT_US);
 102 +       do {
 103 +               if (tsens_version(priv) == VER_0) {
 104 +                       ret = regmap_field_read(priv->rf[TRDY], &trdy);
 105 +                       if (ret)
 106 +                               return ret;
 107 +                       if (!trdy)
 108 +                               continue;
 109 +               }
 110
 111 -       *temp = code_to_degc(last_temp, s) * 1000;
 112 +               ret = regmap_field_read(priv->rf[LAST_TEMP_0 + hw_id], &last_temp);
 113 +               if (ret)
 114 +                       return ret;
 115
 116 -       return 0;
 117 +               *temp = code_to_degc(last_temp, s) * 1000;
 118 +
 119 +               return 0;
 120 +       } while (time_before(jiffies, timeout));
 121 +
 122 +       return -ETIMEDOUT;
 123  }
 124
 125  #ifdef CONFIG_DEBUG_FS
 126 @@ -738,19 +772,34 @@ int __init init_common(struct tsens_priv
 127                 priv->tm_offset = 0x1000;
 128         }
 129
 130 -       res = platform_get_resource(op, IORESOURCE_MEM, 0);
 131 -       tm_base = devm_ioremap_resource(dev, res);
 132 -       if (IS_ERR(tm_base)) {
 133 -               ret = PTR_ERR(tm_base);
 134 -               goto err_put_device;
 135 +       if (tsens_version(priv) >= VER_0_1) {
 136 +               res = platform_get_resource(op, IORESOURCE_MEM, 0);
 137 +               tm_base = devm_ioremap_resource(dev, res);
 138 +               if (IS_ERR(tm_base)) {
 139 +                       ret = PTR_ERR(tm_base);
 140 +                       goto err_put_device;
 141 +               }
 142 +
 143 +               priv->tm_map = devm_regmap_init_mmio(dev, tm_base, &tsens_config);
 144 +       } else { /* VER_0 share the same gcc regs using a syscon */
 145 +               struct device *parent = priv->dev->parent;
 146 +
 147 +               if (parent)
 148 +                       priv->tm_map = syscon_node_to_regmap(parent->of_node);
 149         }
 150
 151 -       priv->tm_map = devm_regmap_init_mmio(dev, tm_base, &tsens_config);
 152 -       if (IS_ERR(priv->tm_map)) {
 153 -               ret = PTR_ERR(priv->tm_map);
 154 +       if (IS_ERR_OR_NULL(priv->tm_map)) {
 155 +               if (!priv->tm_map)
 156 +                       ret = -ENODEV;
 157 +               else
 158 +                       ret = PTR_ERR(priv->tm_map);
 159                 goto err_put_device;
 160         }
 161
 162 +       /* VER_0 have only tm_map */
 163 +       if (!priv->srot_map)
 164 +               priv->srot_map = priv->tm_map;
 165 +
 166         if (tsens_version(priv) > VER_0_1) {
 167                 for (i = VER_MAJOR; i <= VER_STEP; i++) {
 168                         priv->rf[i] = devm_regmap_field_alloc(dev, priv->srot_map,
 169 @@ -771,6 +820,10 @@ int __init init_common(struct tsens_priv
 170                 ret = PTR_ERR(priv->rf[TSENS_EN]);
 171                 goto err_put_device;
 172         }
 173 +       /* in VER_0 TSENS need to be explicitly enabled */
 174 +       if (tsens_version(priv) == VER_0)
 175 +               regmap_field_write(priv->rf[TSENS_EN], 1);
 176 +
 177         ret = regmap_field_read(priv->rf[TSENS_EN], &enabled);
 178         if (ret)
 179                 goto err_put_device;
 180 @@ -793,6 +846,19 @@ int __init init_common(struct tsens_priv
 181                 goto err_put_device;
 182         }
 183
 184 +       priv->rf[TSENS_SW_RST] =
 185 +               devm_regmap_field_alloc(dev, priv->srot_map, priv->fields[TSENS_SW_RST]);
 186 +       if (IS_ERR(priv->rf[TSENS_SW_RST])) {
 187 +               ret = PTR_ERR(priv->rf[TSENS_SW_RST]);
 188 +               goto err_put_device;
 189 +       }
 190 +
 191 +       priv->rf[TRDY] = devm_regmap_field_alloc(dev, priv->tm_map, priv->fields[TRDY]);
 192 +       if (IS_ERR(priv->rf[TRDY])) {
 193 +               ret = PTR_ERR(priv->rf[TRDY]);
 194 +               goto err_put_device;
 195 +       }
 196 +
 197         /* This loop might need changes if enum regfield_ids is reordered */
 198         for (j = LAST_TEMP_0; j <= UP_THRESH_15; j += 16) {
 199                 for (i = 0; i < priv->feat->max_sensors; i++) {
 200 @@ -808,7 +874,7 @@ int __init init_common(struct tsens_priv
 201                 }
 202         }
 203
 204 -       if (priv->feat->crit_int) {
 205 +       if (priv->feat->crit_int || tsens_version(priv) < VER_0_1) {
 206                 /* Loop might need changes if enum regfield_ids is reordered */
 207                 for (j = CRITICAL_STATUS_0; j <= CRIT_THRESH_15; j += 16) {
 208                         for (i = 0; i < priv->feat->max_sensors; i++) {
 209 @@ -846,7 +912,11 @@ int __init init_common(struct tsens_priv
 210         }
 211
 212         spin_lock_init(&priv->ul_lock);
 213 -       tsens_enable_irq(priv);
 214 +
 215 +       /* VER_0 interrupt doesn't need to be enabled */
 216 +       if (tsens_version(priv) >= VER_0_1)
 217 +               tsens_enable_irq(priv);
 218 +
 219         tsens_debug_init(op);
 220
 221  err_put_device:
 222 @@ -945,10 +1015,19 @@ static int tsens_register_irq(struct tse
 223                 if (irq == -ENXIO)
 224                         ret = 0;
 225         } else {
 226 -               ret = devm_request_threaded_irq(&pdev->dev, irq,
 227 -                                               NULL, thread_fn,
 228 -                                               IRQF_ONESHOT,
 229 -                                               dev_name(&pdev->dev), priv);
 230 +               /* VER_0 interrupt is TRIGGER_RISING, VER_0_1 and up is ONESHOT */
 231 +               if (tsens_version(priv) == VER_0)
 232 +                       ret = devm_request_threaded_irq(&pdev->dev, irq,
 233 +                                                       thread_fn, NULL,
 234 +                                                       IRQF_TRIGGER_RISING,
 235 +                                                       dev_name(&pdev->dev),
 236 +                                                       priv);
 237 +               else
 238 +                       ret = devm_request_threaded_irq(&pdev->dev, irq, NULL,
 239 +                                                       thread_fn, IRQF_ONESHOT,
 240 +                                                       dev_name(&pdev->dev),
 241 +                                                       priv);
 242 +
 243                 if (ret)
 244                         dev_err(&pdev->dev, "%s: failed to get irq\n",
 245                                 __func__);
 246 @@ -977,6 +1056,19 @@ static int tsens_register(struct tsens_p
 247                         priv->ops->enable(priv, i);
 248         }
 249
 250 +       /* VER_0 require to set MIN and MAX THRESH
 251 +        * These 2 regs are set using the:
 252 +        * - CRIT_THRESH_0 for MAX THRESH hardcoded to 120°C
 253 +        * - CRIT_THRESH_1 for MIN THRESH hardcoded to   0°C
 254 +        */
 255 +       if (tsens_version(priv) < VER_0_1) {
 256 +               regmap_field_write(priv->rf[CRIT_THRESH_0],
 257 +                                  tsens_mC_to_hw(priv->sensor, 120000));
 258 +
 259 +               regmap_field_write(priv->rf[CRIT_THRESH_1],
 260 +                                  tsens_mC_to_hw(priv->sensor, 0));
 261 +       }
 262 +
 263         ret = tsens_register_irq(priv, "uplow", tsens_irq_thread);
 264         if (ret < 0)
 265                 return ret;
 266 --- a/drivers/thermal/qcom/tsens.h
 267 +++ b/drivers/thermal/qcom/tsens.h
 268 @@ -13,6 +13,7 @@
 269  #define CAL_DEGC_PT2           120
 270  #define SLOPE_FACTOR           1000
 271  #define SLOPE_DEFAULT          3200
 272 +#define TIMEOUT_US             100
 273  #define THRESHOLD_MAX_ADC_CODE 0x3ff
 274  #define THRESHOLD_MIN_ADC_CODE 0x0
 275
 276 @@ -25,7 +26,8 @@ struct tsens_priv;
 277
 278  /* IP version numbers in ascending order */
 279  enum tsens_ver {
 280 -       VER_0_1 = 0,
 281 +       VER_0 = 0,
 282 +       VER_0_1,
 283         VER_1_X,
 284         VER_2_X,
 285  };