target/linux/ipq806x/patches/0080-clk-qcom-Various-fixes-for-MSM8960-s-global-clock-co.patch

   1 From 7456451e9df88d4c33479e3d4ea124d8a91ceb57 Mon Sep 17 00:00:00 2001
   2 From: Kumar Gala <galak@codeaurora.org>
   3 Date: Fri, 4 Apr 2014 11:32:56 -0500
   4 Subject: [PATCH 080/182] clk: qcom: Various fixes for MSM8960's global clock
   5  controller
   6
   7 * Remove CE2_SLEEP_CLK, doesn't exist on 8960 family SoCs
   8 * Fix incorrect offset for PMIC_SSBI2_RESET
   9 * Fix typo:
  10         SIC_TIC -> SPS_TIC_H
  11         SFAB_ADM0_M2_A_CLK -> SFAB_ADM0_M2_H_CLK
  12 * Fix naming convention:
  13         SFAB_CFPB_S_HCLK -> SFAB_CFPB_S_H_CLK
  14         SATA_SRC_CLK -> SATA_CLK_SRC
  15
  16 Signed-off-by: Kumar Gala <galak@codeaurora.org>
  17 Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
  18 Signed-off-by: Mike Turquette <mturquette@linaro.org>
  19 ---
  20  drivers/clk/qcom/gcc-msm8960.c               |    4 ++--
  21  include/dt-bindings/clock/qcom,gcc-msm8960.h |    7 +++----
  22  include/dt-bindings/reset/qcom,gcc-msm8960.h |    2 +-
  23  3 files changed, 6 insertions(+), 7 deletions(-)
  24
  25 diff --git a/drivers/clk/qcom/gcc-msm8960.c b/drivers/clk/qcom/gcc-msm8960.c
  26 index 8e2b6dd..f4ffd91 100644
  27 --- a/drivers/clk/qcom/gcc-msm8960.c
  28 +++ b/drivers/clk/qcom/gcc-msm8960.c
  29 @@ -2810,7 +2810,7 @@ static const struct qcom_reset_map gcc_msm8960_resets[] = {
  30         [PPSS_PROC_RESET] = { 0x2594, 1 },
  31         [PPSS_RESET] = { 0x2594},
  32         [DMA_BAM_RESET] = { 0x25c0, 7 },
  33 -       [SIC_TIC_RESET] = { 0x2600, 7 },
  34 +       [SPS_TIC_H_RESET] = { 0x2600, 7 },
  35         [SLIMBUS_H_RESET] = { 0x2620, 7 },
  36         [SFAB_CFPB_M_RESET] = { 0x2680, 7 },
  37         [SFAB_CFPB_S_RESET] = { 0x26c0, 7 },
  38 @@ -2823,7 +2823,7 @@ static const struct qcom_reset_map gcc_msm8960_resets[] = {
  39         [SFAB_SFPB_M_RESET] = { 0x2780, 7 },
  40         [SFAB_SFPB_S_RESET] = { 0x27a0, 7 },
  41         [RPM_PROC_RESET] = { 0x27c0, 7 },
  42 -       [PMIC_SSBI2_RESET] = { 0x270c, 12 },
  43 +       [PMIC_SSBI2_RESET] = { 0x280c, 12 },
  44         [SDC1_RESET] = { 0x2830 },
  45         [SDC2_RESET] = { 0x2850 },
  46         [SDC3_RESET] = { 0x2870 },
  47 diff --git a/include/dt-bindings/clock/qcom,gcc-msm8960.h b/include/dt-bindings/clock/qcom,gcc-msm8960.h
  48 index 03bbf49..f9f5471 100644
  49 --- a/include/dt-bindings/clock/qcom,gcc-msm8960.h
  50 +++ b/include/dt-bindings/clock/qcom,gcc-msm8960.h
  51 @@ -51,7 +51,7 @@
  52  #define QDSS_TSCTR_CLK                         34
  53  #define SFAB_ADM0_M0_A_CLK                     35
  54  #define SFAB_ADM0_M1_A_CLK                     36
  55 -#define SFAB_ADM0_M2_A_CLK                     37
  56 +#define SFAB_ADM0_M2_H_CLK                     37
  57  #define ADM0_CLK                               38
  58  #define ADM0_PBUS_CLK                          39
  59  #define MSS_XPU_CLK                            40
  60 @@ -99,7 +99,7 @@
  61  #define CFPB2_H_CLK                            82
  62  #define SFAB_CFPB_M_H_CLK                      83
  63  #define CFPB_MASTER_H_CLK                      84
  64 -#define SFAB_CFPB_S_HCLK                       85
  65 +#define SFAB_CFPB_S_H_CLK                      85
  66  #define CFPB_SPLITTER_H_CLK                    86
  67  #define TSIF_H_CLK                             87
  68  #define TSIF_INACTIVITY_TIMERS_CLK             88
  69 @@ -110,7 +110,6 @@
  70  #define CE1_SLEEP_CLK                          93
  71  #define CE2_H_CLK                              94
  72  #define CE2_CORE_CLK                           95
  73 -#define CE2_SLEEP_CLK                          96
  74  #define SFPB_H_CLK_SRC                         97
  75  #define SFPB_H_CLK                             98
  76  #define SFAB_SFPB_M_H_CLK                      99
  77 @@ -252,7 +251,7 @@
  78  #define MSS_S_H_CLK                            235
  79  #define MSS_CXO_SRC_CLK                                236
  80  #define SATA_H_CLK                             237
  81 -#define SATA_SRC_CLK                           238
  82 +#define SATA_CLK_SRC                           238
  83  #define SATA_RXOOB_CLK                         239
  84  #define SATA_PMALIVE_CLK                       240
  85  #define SATA_PHY_REF_CLK                       241
  86 diff --git a/include/dt-bindings/reset/qcom,gcc-msm8960.h b/include/dt-bindings/reset/qcom,gcc-msm8960.h
  87 index a840e68..07edd0e 100644
  88 --- a/include/dt-bindings/reset/qcom,gcc-msm8960.h
  89 +++ b/include/dt-bindings/reset/qcom,gcc-msm8960.h
  90 @@ -58,7 +58,7 @@
  91  #define PPSS_PROC_RESET                                        41
  92  #define PPSS_RESET                                     42
  93  #define DMA_BAM_RESET                                  43
  94 -#define SIC_TIC_RESET                                  44
  95 +#define SPS_TIC_H_RESET                                        44
  96  #define SLIMBUS_H_RESET                                        45
  97  #define SFAB_CFPB_M_RESET                              46
  98  #define SFAB_CFPB_S_RESET                              47
  99 --
 100 1.7.10.4
 101