target/linux/ipq806x/patches/0156-usb-dwc3-Add-Qualcomm-DWC3-glue-layer-driver.patch

   1 From 364532aeb9024d0ff7b88121f9a953f559b1c136 Mon Sep 17 00:00:00 2001
   2 From: "Ivan T. Ivanov" <iivanov@mm-sol.com>
   3 Date: Mon, 7 Oct 2013 10:44:57 +0300
   4 Subject: [PATCH 156/182] usb: dwc3: Add Qualcomm DWC3 glue layer driver
   5
   6 DWC3 glue layer is hardware layer around Synopsys DesignWare
   7 USB3 core. Its purpose is to supply Synopsys IP with required
   8 clocks, voltages and interface it with the rest of the SoC.
   9
  10 Signed-off-by: Ivan T. Ivanov <iivanov@mm-sol.com>
  11 ---
  12  drivers/usb/dwc3/Kconfig     |    8 +++
  13  drivers/usb/dwc3/Makefile    |    1 +
  14  drivers/usb/dwc3/dwc3-qcom.c |  156 ++++++++++++++++++++++++++++++++++++++++++
  15  3 files changed, 165 insertions(+)
  16  create mode 100644 drivers/usb/dwc3/dwc3-qcom.c
  17
  18 diff --git a/drivers/usb/dwc3/Kconfig b/drivers/usb/dwc3/Kconfig
  19 index e2c730f..2d01983 100644
  20 --- a/drivers/usb/dwc3/Kconfig
  21 +++ b/drivers/usb/dwc3/Kconfig
  22 @@ -59,6 +59,14 @@ config USB_DWC3_EXYNOS
  23           Recent Exynos5 SoCs ship with one DesignWare Core USB3 IP inside,
  24           say 'Y' or 'M' if you have one such device.
  25
  26 +config USB_DWC3_QCOM
  27 +       tristate "Qualcomm Platforms"
  28 +       default USB_DWC3
  29 +       select USB_QCOM_DWC3_PHYS
  30 +       help
  31 +         Recent Qualcomm SoCs ship with one DesignWare Core USB3 IP inside,
  32 +         say 'Y' or 'M' if you have one such device.
  33 +
  34  config USB_DWC3_PCI
  35         tristate "PCIe-based Platforms"
  36         depends on PCI
  37 diff --git a/drivers/usb/dwc3/Makefile b/drivers/usb/dwc3/Makefile
  38 index 10ac3e7..4066e4e 100644
  39 --- a/drivers/usb/dwc3/Makefile
  40 +++ b/drivers/usb/dwc3/Makefile
  41 @@ -31,5 +31,6 @@ endif
  42
  43  obj-$(CONFIG_USB_DWC3_OMAP)            += dwc3-omap.o
  44  obj-$(CONFIG_USB_DWC3_EXYNOS)          += dwc3-exynos.o
  45 +obj-$(CONFIG_USB_DWC3_QCOM)            += dwc3-qcom.o
  46  obj-$(CONFIG_USB_DWC3_PCI)             += dwc3-pci.o
  47  obj-$(CONFIG_USB_DWC3_KEYSTONE)                += dwc3-keystone.o
  48 diff --git a/drivers/usb/dwc3/dwc3-qcom.c b/drivers/usb/dwc3/dwc3-qcom.c
  49 new file mode 100644
  50 index 0000000..8d17360
  51 --- /dev/null
  52 +++ b/drivers/usb/dwc3/dwc3-qcom.c
  53 @@ -0,0 +1,156 @@
  54 +/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
  55 + *
  56 + * This program is free software; you can redistribute it and/or modify
  57 + * it under the terms of the GNU General Public License version 2 and
  58 + * only version 2 as published by the Free Software Foundation.
  59 + *
  60 + * This program is distributed in the hope that it will be useful,
  61 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
  62 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  63 + * GNU General Public License for more details.
  64 + */
  65 +
  66 +#include <linux/clk.h>
  67 +#include <linux/err.h>
  68 +#include <linux/io.h>
  69 +#include <linux/module.h>
  70 +#include <linux/of.h>
  71 +#include <linux/of_platform.h>
  72 +#include <linux/platform_device.h>
  73 +#include <linux/regulator/consumer.h>
  74 +#include <linux/usb/phy.h>
  75 +
  76 +#include "core.h"
  77 +
  78 +
  79 +struct dwc3_qcom {
  80 +       struct device           *dev;
  81 +
  82 +       struct clk              *core_clk;
  83 +       struct clk              *iface_clk;
  84 +       struct clk              *sleep_clk;
  85 +
  86 +       struct regulator        *gdsc;
  87 +};
  88 +
  89 +static int dwc3_qcom_probe(struct platform_device *pdev)
  90 +{
  91 +       struct device_node *node = pdev->dev.of_node;
  92 +       struct dwc3_qcom *mdwc;
  93 +       int ret = 0;
  94 +
  95 +       mdwc = devm_kzalloc(&pdev->dev, sizeof(*mdwc), GFP_KERNEL);
  96 +       if (!mdwc)
  97 +               return -ENOMEM;
  98 +
  99 +       platform_set_drvdata(pdev, mdwc);
 100 +
 101 +       mdwc->dev = &pdev->dev;
 102 +
 103 +       mdwc->gdsc = devm_regulator_get(mdwc->dev, "gdsc");
 104 +
 105 +       mdwc->core_clk = devm_clk_get(mdwc->dev, "core");
 106 +       if (IS_ERR(mdwc->core_clk)) {
 107 +               dev_dbg(mdwc->dev, "failed to get core clock\n");
 108 +               return PTR_ERR(mdwc->core_clk);
 109 +       }
 110 +
 111 +       mdwc->iface_clk = devm_clk_get(mdwc->dev, "iface");
 112 +       if (IS_ERR(mdwc->iface_clk)) {
 113 +               dev_dbg(mdwc->dev, "failed to get iface clock, skipping\n");
 114 +               mdwc->iface_clk = NULL;
 115 +       }
 116 +
 117 +       mdwc->sleep_clk = devm_clk_get(mdwc->dev, "sleep");
 118 +       if (IS_ERR(mdwc->sleep_clk)) {
 119 +               dev_dbg(mdwc->dev, "failed to get sleep clock, skipping\n");
 120 +               mdwc->sleep_clk = NULL;
 121 +       }
 122 +
 123 +       if (!IS_ERR(mdwc->gdsc)) {
 124 +               ret = regulator_enable(mdwc->gdsc);
 125 +               if (ret)
 126 +                       dev_err(mdwc->dev, "cannot enable gdsc\n");
 127 +       }
 128 +
 129 +       clk_prepare_enable(mdwc->core_clk);
 130 +
 131 +       if (mdwc->iface_clk)
 132 +               clk_prepare_enable(mdwc->iface_clk);
 133 +
 134 +       if (mdwc->sleep_clk)
 135 +               clk_prepare_enable(mdwc->sleep_clk);
 136 +
 137 +       ret = of_platform_populate(node, NULL, NULL, mdwc->dev);
 138 +       if (ret) {
 139 +               dev_err(mdwc->dev, "failed to register core - %d\n", ret);
 140 +               dev_dbg(mdwc->dev, "failed to add create dwc3 core\n");
 141 +               goto dis_clks;
 142 +       }
 143 +
 144 +       return 0;
 145 +
 146 +dis_clks:
 147 +
 148 +       dev_err(mdwc->dev, "disabling clocks\n");
 149 +
 150 +       if (mdwc->sleep_clk)
 151 +               clk_disable_unprepare(mdwc->sleep_clk);
 152 +
 153 +       if (mdwc->iface_clk)
 154 +               clk_disable_unprepare(mdwc->iface_clk);
 155 +
 156 +       clk_disable_unprepare(mdwc->core_clk);
 157 +
 158 +       if (!IS_ERR(mdwc->gdsc)) {
 159 +               ret = regulator_disable(mdwc->gdsc);
 160 +               if (ret)
 161 +                       dev_dbg(mdwc->dev, "cannot disable gdsc\n");
 162 +       }
 163 +
 164 +       return ret;
 165 +}
 166 +
 167 +static int dwc3_qcom_remove(struct platform_device *pdev)
 168 +{
 169 +       int ret = 0;
 170 +
 171 +       struct dwc3_qcom *mdwc = platform_get_drvdata(pdev);
 172 +
 173 +       if (mdwc->sleep_clk)
 174 +               clk_disable_unprepare(mdwc->sleep_clk);
 175 +
 176 +       if (mdwc->iface_clk)
 177 +               clk_disable_unprepare(mdwc->iface_clk);
 178 +
 179 +       clk_disable_unprepare(mdwc->core_clk);
 180 +
 181 +       if (!IS_ERR(mdwc->gdsc)) {
 182 +               ret = regulator_disable(mdwc->gdsc);
 183 +               if (ret)
 184 +                       dev_dbg(mdwc->dev, "cannot disable gdsc\n");
 185 +       }
 186 +       return ret;
 187 +}
 188 +
 189 +static const struct of_device_id of_dwc3_match[] = {
 190 +       { .compatible = "qcom,dwc3" },
 191 +       { /* Sentinel */ }
 192 +};
 193 +MODULE_DEVICE_TABLE(of, of_dwc3_match);
 194 +
 195 +static struct platform_driver dwc3_qcom_driver = {
 196 +       .probe          = dwc3_qcom_probe,
 197 +       .remove         = dwc3_qcom_remove,
 198 +       .driver         = {
 199 +               .name   = "qcom-dwc3",
 200 +               .owner  = THIS_MODULE,
 201 +               .of_match_table = of_dwc3_match,
 202 +       },
 203 +};
 204 +
 205 +module_platform_driver(dwc3_qcom_driver);
 206 +
 207 +MODULE_ALIAS("platform:qcom-dwc3");
 208 +MODULE_LICENSE("GPL v2");
 209 +MODULE_DESCRIPTION("DesignWare USB3 QCOM Glue Layer");
 210 --
 211 1.7.10.4
 212