6eb282c7aa104bf22f34123fc3137204aaf7d181
[openwrt/openwrt.git] / target / linux / ipq807x / patches-5.15 / 0103-arm64-dts-qcom-ipq8074-fix-Gen2-PCIe-QMP-PHY.patch
1 From 075b3ca8a4223742abc6da2406afe206d97f3d52 Mon Sep 17 00:00:00 2001
2 From: Robert Marko <robimarko@gmail.com>
3 Date: Wed, 16 Nov 2022 22:48:33 +0100
4 Subject: [PATCH] arm64: dts: qcom: ipq8074: fix Gen2 PCIe QMP PHY
5
6 Serdes register space sizes are incorrect, update them to match the
7 actual sizes from downstream QCA 5.4 kernel.
8
9 Fixes: 942bcd33ed45 ("arm64: dts: qcom: Fix IPQ8074 PCIe PHY nodes")
10 Signed-off-by: Robert Marko <robimarko@gmail.com>
11 ---
12 arch/arm64/boot/dts/qcom/ipq8074.dtsi | 4 ++--
13 1 file changed, 2 insertions(+), 2 deletions(-)
14
15 --- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
16 +++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
17 @@ -277,9 +277,9 @@
18 status = "disabled";
19
20 pcie_phy1: phy@8e200 {
21 - reg = <0x8e200 0x16c>,
22 + reg = <0x8e200 0x130>,
23 <0x8e400 0x200>,
24 - <0x8e800 0x4f4>;
25 + <0x8e800 0x1f8>;
26 #phy-cells = <0>;
27 #clock-cells = <0>;
28 clocks = <&gcc GCC_PCIE1_PIPE_CLK>;