target/linux/ipq807x/patches-5.15/0132-arm64-dts-qcom-ipq8074-correct-USB3-QMP-PHY-s-clock-.patch

   1 From 1bfcec16a591622b4993c043e6cc4d07f3690767 Mon Sep 17 00:00:00 2001
   2 From: Robert Marko <robimarko@gmail.com>
   3 Date: Sun, 8 Jan 2023 13:39:55 +0100
   4 Subject: [PATCH] arm64: dts: qcom: ipq8074: correct USB3 QMP PHY-s clock
   5  output names
   6
   7 It seems that clock-output-names for the USB3 QMP PHY-s where set without
   8 actually checking what is the GCC clock driver expecting, so clock core
   9 could never actually find the parents for usb0_pipe_clk_src and
  10 usb1_pipe_clk_src clocks in the GCC driver.
  11
  12 So, correct the names to be what the driver expects so that parenting
  13 works.
  14
  15 Before:
  16 gcc_usb0_pipe_clk_src                0        0        0   125000000          0     0  50000         Y
  17 gcc_usb1_pipe_clk_src                0        0        0   125000000          0     0  50000         Y
  18
  19 After:
  20  usb3phy_0_cc_pipe_clk                1        1        0   125000000          0     0  50000         Y
  21     usb0_pipe_clk_src                 1        1        0   125000000          0     0  50000         Y
  22        gcc_usb0_pipe_clk              1        1        0   125000000          0     0  50000         Y
  23  usb3phy_1_cc_pipe_clk                1        1        0   125000000          0     0  50000         Y
  24     usb1_pipe_clk_src                 1        1        0   125000000          0     0  50000         Y
  25        gcc_usb1_pipe_clk              1        1        0   125000000          0     0  50000         Y
  26
  27 Fixes: 5e09bc51d07b ("arm64: dts: ipq8074: enable USB support")
  28 Signed-off-by: Robert Marko <robimarko@gmail.com>
  29 ---
  30  arch/arm64/boot/dts/qcom/ipq8074.dtsi | 4 ++--
  31  1 file changed, 2 insertions(+), 2 deletions(-)
  32
  33 --- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
  34 +++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
  35 @@ -263,7 +263,7 @@
  36                                 #clock-cells = <0>;
  37                                 clocks = <&gcc GCC_USB1_PIPE_CLK>;
  38                                 clock-names = "pipe0";
  39 -                               clock-output-names = "gcc_usb1_pipe_clk_src";
  40 +                               clock-output-names = "usb3phy_1_cc_pipe_clk";
  41                         };
  42                 };
  43
  44 @@ -306,7 +306,7 @@
  45                                 #clock-cells = <0>;
  46                                 clocks = <&gcc GCC_USB0_PIPE_CLK>;
  47                                 clock-names = "pipe0";
  48 -                               clock-output-names = "gcc_usb0_pipe_clk_src";
  49 +                               clock-output-names = "usb3phy_0_cc_pipe_clk";
  50                         };
  51                 };
  52