target/linux/lantiq/dts/EASY80920.dtsi

   1 #include "vr9.dtsi"
   2
   3 #include <dt-bindings/input/input.h>
   4
   5 / {
   6         aliases {
   7                 led-boot = &power;
   8                 led-failsafe = &power;
   9                 led-running = &power;
  10
  11                 led-usb = &usb1;
  12                 led-usb2 = &usb2;
  13         };
  14
  15         memory@0 {
  16                 reg = <0x0 0x4000000>;
  17         };
  18
  19         fpi@10000000 {
  20                 gpio: pinmux@E100B10 {
  21                         pinctrl-names = "default";
  22                         pinctrl-0 = <&state_default>;
  23
  24                         state_default: pinmux {
  25                                 exin3 {
  26                                         lantiq,groups = "exin3";
  27                                         lantiq,function = "exin";
  28                                 };
  29                                 stp {
  30                                         lantiq,groups = "stp";
  31                                         lantiq,function = "stp";
  32                                 };
  33                                 nand {
  34                                         lantiq,groups = "nand cle", "nand ale",
  35                                                         "nand rd", "nand rdy";
  36                                         lantiq,function = "ebu";
  37                                 };
  38                                 mdio {
  39                                         lantiq,groups = "mdio";
  40                                         lantiq,function = "mdio";
  41                                 };
  42                                 pci {
  43                                         lantiq,groups = "gnt1", "req1";
  44                                         lantiq,function = "pci";
  45                                 };
  46                                 conf_out {
  47                                         lantiq,pins = "io24", "io13", "io49", /* nand cle, ale and rd */
  48                                                         "io4", "io5", "io6", /* stp */
  49                                                         "io21",
  50                                                         "io33";
  51                                         lantiq,open-drain;
  52                                         lantiq,pull = <0>;
  53                                         lantiq,output = <1>;
  54                                 };
  55                                 pcie-rst {
  56                                         lantiq,pins = "io38";
  57                                         lantiq,pull = <0>;
  58                                         lantiq,output = <1>;
  59                                 };
  60                                 conf_in {
  61                                         lantiq,pins = "io39", /* exin3 */
  62                                                         "io48"; /* nand rdy */
  63                                         lantiq,pull = <2>;
  64                                 };
  65                         };
  66                         pins_spi_default: pins_spi_default {
  67                                 spi_in {
  68                                         lantiq,groups = "spi_di";
  69                                         lantiq,function = "spi";
  70                                 };
  71                                 spi_out {
  72                                         lantiq,groups = "spi_do", "spi_clk",
  73                                                 "spi_cs4";
  74                                         lantiq,function = "spi";
  75                                         lantiq,output = <1>;
  76                                 };
  77                         };
  78                 };
  79
  80                 stp: stp@E100BB0 {
  81                         compatible = "lantiq,gpio-stp-xway";
  82                         reg = <0xE100BB0 0x40>;
  83                         #gpio-cells = <2>;
  84                         gpio-controller;
  85
  86                         lantiq,shadow = <0xffff>;
  87                         lantiq,groups = <0x7>;
  88                         lantiq,dsl = <0x3>;
  89                         lantiq,phy1 = <0x7>;
  90                         lantiq,phy2 = <0x7>;
  91                         /* lantiq,rising; */
  92                 };
  93
  94                 ifxhcd@E101000 {
  95                         status = "okay";
  96                         gpios = <&gpio 33 GPIO_ACTIVE_HIGH>;
  97                         lantiq,portmask = <0x3>;
  98                 };
  99         };
 100
 101         gphy-xrx200 {
 102                 compatible = "lantiq,phy-xrx200";
 103                 firmware1 = "lantiq/vr9_phy11g_a1x.bin";
 104                 firmware2 = "lantiq/vr9_phy11g_a2x.bin";
 105                 phys = [ 00 01 ];
 106         };
 107
 108         gpio-keys-polled {
 109                 compatible = "gpio-keys-polled";
 110                 #address-cells = <1>;
 111                 #size-cells = <0>;
 112                 poll-interval = <100>;
 113 /*              reset {
 114                         label = "reset";
 115                         gpios = <&gpio 7 GPIO_ACTIVE_LOW>;
 116                         linux,code = <KEY_RESTART>;
 117                 };*/
 118                 paging {
 119                         label = "paging";
 120                         gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
 121                         linux,code = <KEY_PHONE>;
 122                 };
 123         };
 124
 125         gpio-leds {
 126                 compatible = "gpio-leds";
 127
 128                 power: power {
 129                         label = "easy80920:green:power";
 130                         gpios = <&stp 9 GPIO_ACTIVE_HIGH>;
 131                         default-state = "keep";
 132                 };
 133                 warning {
 134                         label = "easy80920:green:warning";
 135                         gpios = <&stp 22 GPIO_ACTIVE_HIGH>;
 136                 };
 137                 fxs1 {
 138                         label = "easy80920:green:fxs1";
 139                         gpios = <&stp 21 GPIO_ACTIVE_HIGH>;
 140                 };
 141                 fxs2 {
 142                         label = "easy80920:green:fxs2";
 143                         gpios = <&stp 20 GPIO_ACTIVE_HIGH>;
 144                 };
 145                 fxo {
 146                         label = "easy80920:green:fxo";
 147                         gpios = <&stp 19 GPIO_ACTIVE_HIGH>;
 148                 };
 149                 usb1: usb1 {
 150                         label = "easy80920:green:usb1";
 151                         gpios = <&stp 18 GPIO_ACTIVE_HIGH>;
 152                 };
 153                 usb2: usb2 {
 154                         label = "easy80920:green:usb2";
 155                         gpios = <&stp 15 GPIO_ACTIVE_HIGH>;
 156                 };
 157                 sd {
 158                         label = "easy80920:green:sd";
 159                         gpios = <&stp 14 GPIO_ACTIVE_HIGH>;
 160                 };
 161                 wps {
 162                         label = "easy80920:green:wps";
 163                         gpios = <&stp 12 GPIO_ACTIVE_HIGH>;
 164                 };
 165         };
 166 };
 167
 168 &spi {
 169         pinctrl-names = "default";
 170         pinctrl-0 = <&pins_spi_default>;
 171
 172         status = "ok";
 173
 174         m25p80@4 {
 175                 #address-cells = <1>;
 176                 #size-cells = <1>;
 177                 compatible = "jedec,spi-nor";
 178                 reg = <4 0>;
 179                 spi-max-frequency = <1000000>;
 180
 181                 partitions {
 182                         compatible = "fixed-partitions";
 183                         #address-cells = <1>;
 184                         #size-cells = <1>;
 185
 186                         partition@0 {
 187                                 reg = <0x0 0x20000>;
 188                                 label = "SPI (RO) U-Boot Image";
 189                                 read-only;
 190                         };
 191
 192                         partition@20000 {
 193                                 reg = <0x20000 0x10000>;
 194                                 label = "ENV_MAC";
 195                                 read-only;
 196                         };
 197
 198                         partition@30000 {
 199                                 reg = <0x30000 0x10000>;
 200                                 label = "DPF";
 201                                 read-only;
 202                         };
 203
 204                         partition@40000 {
 205                                 reg = <0x40000 0x10000>;
 206                                 label = "NVRAM";
 207                                 read-only;
 208                         };
 209
 210                         partition@500000 {
 211                                 reg = <0x50000 0x003a0000>;
 212                                 label = "kernel";
 213                         };
 214                 };
 215         };
 216 };
 217
 218 &eth0 {
 219         lan: interface@0 {
 220                 compatible = "lantiq,xrx200-pdi";
 221                 #address-cells = <1>;
 222                 #size-cells = <0>;
 223                 reg = <0>;
 224                 lantiq,switch;
 225
 226                 ethernet@4 {
 227                         compatible = "lantiq,xrx200-pdi-port";
 228                         reg = <4>;
 229                         phynmode0 = "gmii";
 230                         phy-handle = <&phy13>;
 231                 };
 232                 ethernet@2 {
 233                         compatible = "lantiq,xrx200-pdi-port";
 234                         reg = <2>;
 235                         phy-mode = "gmii";
 236                         phy-handle = <&phy11>;
 237                 };
 238                 ethernet@1 {
 239                         compatible = "lantiq,xrx200-pdi-port";
 240                         reg = <1>;
 241                         phy-mode = "rgmii";
 242                         phy-handle = <&phy1>;
 243                 };
 244                 ethernet@0 {
 245                         compatible = "lantiq,xrx200-pdi-port";
 246                         reg = <0>;
 247                         phy-mode = "rgmii";
 248                         phy-handle = <&phy0>;
 249                 };
 250         };
 251
 252         wan: interface@1 {
 253                 compatible = "lantiq,xrx200-pdi";
 254                 #address-cells = <1>;
 255                 #size-cells = <0>;
 256                 reg = <1>;
 257                 lantiq,wan;
 258
 259                 ethernet@5 {
 260                         compatible = "lantiq,xrx200-pdi-port";
 261                         reg = <5>;
 262                         phy-mode = "rgmii";
 263                         phy-handle = <&phy5>;
 264                 };
 265         };
 266
 267         mdio@0 {
 268                 #address-cells = <1>;
 269                 #size-cells = <0>;
 270                 compatible = "lantiq,xrx200-mdio";
 271                 phy0: ethernet-phy@0 {
 272                         reg = <0x0>;
 273                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
 274                 };
 275                 phy1: ethernet-phy@1 {
 276                         reg = <0x1>;
 277                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
 278                 };
 279                 phy5: ethernet-phy@5 {
 280                         reg = <0x5>;
 281                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
 282                 };
 283                 phy11: ethernet-phy@11 {
 284                         reg = <0x11>;
 285                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
 286                 };
 287                 phy13: ethernet-phy@13 {
 288                         reg = <0x13>;
 289                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
 290                 };
 291         };
 292 };