32bed972b1cdeeecd956ae812e85452a77d85397
[openwrt/openwrt.git] / target / linux / lantiq / dts / ar9.dtsi
1 #include <dt-bindings/gpio/gpio.h>
2 #include <dt-bindings/input/input.h>
3
4 / {
5 #address-cells = <1>;
6 #size-cells = <1>;
7 compatible = "lantiq,xway", "lantiq,ar9";
8
9 cpus {
10 cpu@0 {
11 compatible = "mips,mips34K";
12 };
13 };
14
15 memory@0 {
16 device_type = "memory";
17 };
18
19 biu@1F800000 {
20 #address-cells = <1>;
21 #size-cells = <1>;
22 compatible = "lantiq,biu", "simple-bus";
23 reg = <0x1F800000 0x800000>;
24 ranges = <0x0 0x1F800000 0x7FFFFF>;
25
26 icu0: icu@80200 {
27 #interrupt-cells = <1>;
28 interrupt-controller;
29 compatible = "lantiq,icu";
30 reg = <0x80200 0x28
31 0x80228 0x28
32 0x80250 0x28
33 0x80278 0x28
34 0x802a0 0x28>;
35 };
36
37 watchdog@803F0 {
38 compatible = "lantiq,wdt";
39 reg = <0x803F0 0x10>;
40 };
41 };
42
43 sram@1F000000 {
44 #address-cells = <1>;
45 #size-cells = <1>;
46 compatible = "lantiq,sram", "simple-bus";
47 reg = <0x1F000000 0x800000>;
48 ranges = <0x0 0x1F000000 0x7FFFFF>;
49
50 eiu0: eiu@101000 {
51 #interrupt-cells = <1>;
52 interrupt-controller;
53 compatible = "lantiq,eiu-xway";
54 reg = <0x101000 0x1000>;
55 interrupt-parent = <&icu0>;
56 lantiq,eiu-irqs = <166 135 66 40 41 42>;
57 };
58
59 pmu0: pmu@102000 {
60 compatible = "lantiq,pmu-xway";
61 reg = <0x102000 0x1000>;
62 };
63
64 cgu0: cgu@103000 {
65 compatible = "lantiq,cgu-xway";
66 reg = <0x103000 0x1000>;
67 #clock-cells = <1>;
68 };
69
70 rcu0: rcu@203000 {
71 compatible = "lantiq,rcu-xway";
72 reg = <0x203000 0x1000>;
73 };
74 };
75
76 fpi@10000000 {
77 #address-cells = <1>;
78 #size-cells = <1>;
79 compatible = "lantiq,fpi", "simple-bus";
80 ranges = <0x0 0x10000000 0xEEFFFFF>;
81 reg = <0x10000000 0xEF00000>;
82
83 localbus@0 {
84 #address-cells = <2>;
85 #size-cells = <1>;
86 ranges = <0 0 0x0 0x3ffffff /* addrsel0 */
87 1 0 0x4000000 0x4000010>; /* addsel1 */
88 compatible = "lantiq,localbus", "simple-bus";
89 };
90
91 gptu@E100A00 {
92 compatible = "lantiq,gptu-xway";
93 reg = <0xE100A00 0x100>;
94 interrupt-parent = <&icu0>;
95 interrupts = <126 127 128 129 130 131>;
96 };
97
98 asc0: serial@E100400 {
99 compatible = "lantiq,asc";
100 reg = <0xE100400 0x400>;
101 interrupt-parent = <&icu0>;
102 interrupts = <104 105 106>;
103 status = "disabled";
104 };
105
106 spi: spi@E100800 {
107 compatible = "lantiq,xrx100-spi";
108 reg = <0xE100800 0x100>;
109 interrupt-parent = <&icu0>;
110 interrupts = <22 23 24>;
111 interrupt-names = "spi_rx", "spi_tx", "spi_err",
112 "spi_frm";
113 #address-cells = <1>;
114 #size-cells = <1>;
115 status = "disabled";
116 };
117
118 gpio: pinmux@E100B10 {
119 compatible = "lantiq,xrx100-pinctrl";
120 #gpio-cells = <2>;
121 gpio-controller;
122 reg = <0xE100B10 0xA0>;
123 };
124
125 asc1: serial@E100C00 {
126 compatible = "lantiq,asc";
127 reg = <0xE100C00 0x400>;
128 interrupt-parent = <&icu0>;
129 interrupts = <112 113 114>;
130 };
131
132 ifxhcd@E101000 {
133 compatible = "lantiq,ifxhcd-arx100", "lantiq,ifxhcd-arx100-dwc2";
134 reg = <0xE101000 0x1000
135 0xE120000 0x3f000>;
136 interrupt-parent = <&icu0>;
137 interrupts = <62 91>;
138 status = "disabled";
139 };
140
141 ifxhcd@E106000 {
142 compatible = "lantiq,ifxhcd-arx100-dwc2";
143 reg = <0xE106000 0x1000
144 0xE1E0000 0x3f000>;
145 interrupt-parent = <&icu0>;
146 interrupts = <91>;
147 status = "disabled";
148 };
149
150 deu@E103100 {
151 compatible = "lantiq,deu-arx100";
152 reg = <0xE103100 0xf00>;
153 };
154
155 dma0: dma@E104100 {
156 compatible = "lantiq,dma-xway";
157 reg = <0xE104100 0x800>;
158 };
159
160 ebu0: ebu@E105300 {
161 compatible = "lantiq,ebu-xway";
162 reg = <0xE105300 0x100>;
163 };
164
165 mei@E116000 {
166 compatible = "lantiq,mei-xway";
167 interrupt-parent = <&icu0>;
168 interrupts = <63>;
169 };
170
171 etop@E180000 {
172 compatible = "lantiq,etop-xway";
173 reg = <0xE180000 0x40000
174 0xE108000 0x200>;
175 interrupt-parent = <&icu0>;
176 interrupts = <73 72>;
177 mac-address = [ 00 11 22 33 44 55 ];
178 };
179
180 ppe@E234000 {
181 compatible = "lantiq,ppe-arx100";
182 interrupt-parent = <&icu0>;
183 interrupts = <96>;
184 };
185
186 pci0: pci@E105400 {
187 status = "disabled";
188 #address-cells = <3>;
189 #size-cells = <2>;
190 #interrupt-cells = <1>;
191 compatible = "lantiq,pci-xway";
192 bus-range = <0x0 0x0>;
193 ranges = <0x2000000 0 0x8000000 0x8000000 0 0x2000000 /* pci memory */
194 0x1000000 0 0x00000000 0xAE00000 0 0x200000>; /* io space */
195 reg = <0x7000000 0x8000 /* config space */
196 0xE105400 0x400>; /* pci bridge */
197 lantiq,bus-clock = <33333333>;
198 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
199 interrupt-map = <0x7000 0 0 1 &icu0 30 1>;
200 req-mask = <0x1>;
201 };
202 };
203
204 adsl {
205 compatible = "lantiq,adsl-arx100";
206 };
207 };