target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_tplink_tdw89x0.dtsi

   1 #include "vr9.dtsi"
   2
   3 #include <dt-bindings/input/input.h>
   4 #include <dt-bindings/mips/lantiq_rcu_gphy.h>
   5
   6 / {
   7         compatible = "tplink,tdw89x0", "lantiq,xway", "lantiq,vr9";
   8
   9         chosen {
  10                 bootargs = "console=ttyLTQ0,115200";
  11         };
  12
  13         aliases {
  14                 /* the power led can't be controlled, use the wps led instead */
  15                 led-boot = &led_wps;
  16                 led-failsafe = &led_wps;
  17
  18                 led-dsl = &led_dsl;
  19                 led-internet = &led_internet;
  20                 led-wifi = &led_wifi;
  21         };
  22
  23         memory@0 {
  24                 device_type = "memory";
  25                 reg = <0x0 0x4000000>;
  26         };
  27
  28         keys {
  29                 compatible = "gpio-keys-polled";
  30                 poll-interval = <100>;
  31                 reset {
  32                         label = "reset";
  33                         gpios = <&gpio 0 GPIO_ACTIVE_LOW>;
  34                         linux,code = <KEY_RESTART>;
  35                 };
  36
  37                 wifi {
  38                         label = "wifi";
  39                         gpios = <&gpio 9 GPIO_ACTIVE_HIGH>;
  40                         linux,code = <KEY_RFKILL>;
  41                         linux,input-type = <EV_SW>;
  42                 };
  43
  44                 wps {
  45                         label = "wps";
  46                         gpios = <&gpio 39 GPIO_ACTIVE_LOW>;
  47                         linux,code = <KEY_WPS_BUTTON>;
  48                 };
  49         };
  50
  51         leds: leds {
  52                 compatible = "gpio-leds";
  53
  54                 /*
  55                         power is not controllable via gpio
  56                 */
  57
  58                 led_dsl: dsl {
  59                         label = "green:dsl";
  60                         gpios = <&gpio 4 GPIO_ACTIVE_HIGH>;
  61                 };
  62
  63                 led_internet: internet {
  64                         label = "green:internet";
  65                         gpios = <&gpio 5 GPIO_ACTIVE_HIGH>;
  66                 };
  67
  68                 usb0 {
  69                         label = "green:usb";
  70                         gpios = <&gpio 19 GPIO_ACTIVE_HIGH>;
  71                         trigger-sources = <&ehci_port1>;
  72                         linux,default-trigger = "usbport";
  73                 };
  74
  75                 usb2 {
  76                         label = "green:usb2";
  77                         gpios = <&gpio 20 GPIO_ACTIVE_HIGH>;
  78                         trigger-sources = <&ehci_port2>;
  79                         linux,default-trigger = "usbport";
  80                 };
  81
  82                 led_wps: wps {
  83                         label = "green:wps";
  84                         gpios = <&gpio 37 GPIO_ACTIVE_HIGH>;
  85                 };
  86         };
  87
  88         ath9k-leds {
  89                 compatible = "gpio-leds";
  90
  91                 led_wifi: wifi {
  92                         label = "green:wifi";
  93                         gpios = <&ath9k 0 GPIO_ACTIVE_HIGH>;
  94                         linux,default-trigger = "phy0tpt";
  95                 };
  96         };
  97
  98
  99         usb_vbus: regulator-usb-vbus {
 100                 compatible = "regulator-fixed";
 101
 102                 regulator-name = "USB_VBUS";
 103
 104                 regulator-min-microvolt = <5000000>;
 105                 regulator-max-microvolt = <5000000>;
 106
 107                 gpio = <&gpio 33 GPIO_ACTIVE_HIGH>;
 108                 enable-active-high;
 109         };
 110 };
 111
 112 &eth0 {
 113         nvmem-cells = <&macaddr_ath9k_cal_f100>;
 114         nvmem-cell-names = "mac-address";
 115 };
 116
 117 &gphy0 {
 118         lantiq,gphy-mode = <GPHY_MODE_GE>;
 119 };
 120
 121 &gphy1 {
 122         lantiq,gphy-mode = <GPHY_MODE_GE>;
 123 };
 124
 125 &gpio {
 126         pinctrl-names = "default";
 127         pinctrl-0 = <&state_default>;
 128
 129         state_default: pinmux {
 130                 phy-rst {
 131                         lantiq,pins = "io42";
 132                         lantiq,pull = <0>;
 133                         lantiq,open-drain = <0>;
 134                         lantiq,output = <1>;
 135                 };
 136                 pcie-rst {
 137                         lantiq,pins = "io38";
 138                         lantiq,pull = <0>;
 139                         lantiq,output = <1>;
 140                 };
 141         };
 142 };
 143
 144 &gswip {
 145         pinctrl-0 = <&mdio_pins>, <&gphy0_led1_pins>, <&gphy1_led1_pins>;
 146         pinctrl-names = "default";
 147 };
 148
 149 &gswip_mdio {
 150         phy0: ethernet-phy@0 {
 151                 reg = <0x0>;
 152                 // reset-gpios = <&gpio 42 GPIO_ACTIVE_LOW>;
 153         };
 154         phy5: ethernet-phy@5 {
 155                 reg = <0x5>;
 156         };
 157         phy11: ethernet-phy@11 {
 158                 reg = <0x11>;
 159         };
 160         phy13: ethernet-phy@13 {
 161                 reg = <0x13>;
 162         };
 163 };
 164
 165 &gswip_ports {
 166         port@0 {
 167                 reg = <0>;
 168                 label = "lan2";
 169                 phy-mode = "rgmii";
 170                 phy-handle = <&phy0>;
 171         };
 172         port@2 {
 173                 reg = <2>;
 174                 label = "lan3";
 175                 phy-mode = "internal";
 176                 phy-handle = <&phy11>;
 177         };
 178         port@4 {
 179                 reg = <4>;
 180                 label = "lan4";
 181                 phy-mode = "internal";
 182                 phy-handle = <&phy13>;
 183         };
 184         port@5 {
 185                 reg = <5>;
 186                 label = "lan1";
 187                 phy-mode = "rgmii";
 188                 phy-handle = <&phy5>;
 189         };
 190 };
 191
 192 &pcie0 {
 193         pcie@0 {
 194                 reg = <0 0 0 0 0>;
 195                 #interrupt-cells = <1>;
 196                 #size-cells = <2>;
 197                 #address-cells = <3>;
 198                 device_type = "pci";
 199
 200                 ath9k: wifi@168c,002e {
 201                         compatible = "pci168c,002e";
 202                         reg = <0 0 0 0 0>;
 203                         #gpio-cells = <2>;
 204                         gpio-controller;
 205                         qca,no-eeprom;
 206                         ieee80211-freq-limit = <2402000 2482000>;
 207                         nvmem-cells = <&macaddr_ath9k_cal_f100>;
 208                         nvmem-cell-names = "mac-address";
 209                         mac-address-increment = <2>;
 210                 };
 211         };
 212 };
 213
 214 &spi {
 215         status = "okay";
 216
 217         flash@4 {
 218                 compatible = "jedec,spi-nor";
 219                 reg = <4>;
 220                 spi-max-frequency = <33250000>;
 221                 m25p,fast-read;
 222
 223                 partitions {
 224                         compatible = "fixed-partitions";
 225                         #address-cells = <1>;
 226                         #size-cells = <1>;
 227
 228                         partition@0 {
 229                                 reg = <0x0 0x20000>;
 230                                 label = "u-boot";
 231                                 read-only;
 232                         };
 233
 234                         partition@20000 {
 235                                 reg = <0x20000 0x7a0000>;
 236                                 label = "firmware";
 237                         };
 238
 239                         partition@7c0000 {
 240                                 reg = <0x7c0000 0x10000>;
 241                                 label = "config";
 242                                 read-only;
 243                         };
 244
 245                         ath9k_cal: partition@7d0000 {
 246                                 reg = <0x7d0000 0x30000>;
 247                                 label = "boardconfig";
 248                                 read-only;
 249                         };
 250                 };
 251         };
 252 };
 253
 254 &usb_phy0 {
 255         status = "okay";
 256 };
 257
 258 &usb_phy1 {
 259         status = "okay";
 260 };
 261
 262 &usb0 {
 263         status = "okay";
 264         vbus-supply = <&usb_vbus>;
 265 };
 266
 267 &usb1 {
 268         status = "okay";
 269         vbus-supply = <&usb_vbus>;
 270 };
 271
 272 &ath9k_cal {
 273         compatible = "nvmem-cells";
 274         #address-cells = <1>;
 275         #size-cells = <1>;
 276
 277         macaddr_ath9k_cal_f100: macaddr@f100 {
 278                 reg = <0xf100 0x6>;
 279         };
 280 };