target/linux/lantiq/patches-3.3/0004-MIPS-lantiq-make-irq.c-support-the-FALC-ON.patch

   1 From 9eabaa2969af9aa157d50b7cfbb447f65db95f06 Mon Sep 17 00:00:00 2001
   2 From: John Crispin <blogic@openwrt.org>
   3 Date: Thu, 11 Aug 2011 12:25:55 +0200
   4 Subject: [PATCH 04/70] MIPS: lantiq: make irq.c support the FALC-ON
   5
   6 There are minor differences in how irqs work on xway and falcon socs.
   7 Xway needs 2 quirks that we need to disable for falcon to also work with
   8 this code.
   9
  10 * EBU irq does not need to send a special ack to the EBU
  11 * The EIU does not exist
  12
  13 Signed-off-by: Thomas Langer <thomas.langer@lantiq.com>
  14 Signed-off-by: John Crispin <blogic@openwrt.org>
  15 ---
  16  arch/mips/lantiq/irq.c |   24 +++++++++++++-----------
  17  1 files changed, 13 insertions(+), 11 deletions(-)
  18
  19 diff --git a/arch/mips/lantiq/irq.c b/arch/mips/lantiq/irq.c
  20 index d673731..f56bcce 100644
  21 --- a/arch/mips/lantiq/irq.c
  22 +++ b/arch/mips/lantiq/irq.c
  23 @@ -195,7 +195,7 @@ static void ltq_hw_irqdispatch(int module)
  24         do_IRQ((int)irq + INT_NUM_IM0_IRL0 + (INT_NUM_IM_OFFSET * module));
  25
  26         /* if this is a EBU irq, we need to ack it or get a deadlock */
  27 -       if ((irq == LTQ_ICU_EBU_IRQ) && (module == 0))
  28 +       if ((irq == LTQ_ICU_EBU_IRQ) && (module == 0) && LTQ_EBU_PCC_ISTAT)
  29                 ltq_ebu_w32(ltq_ebu_r32(LTQ_EBU_PCC_ISTAT) | 0x10,
  30                         LTQ_EBU_PCC_ISTAT);
  31  }
  32 @@ -259,17 +259,19 @@ void __init arch_init_irq(void)
  33         if (!ltq_icu_membase)
  34                 panic("Failed to remap icu memory");
  35
  36 -       if (insert_resource(&iomem_resource, &ltq_eiu_resource) < 0)
  37 -               panic("Failed to insert eiu memory");
  38 +       if (LTQ_EIU_BASE_ADDR) {
  39 +               if (insert_resource(&iomem_resource, &ltq_eiu_resource) < 0)
  40 +                       panic("Failed to insert eiu memory\n");
  41
  42 -       if (request_mem_region(ltq_eiu_resource.start,
  43 -                       resource_size(&ltq_eiu_resource), "eiu") < 0)
  44 -               panic("Failed to request eiu memory");
  45 +               if (request_mem_region(ltq_eiu_resource.start,
  46 +                               resource_size(&ltq_eiu_resource), "eiu") < 0)
  47 +                       panic("Failed to request eiu memory\n");
  48
  49 -       ltq_eiu_membase = ioremap_nocache(ltq_eiu_resource.start,
  50 +               ltq_eiu_membase = ioremap_nocache(ltq_eiu_resource.start,
  51                                 resource_size(&ltq_eiu_resource));
  52 -       if (!ltq_eiu_membase)
  53 -               panic("Failed to remap eiu memory");
  54 +               if (!ltq_eiu_membase)
  55 +                       panic("Failed to remap eiu memory\n");
  56 +       }
  57
  58         /* make sure all irqs are turned off by default */
  59         for (i = 0; i < 5; i++)
  60 @@ -295,8 +297,8 @@ void __init arch_init_irq(void)
  61
  62         for (i = INT_NUM_IRQ0;
  63                 i <= (INT_NUM_IRQ0 + (5 * INT_NUM_IM_OFFSET)); i++)
  64 -               if ((i == LTQ_EIU_IR0) || (i == LTQ_EIU_IR1) ||
  65 -                       (i == LTQ_EIU_IR2))
  66 +               if (((i == LTQ_EIU_IR0) || (i == LTQ_EIU_IR1) ||
  67 +                       (i == LTQ_EIU_IR2)) && LTQ_EIU_BASE_ADDR)
  68                         irq_set_chip_and_handler(i, &ltq_eiu_type,
  69                                 handle_level_irq);
  70                 /* EIU3-5 only exist on ar9 and vr9 */
  71 --
  72 1.7.9.1
  73