target/linux/layerscape/patches-4.4/0051-PCI-designware-Ensure-ATU-is-enabled-before-IO-conf-.patch

   1 From 7f434723cdb6823443330cd4847d5c3b8dd30bd7 Mon Sep 17 00:00:00 2001
   2 From: Stanimir Varbanov <stanimir.varbanov@linaro.org>
   3 Date: Fri, 18 Dec 2015 14:38:55 +0200
   4 Subject: [PATCH 51/70] PCI: designware: Ensure ATU is enabled before IO/conf
   5  space accesses
   6
   7 Read back the ATU CR2 register to ensure ATU programming is effective
   8 before any subsequent I/O or config space accesses.
   9
  10 Without this, PCI device enumeration is unreliable.
  11
  12 [bhelgaas: changelog, comment]
  13 Signed-off-by: Stanimir Varbanov <stanimir.varbanov@linaro.org>
  14 Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
  15 Acked-by: Pratyush Anand <pratyush.anand@gmail.com>
  16 ---
  17  drivers/pci/host/pcie-designware.c |    8 ++++++++
  18  1 file changed, 8 insertions(+)
  19
  20 --- a/drivers/pci/host/pcie-designware.c
  21 +++ b/drivers/pci/host/pcie-designware.c
  22 @@ -154,6 +154,8 @@ static int dw_pcie_wr_own_conf(struct pc
  23  static void dw_pcie_prog_outbound_atu(struct pcie_port *pp, int index,
  24                 int type, u64 cpu_addr, u64 pci_addr, u32 size)
  25  {
  26 +       u32 val;
  27 +
  28         dw_pcie_writel_rc(pp, PCIE_ATU_REGION_OUTBOUND | index,
  29                           PCIE_ATU_VIEWPORT);
  30         dw_pcie_writel_rc(pp, lower_32_bits(cpu_addr), PCIE_ATU_LOWER_BASE);
  31 @@ -164,6 +166,12 @@ static void dw_pcie_prog_outbound_atu(st
  32         dw_pcie_writel_rc(pp, upper_32_bits(pci_addr), PCIE_ATU_UPPER_TARGET);
  33         dw_pcie_writel_rc(pp, type, PCIE_ATU_CR1);
  34         dw_pcie_writel_rc(pp, PCIE_ATU_ENABLE, PCIE_ATU_CR2);
  35 +
  36 +       /*
  37 +        * Make sure ATU enable takes effect before any subsequent config
  38 +        * and I/O accesses.
  39 +        */
  40 +       dw_pcie_readl_rc(pp, PCIE_ATU_CR2, &val);
  41  }
  42
  43  static struct irq_chip dw_msi_irq_chip = {