target/linux/layerscape/patches-4.4/0052-PCI-designware-Simplify-control-flow.patch

   1 From 610b32220391c9d271290bdf8f2b8fe1cf8da9a0 Mon Sep 17 00:00:00 2001
   2 From: Bjorn Helgaas <bhelgaas@google.com>
   3 Date: Tue, 5 Jan 2016 15:48:11 -0600
   4 Subject: [PATCH 52/70] PCI: designware: Simplify control flow
   5
   6 Return values immediately when possible to simplify the control flow.
   7
   8 No functional change intended.  Folded in unused variable removal as
   9 pointed out by Fabio Estevam <fabio.estevam@nxp.com>, Arnd Bergmann
  10 <arnd@arndb.de>, and Thierry Reding <thierry.reding@gmail.com>.
  11
  12 Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
  13 Acked-by: Pratyush Anand <pratyush.anand@gmail.com>
  14 ---
  15  drivers/pci/host/pcie-designware.c |   54 ++++++++++++------------------------
  16  1 file changed, 18 insertions(+), 36 deletions(-)
  17
  18 --- a/drivers/pci/host/pcie-designware.c
  19 +++ b/drivers/pci/host/pcie-designware.c
  20 @@ -128,27 +128,19 @@ static inline void dw_pcie_writel_rc(str
  21  static int dw_pcie_rd_own_conf(struct pcie_port *pp, int where, int size,
  22                                u32 *val)
  23  {
  24 -       int ret;
  25 -
  26         if (pp->ops->rd_own_conf)
  27 -               ret = pp->ops->rd_own_conf(pp, where, size, val);
  28 -       else
  29 -               ret = dw_pcie_cfg_read(pp->dbi_base + where, size, val);
  30 +               return pp->ops->rd_own_conf(pp, where, size, val);
  31
  32 -       return ret;
  33 +       return dw_pcie_cfg_read(pp->dbi_base + where, size, val);
  34  }
  35
  36  static int dw_pcie_wr_own_conf(struct pcie_port *pp, int where, int size,
  37                                u32 val)
  38  {
  39 -       int ret;
  40 -
  41         if (pp->ops->wr_own_conf)
  42 -               ret = pp->ops->wr_own_conf(pp, where, size, val);
  43 -       else
  44 -               ret = dw_pcie_cfg_write(pp->dbi_base + where, size, val);
  45 +               return pp->ops->wr_own_conf(pp, where, size, val);
  46
  47 -       return ret;
  48 +       return dw_pcie_cfg_write(pp->dbi_base + where, size, val);
  49  }
  50
  51  static void dw_pcie_prog_outbound_atu(struct pcie_port *pp, int index,
  52 @@ -392,8 +384,8 @@ int dw_pcie_link_up(struct pcie_port *pp
  53  {
  54         if (pp->ops->link_up)
  55                 return pp->ops->link_up(pp);
  56 -       else
  57 -               return 0;
  58 +
  59 +       return 0;
  60  }
  61
  62  static int dw_pcie_msi_map(struct irq_domain *domain, unsigned int irq,
  63 @@ -666,46 +658,36 @@ static int dw_pcie_rd_conf(struct pci_bu
  64                         int size, u32 *val)
  65  {
  66         struct pcie_port *pp = bus->sysdata;
  67 -       int ret;
  68
  69         if (dw_pcie_valid_config(pp, bus, PCI_SLOT(devfn)) == 0) {
  70                 *val = 0xffffffff;
  71                 return PCIBIOS_DEVICE_NOT_FOUND;
  72         }
  73
  74 -       if (bus->number != pp->root_bus_nr)
  75 -               if (pp->ops->rd_other_conf)
  76 -                       ret = pp->ops->rd_other_conf(pp, bus, devfn,
  77 -                                               where, size, val);
  78 -               else
  79 -                       ret = dw_pcie_rd_other_conf(pp, bus, devfn,
  80 -                                               where, size, val);
  81 -       else
  82 -               ret = dw_pcie_rd_own_conf(pp, where, size, val);
  83 +       if (bus->number == pp->root_bus_nr)
  84 +               return dw_pcie_rd_own_conf(pp, where, size, val);
  85
  86 -       return ret;
  87 +       if (pp->ops->rd_other_conf)
  88 +               return pp->ops->rd_other_conf(pp, bus, devfn, where, size, val);
  89 +
  90 +       return dw_pcie_rd_other_conf(pp, bus, devfn, where, size, val);
  91  }
  92
  93  static int dw_pcie_wr_conf(struct pci_bus *bus, u32 devfn,
  94                         int where, int size, u32 val)
  95  {
  96         struct pcie_port *pp = bus->sysdata;
  97 -       int ret;
  98
  99         if (dw_pcie_valid_config(pp, bus, PCI_SLOT(devfn)) == 0)
 100                 return PCIBIOS_DEVICE_NOT_FOUND;
 101
 102 -       if (bus->number != pp->root_bus_nr)
 103 -               if (pp->ops->wr_other_conf)
 104 -                       ret = pp->ops->wr_other_conf(pp, bus, devfn,
 105 -                                               where, size, val);
 106 -               else
 107 -                       ret = dw_pcie_wr_other_conf(pp, bus, devfn,
 108 -                                               where, size, val);
 109 -       else
 110 -               ret = dw_pcie_wr_own_conf(pp, where, size, val);
 111 +       if (bus->number == pp->root_bus_nr)
 112 +               return dw_pcie_wr_own_conf(pp, where, size, val);
 113
 114 -       return ret;
 115 +       if (pp->ops->wr_other_conf)
 116 +               return pp->ops->wr_other_conf(pp, bus, devfn, where, size, val);
 117 +
 118 +       return dw_pcie_wr_other_conf(pp, bus, devfn, where, size, val);
 119  }
 120
 121  static struct pci_ops dw_pcie_ops = {